vxge_reg.h File Reference

#include <stdint.h>

Go to the source code of this file.

Data Structures
struct	vxge_hw_legacy_reg
struct	vxge_hw_toc_reg
struct	vxge_hw_common_reg
struct	vxge_hw_memrepair_reg
struct	vxge_hw_pcicfgmgmt_reg
struct	vxge_hw_mrpcim_reg
struct	vxge_hw_srpcim_reg
struct	vxge_hw_vpmgmt_reg
struct	vxge_hw_vpath_reg
Defines
#define	vxge_mBIT(loc)   (0x8000000000000000ULL >> (loc))
#define	vxge_vBIT(val, loc, sz)   (((u64)(val)) << (64-(loc)-(sz)))
#define	vxge_vBIT32(val, loc, sz)   (((u32)(val)) << (32-(loc)-(sz)))
#define	vxge_bVALn(bits, loc, n)   ((((u64)bits) >> (64-(loc+n))) & ((0x1ULL << n) - 1))
#define	VXGE_HW_TITAN_ASIC_ID_GET_INITIAL_DEVICE_ID(bits)   vxge_bVALn(bits, 0, 16)
#define	VXGE_HW_TITAN_ASIC_ID_GET_INITIAL_MAJOR_REVISION(bits)   vxge_bVALn(bits, 48, 8)
#define	VXGE_HW_TITAN_ASIC_ID_GET_INITIAL_MINOR_REVISION(bits)   vxge_bVALn(bits, 56, 8)
#define	VXGE_HW_VPATH_TO_FUNC_MAP_CFG1_GET_VPATH_TO_FUNC_MAP_CFG1(bits)   vxge_bVALn(bits, 3, 5)
#define	VXGE_HW_HOST_TYPE_ASSIGNMENTS_GET_HOST_TYPE_ASSIGNMENTS(bits)   vxge_bVALn(bits, 5, 3)
#define	VXGE_HW_PF_SW_RESET_COMMAND   0xA5
#define	VXGE_HW_TITAN_PCICFGMGMT_REG_SPACES   17
#define	VXGE_HW_TITAN_SRPCIM_REG_SPACES   17
#define	VXGE_HW_TITAN_VPMGMT_REG_SPACES   17
#define	VXGE_HW_TITAN_VPATH_REG_SPACES   17
#define	VXGE_HW_PRIV_FN_ACTION   8
#define	VXGE_HW_PRIV_VP_ACTION   5
#define	VXGE_HW_PRIV_FN_MEMO   13
#define	VXGE_HW_EN_DIS_UDP_RTH   10
#define	VXGE_HW_BW_CONTROL   12
#define	VXGE_HW_RTS_ACCESS_FW_MEMO_ACTION_PRIV_NWIF   17
#define	VXGE_HW_FW_API_FUNC_MODE   11
#define	VXGE_HW_FW_API_GET_FUNC_MODE   29
#define	VXGE_HW_FW_API_FUNC_MODE_COMMIT   21
#define	VXGE_HW_GET_FUNC_MODE_VAL(val)   (val & 0xFF)
#define	VXGE_HW_BYTES_PER_U64   8
#define	VXGE_HW_FW_UPGRADE_MEMO   13
#define	VXGE_HW_FW_UPGRADE_ACTION   16
#define	VXGE_HW_FW_UPGRADE_OFFSET_START   2
#define	VXGE_HW_FW_UPGRADE_OFFSET_SEND   3
#define	VXGE_HW_FW_UPGRADE_OFFSET_COMMIT   4
#define	VXGE_HW_FW_UPGRADE_OFFSET_READ   5
#define	VXGE_HW_FW_UPGRADE_BLK_SIZE   16
#define	VXGE_HW_UPGRADE_GET_RET_ERR_CODE(val)   (val & 0xff)
#define	VXGE_HW_UPGRADE_GET_SEC_ERR_CODE(val)   ((val >> 8) & 0xff)
#define	VXGE_HW_ASIC_MODE_RESERVED   0
#define	VXGE_HW_ASIC_MODE_NO_IOV   1
#define	VXGE_HW_ASIC_MODE_SR_IOV   2
#define	VXGE_HW_ASIC_MODE_MR_IOV   3
#define	VXGE_HW_TXMAC_GEN_CFG1_TMAC_PERMA_STOP_EN   vxge_mBIT(3)
#define	VXGE_HW_TXMAC_GEN_CFG1_BLOCK_BCAST_TO_WIRE   vxge_mBIT(19)
#define	VXGE_HW_TXMAC_GEN_CFG1_BLOCK_BCAST_TO_SWITCH   vxge_mBIT(23)
#define	VXGE_HW_TXMAC_GEN_CFG1_HOST_APPEND_FCS   vxge_mBIT(31)
#define	VXGE_HW_VPATH_IS_FIRST_GET_VPATH_IS_FIRST(bits)   vxge_bVALn(bits, 3, 1)
#define	VXGE_HW_TIM_VPATH_ASSIGNMENT_GET_BMAP_ROOT(bits)   vxge_bVALn(bits, 0, 32)
#define	VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_GET_MAX_PYLD_LEN(bits)   vxge_bVALn(bits, 50, 14)
#define	VXGE_HW_XMAC_VSPORT_CHOICES_VP_GET_VSPORT_VECTOR(bits)   vxge_bVALn(bits, 0, 17)
#define	VXGE_HW_XMAC_VPATH_TO_VSPORT_VPMGMT_CLONE_GET_VSPORT_NUMBER(bits)   vxge_bVALn(bits, 3, 5)
#define	VXGE_HW_KDFC_DRBL_TRIPLET_TOTAL_GET_KDFC_MAX_SIZE(bits)   vxge_bVALn(bits, 17, 15)
#define	VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_MODE_LEGACY_MODE   0
#define	VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_MODE_NON_OFFLOAD_ONLY   1
#define	VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_MODE_MULTI_OP_MODE   2
#define	VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_MODE_MESSAGES_ONLY   0
#define	VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_MODE_MULTI_OP_MODE   1
#define	VXGE_HW_TOC_GET_KDFC_INITIAL_OFFSET(val)   (val&~VXGE_HW_TOC_KDFC_INITIAL_BIR(7))
#define	VXGE_HW_TOC_GET_KDFC_INITIAL_BIR(val)   vxge_bVALn(val, 61, 3)
#define	VXGE_HW_TOC_GET_USDC_INITIAL_OFFSET(val)   (val&~VXGE_HW_TOC_USDC_INITIAL_BIR(7))
#define	VXGE_HW_TOC_GET_USDC_INITIAL_BIR(val)   vxge_bVALn(val, 61, 3)
#define	VXGE_HW_TOC_KDFC_VPATH_STRIDE_GET_TOC_KDFC_VPATH_STRIDE(bits)   bits
#define	VXGE_HW_TOC_KDFC_FIFO_STRIDE_GET_TOC_KDFC_FIFO_STRIDE(bits)   bits
#define	VXGE_HW_KDFC_TRPL_FIFO_OFFSET_GET_KDFC_RCTR0(bits)   vxge_bVALn(bits, 1, 15)
#define	VXGE_HW_KDFC_TRPL_FIFO_OFFSET_GET_KDFC_RCTR1(bits)   vxge_bVALn(bits, 17, 15)
#define	VXGE_HW_KDFC_TRPL_FIFO_OFFSET_GET_KDFC_RCTR2(bits)   vxge_bVALn(bits, 33, 15)
#define	VXGE_HW_KDFC_TRPL_FIFO_OFFSET_KDFC_VAPTH_NUM(val)   vxge_vBIT(val, 42, 5)
#define	VXGE_HW_KDFC_TRPL_FIFO_OFFSET_KDFC_FIFO_NUM(val)   vxge_vBIT(val, 47, 2)
#define	VXGE_HW_KDFC_TRPL_FIFO_OFFSET_KDFC_FIFO_OFFSET(val)   vxge_vBIT(val, 49, 15)
#define	VXGE_HW_PRC_CFG4_RING_MODE_ONE_BUFFER   0
#define	VXGE_HW_PRC_CFG4_RING_MODE_THREE_BUFFER   1
#define	VXGE_HW_PRC_CFG4_RING_MODE_FIVE_BUFFER   2
#define	VXGE_HW_PRC_CFG7_SCATTER_MODE_A   0
#define	VXGE_HW_PRC_CFG7_SCATTER_MODE_B   2
#define	VXGE_HW_PRC_CFG7_SCATTER_MODE_C   1
#define	VXGE_HW_RTS_MGR_STEER_CTRL_WE_READ   0
#define	VXGE_HW_RTS_MGR_STEER_CTRL_WE_WRITE   1
#define	VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_DA   0
#define	VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_VID   1
#define	VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_ETYPE   2
#define	VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_PN   3
#define	VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_RANGE_PN   4
#define	VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_RTH_GEN_CFG   5
#define	VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_RTH_SOLO_IT   6
#define	VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_RTH_JHASH_CFG   7
#define	VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_RTH_MASK   8
#define	VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_RTH_KEY   9
#define	VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_QOS   10
#define	VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_DS   11
#define	VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_RTH_MULTI_IT   12
#define	VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_FW_VERSION   13
#define	VXGE_HW_RTS_MGR_STEER_DATA0_GET_DA_MAC_ADDR(bits)   vxge_bVALn(bits, 0, 48)
#define	VXGE_HW_RTS_MGR_STEER_DATA0_DA_MAC_ADDR(val)   vxge_vBIT(val, 0, 48)
#define	VXGE_HW_RTS_MGR_STEER_DATA1_GET_DA_MAC_ADDR_MASK(bits)   vxge_bVALn(bits, 0, 48)
#define	VXGE_HW_RTS_MGR_STEER_DATA1_DA_MAC_ADDR_MASK(val)   vxge_vBIT(val, 0, 48)
#define	VXGE_HW_RTS_MGR_STEER_DATA1_DA_MAC_ADDR_ADD_PRIVILEGED_MODE   vxge_mBIT(54)
#define	VXGE_HW_RTS_MGR_STEER_DATA1_GET_DA_MAC_ADDR_ADD_VPATH(bits)   vxge_bVALn(bits, 55, 5)
#define	VXGE_HW_RTS_MGR_STEER_DATA1_DA_MAC_ADDR_ADD_VPATH(val)   vxge_vBIT(val, 55, 5)
#define	VXGE_HW_RTS_MGR_STEER_DATA1_GET_DA_MAC_ADDR_ADD_MODE(bits)   vxge_bVALn(bits, 62, 2)
#define	VXGE_HW_RTS_MGR_STEER_DATA1_DA_MAC_ADDR_MODE(val)   vxge_vBIT(val, 62, 2)
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_ADD_ENTRY   0
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_DELETE_ENTRY   1
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_LIST_FIRST_ENTRY   2
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_LIST_NEXT_ENTRY   3
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_ENTRY   0
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_WRITE_ENTRY   1
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_MEMO_ENTRY   3
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_LED_CONTROL   4
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_ALL_CLEAR   172
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DA   0
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_VID   1
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_ETYPE   2
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_PN   3
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_RTH_GEN_CFG   5
#define	VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_SOLO_IT   6
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_RTH_JHASH_CFG   7
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MASK   8
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_RTH_KEY   9
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_QOS   10
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DS   11
#define	VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MULTI_IT   12
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO   13
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_DA_MAC_ADDR(bits)   vxge_bVALn(bits, 0, 48)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_DA_MAC_ADDR(val)   vxge_vBIT(val, 0, 48)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_SEND_TO_NW   vxge_mBIT(51)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_VLAN_ID(bits)   vxge_bVALn(bits, 0, 12)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_VLAN_ID(val)   vxge_vBIT(val, 0, 12)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_ETYPE(bits)   vxge_bVALn(bits, 0, 11)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_ETYPE(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_PN_SRC_DEST_SEL(bits)   vxge_bVALn(bits, 3, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_PN_SRC_DEST_SEL   vxge_mBIT(3)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_PN_TCP_UDP_SEL(bits)   vxge_bVALn(bits, 7, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_PN_TCP_UDP_SEL   vxge_mBIT(7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_PN_PORT_NUM(bits)   vxge_bVALn(bits, 8, 16)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_PN_PORT_NUM(val)   vxge_vBIT(val, 8, 16)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_RTH_EN(bits)   vxge_bVALn(bits, 3, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_EN   vxge_mBIT(3)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_BUCKET_SIZE(bits)   vxge_bVALn(bits, 4, 4)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_BUCKET_SIZE(val)   vxge_vBIT(val, 4, 4)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_ALG_SEL(bits)   vxge_bVALn(bits, 10, 2)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_ALG_SEL(val)   vxge_vBIT(val, 10, 2)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_ALG_SEL_JENKINS   0
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_ALG_SEL_MS_RSS   1
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_ALG_SEL_CRC32C   2
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_RTH_TCP_IPV4_EN(bits)   vxge_bVALn(bits, 15, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_TCP_IPV4_EN   vxge_mBIT(15)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_RTH_IPV4_EN(bits)   vxge_bVALn(bits, 19, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_IPV4_EN   vxge_mBIT(19)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_RTH_TCP_IPV6_EN(bits)   vxge_bVALn(bits, 23, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_TCP_IPV6_EN   vxge_mBIT(23)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_RTH_IPV6_EN(bits)   vxge_bVALn(bits, 27, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_IPV6_EN   vxge_mBIT(27)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_RTH_TCP_IPV6_EX_EN(bits)   vxge_bVALn(bits, 31, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_TCP_IPV6_EX_EN   vxge_mBIT(31)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_RTH_IPV6_EX_EN(bits)   vxge_bVALn(bits, 35, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_IPV6_EX_EN   vxge_mBIT(35)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_ACTIVE_TABLE(bits)   vxge_bVALn(bits, 39, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_ACTIVE_TABLE   vxge_mBIT(39)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_REPL_ENTRY_EN(bits)   vxge_bVALn(bits, 43, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_REPL_ENTRY_EN   vxge_mBIT(43)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_SOLO_IT_ENTRY_EN(bits)   vxge_bVALn(bits, 3, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_SOLO_IT_ENTRY_EN   vxge_mBIT(3)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_SOLO_IT_BUCKET_DATA(bits)   vxge_bVALn(bits, 9, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_SOLO_IT_BUCKET_DATA(val)   vxge_vBIT(val, 9, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_ITEM0_BUCKET_NUM(bits)   vxge_bVALn(bits, 0, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_ITEM0_BUCKET_NUM(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_ITEM0_ENTRY_EN(bits)   vxge_bVALn(bits, 8, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_ITEM0_ENTRY_EN   vxge_mBIT(8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_ITEM0_BUCKET_DATA(bits)   vxge_bVALn(bits, 9, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_ITEM0_BUCKET_DATA(val)   vxge_vBIT(val, 9, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_ITEM1_BUCKET_NUM(bits)   vxge_bVALn(bits, 16, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_ITEM1_BUCKET_NUM(val)   vxge_vBIT(val, 16, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_ITEM1_ENTRY_EN(bits)   vxge_bVALn(bits, 24, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_ITEM1_ENTRY_EN   vxge_mBIT(24)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_ITEM1_BUCKET_DATA(bits)   vxge_bVALn(bits, 25, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_ITEM1_BUCKET_DATA(val)   vxge_vBIT(val, 25, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM0_BUCKET_NUM(bits)   vxge_bVALn(bits, 0, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM0_BUCKET_NUM(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM0_ENTRY_EN(bits)   vxge_bVALn(bits, 8, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM0_ENTRY_EN   vxge_mBIT(8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM0_BUCKET_DATA(bits)   vxge_bVALn(bits, 9, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM0_BUCKET_DATA(val)   vxge_vBIT(val, 9, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM1_BUCKET_NUM(bits)   vxge_bVALn(bits, 16, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM1_BUCKET_NUM(val)   vxge_vBIT(val, 16, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM1_ENTRY_EN(bits)   vxge_bVALn(bits, 24, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM1_ENTRY_EN   vxge_mBIT(24)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM1_BUCKET_DATA(bits)   vxge_bVALn(bits, 25, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM1_BUCKET_DATA(val)   vxge_vBIT(val, 25, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_JHASH_CFG_GOLDEN_RATIO(bits)   vxge_bVALn(bits, 0, 32)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_JHASH_CFG_GOLDEN_RATIO(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_JHASH_CFG_INIT_VALUE(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_JHASH_CFG_INIT_VALUE(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_MASK_IPV6_SA_MASK(bits)   vxge_bVALn(bits, 0, 16)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_MASK_IPV6_SA_MASK(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_MASK_IPV6_DA_MASK(bits)   vxge_bVALn(bits, 16, 16)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_MASK_IPV6_DA_MASK(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_MASK_IPV4_SA_MASK(bits)   vxge_bVALn(bits, 32, 4)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_MASK_IPV4_SA_MASK(val)   vxge_vBIT(val, 32, 4)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_MASK_IPV4_DA_MASK(bits)   vxge_bVALn(bits, 36, 4)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_MASK_IPV4_DA_MASK(val)   vxge_vBIT(val, 36, 4)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_MASK_L4SP_MASK(bits)   vxge_bVALn(bits, 40, 2)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_MASK_L4SP_MASK(val)   vxge_vBIT(val, 40, 2)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_MASK_L4DP_MASK(bits)   vxge_bVALn(bits, 42, 2)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_MASK_L4DP_MASK(val)   vxge_vBIT(val, 42, 2)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_KEY_KEY(bits)   vxge_bVALn(bits, 0, 64)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_KEY_KEY   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_QOS_ENTRY_EN(bits)   vxge_bVALn(bits, 3, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_QOS_ENTRY_EN   vxge_mBIT(3)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_DS_ENTRY_EN(bits)   vxge_bVALn(bits, 3, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_DS_ENTRY_EN   vxge_mBIT(3)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_DA_MAC_ADDR_MASK(bits)   vxge_bVALn(bits, 0, 48)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_DA_MAC_ADDR_MASK(val)   vxge_vBIT(val, 0, 48)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_DA_MAC_ADDR_MODE(val)   vxge_vBIT(val, 62, 2)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM4_BUCKET_NUM(bits)   vxge_bVALn(bits, 0, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM4_BUCKET_NUM(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM4_ENTRY_EN(bits)   vxge_bVALn(bits, 8, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM4_ENTRY_EN   vxge_mBIT(8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM4_BUCKET_DATA(bits)   vxge_bVALn(bits, 9, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM4_BUCKET_DATA(val)   vxge_vBIT(val, 9, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM5_BUCKET_NUM(bits)   vxge_bVALn(bits, 16, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM5_BUCKET_NUM(val)   vxge_vBIT(val, 16, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM5_ENTRY_EN(bits)   vxge_bVALn(bits, 24, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM5_ENTRY_EN   vxge_mBIT(24)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM5_BUCKET_DATA(bits)   vxge_bVALn(bits, 25, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM5_BUCKET_DATA(val)   vxge_vBIT(val, 25, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM6_BUCKET_NUM(bits)   vxge_bVALn(bits, 32, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM6_BUCKET_NUM(val)   vxge_vBIT(val, 32, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM6_ENTRY_EN(bits)   vxge_bVALn(bits, 40, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM6_ENTRY_EN   vxge_mBIT(40)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM6_BUCKET_DATA(bits)   vxge_bVALn(bits, 41, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM6_BUCKET_DATA(val)   vxge_vBIT(val, 41, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM7_BUCKET_NUM(bits)   vxge_bVALn(bits, 48, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM7_BUCKET_NUM(val)   vxge_vBIT(val, 48, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM7_ENTRY_EN(bits)   vxge_bVALn(bits, 56, 1)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM7_ENTRY_EN   vxge_mBIT(56)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM7_BUCKET_DATA(bits)   vxge_bVALn(bits, 57, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM7_BUCKET_DATA(val)   vxge_vBIT(val, 57, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PART_NUMBER   0
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_SERIAL_NUMBER   1
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_VERSION   2
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PCI_MODE   3
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_DESC_0   4
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_DESC_1   5
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_DESC_2   6
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_DESC_3   7
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORTS   8
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORT0_PMD_TYPE   10
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORT0_PMD_VENDOR   11
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORT0_PMD_PARTNO   13
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORT0_PMD_SERNO   14
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORT1_PMD_TYPE   20
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORT1_PMD_VENDOR   21
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORT1_PMD_PARTNO   23
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORT1_PMD_SERNO   24
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_LED_CONTROL_ON   1
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_LED_CONTROL_OFF   0
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_DAY(bits)   vxge_bVALn(bits, 0, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_FW_VER_DAY(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_MONTH(bits)   vxge_bVALn(bits, 8, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_FW_VER_MONTH(val)   vxge_vBIT(val, 8, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_YEAR(bits)   vxge_bVALn(bits, 16, 16)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_FW_VER_YEAR(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_MAJOR(bits)   vxge_bVALn(bits, 32, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_FW_VER_MAJOR   vxge_vBIT(val, 32, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_MINOR(bits)   vxge_bVALn(bits, 40, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_FW_VER_MINOR   vxge_vBIT(val, 40, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_BUILD(bits)   vxge_bVALn(bits, 48, 16)
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_GET_ACTION(bits)   vxge_bVALn(bits, 0, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_FW_VER_BUILD   vxge_vBIT(val, 48, 16)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_DAY(bits)   vxge_bVALn(bits, 0, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_FLASH_VER_DAY(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_MONTH(bits)   vxge_bVALn(bits, 8, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_FLASH_VER_MONTH(val)   vxge_vBIT(val, 8, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_YEAR(bits)   vxge_bVALn(bits, 16, 16)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_FLASH_VER_YEAR(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_MAJOR(bits)   vxge_bVALn(bits, 32, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_FLASH_VER_MAJOR   vxge_vBIT(val, 32, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_MINOR(bits)   vxge_bVALn(bits, 40, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_FLASH_VER_MINOR   vxge_vBIT(val, 40, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_BUILD(bits)   vxge_bVALn(bits, 48, 16)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_FLASH_VER_BUILD   vxge_vBIT(val, 48, 16)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_SET_NWIF_CMD(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_API_VER(bits)   vxge_bVALn(bits, 0, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_TX_PRIORITY(bits)   vxge_bVALn(bits, 21, 3)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_TX_MIN_BW(bits)   vxge_bVALn(bits, 24, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_TX_MAX_BW(bits)   vxge_bVALn(bits, 32, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RX_PRIORITY(bits)   vxge_bVALn(bits, 45, 3)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RX_MIN_BW(bits)   vxge_bVALn(bits, 48, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RX_MAX_BW(bits)   vxge_bVALn(bits, 56, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_SET_VPATH_OR_FUNC(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_SET_TX_PRIORITY(val)   vxge_vBIT(val, 21, 3)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_SET_TX_MIN_BW(val)   vxge_vBIT(val, 24, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_SET_TX_MAX_BW(val)   vxge_vBIT(val, 32, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_SET_RX_PRIORITY(val)   vxge_vBIT(val, 45, 3)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_SET_RX_MIN_BW(val)   vxge_vBIT(val, 48, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_SET_RX_MAX_BW(val)   vxge_vBIT(val, 56, 8)
#define	VXGE_HW_SRPCIM_TO_VPATH_ALARM_REG_GET_PPIF_SRPCIM_TO_VPATH_ALARM(bits)   vxge_bVALn(bits, 0, 18)
#define	VXGE_HW_RX_MULTI_CAST_STATS_GET_FRAME_DISCARD(bits)   vxge_bVALn(bits, 48, 16)
#define	VXGE_HW_RX_FRM_TRANSFERRED_GET_RX_FRM_TRANSFERRED(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_RXD_RETURNED_GET_RXD_RETURNED(bits)   vxge_bVALn(bits, 48, 16)
#define	VXGE_HW_VPATH_DEBUG_STATS0_GET_INI_NUM_MWR_SENT(bits)   vxge_bVALn(bits, 0, 32)
#define	VXGE_HW_VPATH_DEBUG_STATS1_GET_INI_NUM_MRD_SENT(bits)   vxge_bVALn(bits, 0, 32)
#define	VXGE_HW_VPATH_DEBUG_STATS2_GET_INI_NUM_CPL_RCVD(bits)   vxge_bVALn(bits, 0, 32)
#define	VXGE_HW_VPATH_DEBUG_STATS3_GET_INI_NUM_MWR_BYTE_SENT(bits)   (bits)
#define	VXGE_HW_VPATH_DEBUG_STATS4_GET_INI_NUM_CPL_BYTE_RCVD(bits)   (bits)
#define	VXGE_HW_VPATH_DEBUG_STATS5_GET_WRCRDTARB_XOFF(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_VPATH_DEBUG_STATS6_GET_RDCRDTARB_XOFF(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_VPATH_GENSTATS_COUNT01_GET_PPIF_VPATH_GENSTATS_COUNT1(bits)   vxge_bVALn(bits, 0, 32)
#define	VXGE_HW_VPATH_GENSTATS_COUNT01_GET_PPIF_VPATH_GENSTATS_COUNT0(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_VPATH_GENSTATS_COUNT23_GET_PPIF_VPATH_GENSTATS_COUNT3(bits)   vxge_bVALn(bits, 0, 32)
#define	VXGE_HW_VPATH_GENSTATS_COUNT23_GET_PPIF_VPATH_GENSTATS_COUNT2(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_VPATH_GENSTATS_COUNT4_GET_PPIF_VPATH_GENSTATS_COUNT4(bits)   vxge_bVALn(bits, 0, 32)
#define	VXGE_HW_VPATH_GENSTATS_COUNT5_GET_PPIF_VPATH_GENSTATS_COUNT5(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_TX_VP_RESET_DISCARDED_FRMS_GET_TX_VP_RESET_DISCARDED_FRMS(bits)   vxge_bVALn(bits, 48, 16)
#define	VXGE_HW_DBG_STATS_GET_RX_MPA_CRC_FAIL_FRMS(bits)   vxge_bVALn(bits, 0, 16)
#define	VXGE_HW_DBG_STATS_GET_RX_MPA_MRK_FAIL_FRMS(bits)   vxge_bVALn(bits, 16, 16)
#define	VXGE_HW_DBG_STATS_GET_RX_MPA_LEN_FAIL_FRMS(bits)   vxge_bVALn(bits, 32, 16)
#define	VXGE_HW_DBG_STATS_GET_RX_FAU_RX_WOL_FRMS(bits)   vxge_bVALn(bits, 0, 16)
#define	VXGE_HW_DBG_STATS_GET_RX_FAU_RX_VP_RESET_DISCARDED_FRMS(bits)   vxge_bVALn(bits, 16, 16)
#define	VXGE_HW_DBG_STATS_GET_RX_FAU_RX_PERMITTED_FRMS(bits)   vxge_bVALn(bits, 32, 16)
#define	VXGE_HW_MRPCIM_DEBUG_STATS0_GET_INI_WR_DROP(bits)   vxge_bVALn(bits, 0, 32)
#define	VXGE_HW_MRPCIM_DEBUG_STATS0_GET_INI_RD_DROP(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_MRPCIM_DEBUG_STATS1_GET_VPLANE_WRCRDTARB_PH_CRDT_DEPLETED(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_MRPCIM_DEBUG_STATS2_GET_VPLANE_WRCRDTARB_PD_CRDT_DEPLETED(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_MRPCIM_DEBUG_STATS3_GET_VPLANE_RDCRDTARB_NPH_CRDT_DEPLETED(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_MRPCIM_DEBUG_STATS4_GET_INI_WR_VPIN_DROP(bits)   vxge_bVALn(bits, 0, 32)
#define	VXGE_HW_MRPCIM_DEBUG_STATS4_GET_INI_RD_VPIN_DROP(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_GENSTATS_COUNT01_GET_GENSTATS_COUNT1(bits)   vxge_bVALn(bits, 0, 32)
#define	VXGE_HW_GENSTATS_COUNT01_GET_GENSTATS_COUNT0(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_GENSTATS_COUNT23_GET_GENSTATS_COUNT3(bits)   vxge_bVALn(bits, 0, 32)
#define	VXGE_HW_GENSTATS_COUNT23_GET_GENSTATS_COUNT2(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_GENSTATS_COUNT4_GET_GENSTATS_COUNT4(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_GENSTATS_COUNT5_GET_GENSTATS_COUNT5(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_DEBUG_STATS0_GET_RSTDROP_MSG(bits)   vxge_bVALn(bits, 0, 32)
#define	VXGE_HW_DEBUG_STATS0_GET_RSTDROP_CPL(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_DEBUG_STATS1_GET_RSTDROP_CLIENT0(bits)   vxge_bVALn(bits, 0, 32)
#define	VXGE_HW_DEBUG_STATS1_GET_RSTDROP_CLIENT1(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_DEBUG_STATS2_GET_RSTDROP_CLIENT2(bits)   vxge_bVALn(bits, 0, 32)
#define	VXGE_HW_DEBUG_STATS3_GET_VPLANE_DEPL_PH(bits)   vxge_bVALn(bits, 0, 16)
#define	VXGE_HW_DEBUG_STATS3_GET_VPLANE_DEPL_NPH(bits)   vxge_bVALn(bits, 16, 16)
#define	VXGE_HW_DEBUG_STATS3_GET_VPLANE_DEPL_CPLH(bits)   vxge_bVALn(bits, 32, 16)
#define	VXGE_HW_DEBUG_STATS4_GET_VPLANE_DEPL_PD(bits)   vxge_bVALn(bits, 0, 16)
#define	VXGE_HW_DEBUG_STATS4_GET_VPLANE_DEPL_NPD(bits)   vxge_bVALn(bits, 16, 16)
#define	VXGE_HW_DEBUG_STATS4_GET_VPLANE_DEPL_CPLD(bits)   vxge_bVALn(bits, 32, 16)
#define	VXGE_HW_DBG_STATS_TPA_TX_PATH_GET_TX_PERMITTED_FRMS(bits)   vxge_bVALn(bits, 32, 32)
#define	VXGE_HW_DBG_STAT_TX_ANY_FRMS_GET_PORT0_TX_ANY_FRMS(bits)   vxge_bVALn(bits, 0, 8)
#define	VXGE_HW_DBG_STAT_TX_ANY_FRMS_GET_PORT1_TX_ANY_FRMS(bits)   vxge_bVALn(bits, 8, 8)
#define	VXGE_HW_DBG_STAT_TX_ANY_FRMS_GET_PORT2_TX_ANY_FRMS(bits)   vxge_bVALn(bits, 16, 8)
#define	VXGE_HW_DBG_STAT_RX_ANY_FRMS_GET_PORT0_RX_ANY_FRMS(bits)   vxge_bVALn(bits, 0, 8)
#define	VXGE_HW_DBG_STAT_RX_ANY_FRMS_GET_PORT1_RX_ANY_FRMS(bits)   vxge_bVALn(bits, 8, 8)
#define	VXGE_HW_DBG_STAT_RX_ANY_FRMS_GET_PORT2_RX_ANY_FRMS(bits)   vxge_bVALn(bits, 16, 8)
#define	VXGE_HW_CONFIG_PRIV_H
#define	VXGE_HW_SWAPPER_INITIAL_VALUE   0x0123456789abcdefULL
#define	VXGE_HW_SWAPPER_BYTE_SWAPPED   0xefcdab8967452301ULL
#define	VXGE_HW_SWAPPER_BIT_FLIPPED   0x80c4a2e691d5b3f7ULL
#define	VXGE_HW_SWAPPER_BYTE_SWAPPED_BIT_FLIPPED   0xf7b3d591e6a2c480ULL
#define	VXGE_HW_SWAPPER_READ_BYTE_SWAP_ENABLE   0xFFFFFFFFFFFFFFFFULL
#define	VXGE_HW_SWAPPER_READ_BYTE_SWAP_DISABLE   0x0000000000000000ULL
#define	VXGE_HW_SWAPPER_READ_BIT_FLAP_ENABLE   0xFFFFFFFFFFFFFFFFULL
#define	VXGE_HW_SWAPPER_READ_BIT_FLAP_DISABLE   0x0000000000000000ULL
#define	VXGE_HW_SWAPPER_WRITE_BYTE_SWAP_ENABLE   0xFFFFFFFFFFFFFFFFULL
#define	VXGE_HW_SWAPPER_WRITE_BYTE_SWAP_DISABLE   0x0000000000000000ULL
#define	VXGE_HW_SWAPPER_WRITE_BIT_FLAP_ENABLE   0xFFFFFFFFFFFFFFFFULL
#define	VXGE_HW_SWAPPER_WRITE_BIT_FLAP_DISABLE   0x0000000000000000ULL
#define	VXGE_HW_TOC_SWAPPER_FB_INITIAL_VAL(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_PIFM_RD_SWAP_EN_PIFM_RD_SWAP_EN(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_PIFM_RD_FLIP_EN_PIFM_RD_FLIP_EN(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_PIFM_WR_SWAP_EN_PIFM_WR_SWAP_EN(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_PIFM_WR_FLIP_EN_PIFM_WR_FLIP_EN(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_TOC_FIRST_POINTER_INITIAL_VAL(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_HOST_ACCESS_EN_HOST_ACCESS_EN(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_TOC_COMMON_POINTER_INITIAL_VAL(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_TOC_MEMREPAIR_POINTER_INITIAL_VAL(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_TOC_PCICFGMGMT_POINTER_INITIAL_VAL(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_TOC_MRPCIM_POINTER_INITIAL_VAL(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_TOC_SRPCIM_POINTER_INITIAL_VAL(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_TOC_VPMGMT_POINTER_INITIAL_VAL(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_TOC_VPATH_POINTER_INITIAL_VAL(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_TOC_KDFC_INITIAL_OFFSET(val)   vxge_vBIT(val, 0, 61)
#define	VXGE_HW_TOC_KDFC_INITIAL_BIR(val)   vxge_vBIT(val, 61, 3)
#define	VXGE_HW_TOC_USDC_INITIAL_OFFSET(val)   vxge_vBIT(val, 0, 61)
#define	VXGE_HW_TOC_USDC_INITIAL_BIR(val)   vxge_vBIT(val, 61, 3)
#define	VXGE_HW_TOC_KDFC_VPATH_STRIDE_INITIAL_TOC_KDFC_VPATH_STRIDE(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_TOC_KDFC_FIFO_STRIDE_INITIAL_TOC_KDFC_FIFO_STRIDE(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_PRC_STATUS1_PRC_VP_QUIESCENT(n)   vxge_mBIT(n)
#define	VXGE_HW_RXDCM_RESET_IN_PROGRESS_PRC_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_REPLICQ_FLUSH_IN_PROGRESS_NOA_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_RXPE_CMDS_RESET_IN_PROGRESS_NOA_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_MXP_CMDS_RESET_IN_PROGRESS_NOA_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_NOFFLOAD_RESET_IN_PROGRESS_PRC_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_RD_REQ_IN_PROGRESS_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_RD_REQ_OUTSTANDING_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_KDFC_RESET_IN_PROGRESS_NOA_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_ONE_CFG_VP_RDY(n)   vxge_mBIT(n)
#define	VXGE_HW_ONE_COMMON_PET_VPATH_RESET_IN_PROGRESS(n)   vxge_mBIT(n)
#define	VXGE_HW_TIM_INT_EN_TIM_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_TIM_SET_INT_EN_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_TIM_CLR_INT_EN_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_TIM_MASK_INT_DURING_RESET_VPATH(n)   vxge_mBIT(n)
#define	VXGE_HW_TIM_RESET_IN_PROGRESS_TIM_VPATH(n)   vxge_mBIT(n)
#define	VXGE_HW_TIM_OUTSTANDING_BMAP_TIM_VPATH(n)   vxge_mBIT(n)
#define	VXGE_HW_MSG_RESET_IN_PROGRESS_MSG_COMPOSITE(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_MSG_MXP_MR_READY_MP_BOOTED(n)   vxge_mBIT(n)
#define	VXGE_HW_MSG_UXP_MR_READY_UP_BOOTED(n)   vxge_mBIT(n)
#define	VXGE_HW_MSG_DMQ_NONI_RTL_PREFETCH_BYPASS_ENABLE(n)   vxge_mBIT(n)
#define	VXGE_HW_MSG_UMQ_RTL_BWR_PREFETCH_DISABLE(n)   vxge_mBIT(n)
#define	VXGE_HW_CMN_RSTHDLR_CFG0_SW_RESET_VPATH(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_CMN_RSTHDLR_CFG1_CLR_VPATH_RESET(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_CMN_RSTHDLR_CFG2_SW_RESET_FIFO0(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_CMN_RSTHDLR_CFG3_SW_RESET_FIFO1(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_CMN_RSTHDLR_CFG4_SW_RESET_FIFO2(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_CMN_RSTHDLR_CFG8_INCR_VPATH_INST_NUM(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_STATS_CFG0_STATS_ENABLE(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_CLEAR_MSIX_MASK_VECT_CLEAR_MSIX_MASK_VECT(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_SET_MSIX_MASK_VECT_SET_MSIX_MASK_VECT(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_CLEAR_MSIX_MASK_ALL_VECT_CLEAR_MSIX_MASK_ALL_VECT(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_SET_MSIX_MASK_ALL_VECT_SET_MSIX_MASK_ALL_VECT(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_MASK_VECTOR_MASK_VECTOR(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_MSIX_PENDING_VECTOR_MSIX_PENDING_VECTOR(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_CLR_MSIX_ONE_SHOT_VEC_CLR_MSIX_ONE_SHOT_VEC(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_TITAN_ASIC_ID_INITIAL_DEVICE_ID(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_TITAN_ASIC_ID_INITIAL_MAJOR_REVISION(val)   vxge_vBIT(val, 48, 8)
#define	VXGE_HW_TITAN_ASIC_ID_INITIAL_MINOR_REVISION(val)   vxge_vBIT(val, 56, 8)
#define	VXGE_HW_TITAN_GENERAL_INT_STATUS_MRPCIM_ALARM_INT   vxge_mBIT(0)
#define	VXGE_HW_TITAN_GENERAL_INT_STATUS_SRPCIM_ALARM_INT   vxge_mBIT(1)
#define	VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_ALARM_INT   vxge_mBIT(2)
#define	VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(val)   vxge_vBIT(val, 3, 17)
#define	VXGE_HW_TITAN_MASK_ALL_INT_ALARM   vxge_mBIT(7)
#define	VXGE_HW_TITAN_MASK_ALL_INT_TRAFFIC   vxge_mBIT(15)
#define	VXGE_HW_TIM_INT_STATUS0_TIM_INT_STATUS0(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_TIM_INT_MASK0_TIM_INT_MASK0(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_TIM_INT_STATUS1_TIM_INT_STATUS1(val)   vxge_vBIT(val, 0, 4)
#define	VXGE_HW_TIM_INT_MASK1_TIM_INT_MASK1(val)   vxge_vBIT(val, 0, 4)
#define	VXGE_HW_RTI_INT_STATUS_RTI_INT_STATUS(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_RTI_INT_MASK_RTI_INT_MASK(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_ADAPTER_STATUS_RTDMA_RTDMA_READY   vxge_mBIT(0)
#define	VXGE_HW_ADAPTER_STATUS_WRDMA_WRDMA_READY   vxge_mBIT(1)
#define	VXGE_HW_ADAPTER_STATUS_KDFC_KDFC_READY   vxge_mBIT(2)
#define	VXGE_HW_ADAPTER_STATUS_TPA_TMAC_BUF_EMPTY   vxge_mBIT(3)
#define	VXGE_HW_ADAPTER_STATUS_RDCTL_PIC_QUIESCENT   vxge_mBIT(4)
#define	VXGE_HW_ADAPTER_STATUS_XGMAC_NETWORK_FAULT   vxge_mBIT(5)
#define	VXGE_HW_ADAPTER_STATUS_ROCRC_OFFLOAD_QUIESCENT   vxge_mBIT(6)
#define	VXGE_HW_ADAPTER_STATUS_G3IF_FB_G3IF_FB_GDDR3_READY   vxge_mBIT(7)
#define	VXGE_HW_ADAPTER_STATUS_G3IF_CM_G3IF_CM_GDDR3_READY   vxge_mBIT(8)
#define	VXGE_HW_ADAPTER_STATUS_RIC_RIC_RUNNING   vxge_mBIT(9)
#define	VXGE_HW_ADAPTER_STATUS_CMG_C_PLL_IN_LOCK   vxge_mBIT(10)
#define	VXGE_HW_ADAPTER_STATUS_XGMAC_X_PLL_IN_LOCK   vxge_mBIT(11)
#define	VXGE_HW_ADAPTER_STATUS_FBIF_M_PLL_IN_LOCK   vxge_mBIT(12)
#define	VXGE_HW_ADAPTER_STATUS_PCC_PCC_IDLE(val)   vxge_vBIT(val, 24, 8)
#define	VXGE_HW_ADAPTER_STATUS_ROCRC_RC_PRC_QUIESCENT(val)   vxge_vBIT(val, 44, 8)
#define	VXGE_HW_GEN_CTRL_SPI_MRPCIM_WR_DIS   vxge_mBIT(0)
#define	VXGE_HW_GEN_CTRL_SPI_MRPCIM_RD_DIS   vxge_mBIT(1)
#define	VXGE_HW_GEN_CTRL_SPI_SRPCIM_WR_DIS   vxge_mBIT(2)
#define	VXGE_HW_GEN_CTRL_SPI_SRPCIM_RD_DIS   vxge_mBIT(3)
#define	VXGE_HW_GEN_CTRL_SPI_DEBUG_DIS   vxge_mBIT(4)
#define	VXGE_HW_GEN_CTRL_SPI_APP_LTSSM_TIMER_DIS   vxge_mBIT(5)
#define	VXGE_HW_GEN_CTRL_SPI_NOT_USED(val)   vxge_vBIT(val, 6, 4)
#define	VXGE_HW_ADAPTER_READY_ADAPTER_READY   vxge_mBIT(63)
#define	VXGE_HW_OUTSTANDING_READ_OUTSTANDING_READ(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_VPATH_RST_IN_PROG_VPATH_RST_IN_PROG(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_VPATH_REG_MODIFIED_VPATH_REG_MODIFIED(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_CP_RESET_IN_PROGRESS_CP_VPATH(n)   vxge_mBIT(n)
#define	VXGE_HW_XGMAC_READY_XMACJ_READY(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_FBIF_READY_FAU_READY(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_VPLANE_ASSIGNMENTS_VPLANE_ASSIGNMENTS(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_VPATH_ASSIGNMENTS_VPATH_ASSIGNMENTS(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_RESOURCE_ASSIGNMENTS_RESOURCE_ASSIGNMENTS(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_HOST_TYPE_ASSIGNMENTS_HOST_TYPE_ASSIGNMENTS(val)   vxge_vBIT(val, 5, 3)
#define	VXGE_HW_MAX_RESOURCE_ASSIGNMENTS_PCI_MAX_VPLANE(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_MAX_RESOURCE_ASSIGNMENTS_PCI_MAX_VPATHS(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_PF_VPATH_ASSIGNMENTS_PF_VPATH_ASSIGNMENTS(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_RTS_ACCESS_ICMP_EN(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_RTS_ACCESS_TCPSYN_EN(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_RTS_ACCESS_ZL4PYLD_EN(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_RTS_ACCESS_L4PRTCL_TCP_EN(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_RTS_ACCESS_L4PRTCL_UDP_EN(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_RTS_ACCESS_L4PRTCL_FLEX_EN(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_RTS_ACCESS_IPFRAG_EN(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_RESOURCE_NO_PFN_OR_VF   BIT(3)
#define	VXGE_HW_BARGRP_PF_OR_VF_BAR0_MASK_BARGRP_PF_OR_VF_BAR0_MASK(val)   vxge_vBIT(val, 2, 6)
#define	VXGE_HW_BARGRP_PF_OR_VF_BAR1_MASK_BARGRP_PF_OR_VF_BAR1_MASK(val)   vxge_vBIT(val, 2, 6)
#define	VXGE_HW_BARGRP_PF_OR_VF_BAR2_MASK_BARGRP_PF_OR_VF_BAR2_MASK(val)   vxge_vBIT(val, 2, 6)
#define	VXGE_HW_MSIXGRP_NO_TABLE_SIZE(val)   vxge_vBIT(val, 5, 11)
#define	VXGE_HW_G3FBCT_INT_STATUS_ERR_G3IF_INT   vxge_mBIT(0)
#define	VXGE_HW_G3FBCT_ERR_REG_G3IF_SM_ERR   vxge_mBIT(4)
#define	VXGE_HW_G3FBCT_ERR_REG_G3IF_GDDR3_DECC   vxge_mBIT(5)
#define	VXGE_HW_G3FBCT_ERR_REG_G3IF_GDDR3_U_DECC   vxge_mBIT(6)
#define	VXGE_HW_G3FBCT_ERR_REG_G3IF_CTRL_FIFO_DECC   vxge_mBIT(7)
#define	VXGE_HW_G3FBCT_ERR_REG_G3IF_GDDR3_SECC   vxge_mBIT(29)
#define	VXGE_HW_G3FBCT_ERR_REG_G3IF_GDDR3_U_SECC   vxge_mBIT(30)
#define	VXGE_HW_G3FBCT_ERR_REG_G3IF_CTRL_FIFO_SECC   vxge_mBIT(31)
#define	VXGE_HW_WRDMA_INT_STATUS_RC_ALARM_RC_INT   vxge_mBIT(0)
#define	VXGE_HW_WRDMA_INT_STATUS_RXDRM_SM_ERR_RXDRM_INT   vxge_mBIT(1)
#define	VXGE_HW_WRDMA_INT_STATUS_RXDCM_SM_ERR_RXDCM_SM_INT   vxge_mBIT(2)
#define	VXGE_HW_WRDMA_INT_STATUS_RXDWM_SM_ERR_RXDWM_INT   vxge_mBIT(3)
#define	VXGE_HW_WRDMA_INT_STATUS_RDA_ERR_RDA_INT   vxge_mBIT(6)
#define	VXGE_HW_WRDMA_INT_STATUS_RDA_ECC_DB_RDA_ECC_DB_INT   vxge_mBIT(8)
#define	VXGE_HW_WRDMA_INT_STATUS_RDA_ECC_SG_RDA_ECC_SG_INT   vxge_mBIT(9)
#define	VXGE_HW_WRDMA_INT_STATUS_FRF_ALARM_FRF_INT   vxge_mBIT(12)
#define	VXGE_HW_WRDMA_INT_STATUS_ROCRC_ALARM_ROCRC_INT   vxge_mBIT(13)
#define	VXGE_HW_WRDMA_INT_STATUS_WDE0_ALARM_WDE0_INT   vxge_mBIT(14)
#define	VXGE_HW_WRDMA_INT_STATUS_WDE1_ALARM_WDE1_INT   vxge_mBIT(15)
#define	VXGE_HW_WRDMA_INT_STATUS_WDE2_ALARM_WDE2_INT   vxge_mBIT(16)
#define	VXGE_HW_WRDMA_INT_STATUS_WDE3_ALARM_WDE3_INT   vxge_mBIT(17)
#define	VXGE_HW_RC_ALARM_REG_FTC_SM_ERR   vxge_mBIT(0)
#define	VXGE_HW_RC_ALARM_REG_FTC_SM_PHASE_ERR   vxge_mBIT(1)
#define	VXGE_HW_RC_ALARM_REG_BTDWM_SM_ERR   vxge_mBIT(2)
#define	VXGE_HW_RC_ALARM_REG_BTC_SM_ERR   vxge_mBIT(3)
#define	VXGE_HW_RC_ALARM_REG_BTDCM_SM_ERR   vxge_mBIT(4)
#define	VXGE_HW_RC_ALARM_REG_BTDRM_SM_ERR   vxge_mBIT(5)
#define	VXGE_HW_RC_ALARM_REG_RMM_RXD_RC_ECC_DB_ERR   vxge_mBIT(6)
#define	VXGE_HW_RC_ALARM_REG_RMM_RXD_RC_ECC_SG_ERR   vxge_mBIT(7)
#define	VXGE_HW_RC_ALARM_REG_RHS_RXD_RHS_ECC_DB_ERR   vxge_mBIT(8)
#define	VXGE_HW_RC_ALARM_REG_RHS_RXD_RHS_ECC_SG_ERR   vxge_mBIT(9)
#define	VXGE_HW_RC_ALARM_REG_RMM_SM_ERR   vxge_mBIT(10)
#define	VXGE_HW_RC_ALARM_REG_BTC_VPATH_MISMATCH_ERR   vxge_mBIT(12)
#define	VXGE_HW_RXDRM_SM_ERR_REG_PRC_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_RXDCM_SM_ERR_REG_PRC_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_RXDWM_SM_ERR_REG_PRC_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_RDA_ERR_REG_RDA_SM0_ERR_ALARM   vxge_mBIT(0)
#define	VXGE_HW_RDA_ERR_REG_RDA_MISC_ERR   vxge_mBIT(1)
#define	VXGE_HW_RDA_ERR_REG_RDA_PCIX_ERR   vxge_mBIT(2)
#define	VXGE_HW_RDA_ERR_REG_RDA_RXD_ECC_DB_ERR   vxge_mBIT(3)
#define	VXGE_HW_RDA_ERR_REG_RDA_FRM_ECC_DB_ERR   vxge_mBIT(4)
#define	VXGE_HW_RDA_ERR_REG_RDA_UQM_ECC_DB_ERR   vxge_mBIT(5)
#define	VXGE_HW_RDA_ERR_REG_RDA_IMM_ECC_DB_ERR   vxge_mBIT(6)
#define	VXGE_HW_RDA_ERR_REG_RDA_TIM_ECC_DB_ERR   vxge_mBIT(7)
#define	VXGE_HW_RDA_ECC_DB_REG_RDA_RXD_ERR(n)   vxge_mBIT(n)
#define	VXGE_HW_RDA_ECC_SG_REG_RDA_RXD_ERR(n)   vxge_mBIT(n)
#define	VXGE_HW_RQA_ERR_REG_RQA_SM_ERR_ALARM   vxge_mBIT(0)
#define	VXGE_HW_FRF_ALARM_REG_PRC_VP_FRF_SM_ERR(n)   vxge_mBIT(n)
#define	VXGE_HW_ROCRC_ALARM_REG_QCQ_QCC_BYP_ECC_DB   vxge_mBIT(0)
#define	VXGE_HW_ROCRC_ALARM_REG_QCQ_QCC_BYP_ECC_SG   vxge_mBIT(1)
#define	VXGE_HW_ROCRC_ALARM_REG_NOA_NMA_SM_ERR   vxge_mBIT(2)
#define	VXGE_HW_ROCRC_ALARM_REG_NOA_IMMM_ECC_DB   vxge_mBIT(3)
#define	VXGE_HW_ROCRC_ALARM_REG_NOA_IMMM_ECC_SG   vxge_mBIT(4)
#define	VXGE_HW_ROCRC_ALARM_REG_UDQ_UMQM_ECC_DB   vxge_mBIT(5)
#define	VXGE_HW_ROCRC_ALARM_REG_UDQ_UMQM_ECC_SG   vxge_mBIT(6)
#define	VXGE_HW_ROCRC_ALARM_REG_NOA_RCBM_ECC_DB   vxge_mBIT(11)
#define	VXGE_HW_ROCRC_ALARM_REG_NOA_RCBM_ECC_SG   vxge_mBIT(12)
#define	VXGE_HW_ROCRC_ALARM_REG_QCQ_MULTI_EGB_RSVD_ERR   vxge_mBIT(13)
#define	VXGE_HW_ROCRC_ALARM_REG_QCQ_MULTI_EGB_OWN_ERR   vxge_mBIT(14)
#define	VXGE_HW_ROCRC_ALARM_REG_QCQ_MULTI_BYP_OWN_ERR   vxge_mBIT(15)
#define	VXGE_HW_ROCRC_ALARM_REG_QCQ_OWN_NOT_ASSIGNED_ERR   vxge_mBIT(16)
#define	VXGE_HW_ROCRC_ALARM_REG_QCQ_OWN_RSVD_SYNC_ERR   vxge_mBIT(17)
#define	VXGE_HW_ROCRC_ALARM_REG_QCQ_LOST_EGB_ERR   vxge_mBIT(18)
#define	VXGE_HW_ROCRC_ALARM_REG_RCQ_BYPQ0_OVERFLOW   vxge_mBIT(19)
#define	VXGE_HW_ROCRC_ALARM_REG_RCQ_BYPQ1_OVERFLOW   vxge_mBIT(20)
#define	VXGE_HW_ROCRC_ALARM_REG_RCQ_BYPQ2_OVERFLOW   vxge_mBIT(21)
#define	VXGE_HW_ROCRC_ALARM_REG_NOA_WCT_CMD_FIFO_ERR   vxge_mBIT(22)
#define	VXGE_HW_WDE0_ALARM_REG_WDE0_DCC_SM_ERR   vxge_mBIT(0)
#define	VXGE_HW_WDE0_ALARM_REG_WDE0_PRM_SM_ERR   vxge_mBIT(1)
#define	VXGE_HW_WDE0_ALARM_REG_WDE0_CP_SM_ERR   vxge_mBIT(2)
#define	VXGE_HW_WDE0_ALARM_REG_WDE0_CP_CMD_ERR   vxge_mBIT(3)
#define	VXGE_HW_WDE0_ALARM_REG_WDE0_PCR_SM_ERR   vxge_mBIT(4)
#define	VXGE_HW_WDE1_ALARM_REG_WDE1_DCC_SM_ERR   vxge_mBIT(0)
#define	VXGE_HW_WDE1_ALARM_REG_WDE1_PRM_SM_ERR   vxge_mBIT(1)
#define	VXGE_HW_WDE1_ALARM_REG_WDE1_CP_SM_ERR   vxge_mBIT(2)
#define	VXGE_HW_WDE1_ALARM_REG_WDE1_CP_CMD_ERR   vxge_mBIT(3)
#define	VXGE_HW_WDE1_ALARM_REG_WDE1_PCR_SM_ERR   vxge_mBIT(4)
#define	VXGE_HW_WDE2_ALARM_REG_WDE2_DCC_SM_ERR   vxge_mBIT(0)
#define	VXGE_HW_WDE2_ALARM_REG_WDE2_PRM_SM_ERR   vxge_mBIT(1)
#define	VXGE_HW_WDE2_ALARM_REG_WDE2_CP_SM_ERR   vxge_mBIT(2)
#define	VXGE_HW_WDE2_ALARM_REG_WDE2_CP_CMD_ERR   vxge_mBIT(3)
#define	VXGE_HW_WDE2_ALARM_REG_WDE2_PCR_SM_ERR   vxge_mBIT(4)
#define	VXGE_HW_WDE3_ALARM_REG_WDE3_DCC_SM_ERR   vxge_mBIT(0)
#define	VXGE_HW_WDE3_ALARM_REG_WDE3_PRM_SM_ERR   vxge_mBIT(1)
#define	VXGE_HW_WDE3_ALARM_REG_WDE3_CP_SM_ERR   vxge_mBIT(2)
#define	VXGE_HW_WDE3_ALARM_REG_WDE3_CP_CMD_ERR   vxge_mBIT(3)
#define	VXGE_HW_WDE3_ALARM_REG_WDE3_PCR_SM_ERR   vxge_mBIT(4)
#define	VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_0(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_1(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_2(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_3(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_4(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_5(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_6(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_7(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_1_RX_W_PRIORITY_SS_8(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_1_RX_W_PRIORITY_SS_9(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_1_RX_W_PRIORITY_SS_10(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_1_RX_W_PRIORITY_SS_11(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_1_RX_W_PRIORITY_SS_12(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_1_RX_W_PRIORITY_SS_13(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_1_RX_W_PRIORITY_SS_14(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_1_RX_W_PRIORITY_SS_15(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_2_RX_W_PRIORITY_SS_16(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_2_RX_W_PRIORITY_SS_17(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_2_RX_W_PRIORITY_SS_18(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_2_RX_W_PRIORITY_SS_19(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_2_RX_W_PRIORITY_SS_20(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_2_RX_W_PRIORITY_SS_21(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_2_RX_W_PRIORITY_SS_22(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_2_RX_W_PRIORITY_SS_23(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_3_RX_W_PRIORITY_SS_24(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_3_RX_W_PRIORITY_SS_25(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_3_RX_W_PRIORITY_SS_26(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_3_RX_W_PRIORITY_SS_27(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_3_RX_W_PRIORITY_SS_28(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_3_RX_W_PRIORITY_SS_29(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_3_RX_W_PRIORITY_SS_30(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_3_RX_W_PRIORITY_SS_31(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_4_RX_W_PRIORITY_SS_32(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_4_RX_W_PRIORITY_SS_33(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_4_RX_W_PRIORITY_SS_34(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_4_RX_W_PRIORITY_SS_35(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_4_RX_W_PRIORITY_SS_36(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_4_RX_W_PRIORITY_SS_37(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_4_RX_W_PRIORITY_SS_38(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_4_RX_W_PRIORITY_SS_39(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_5_RX_W_PRIORITY_SS_40(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_5_RX_W_PRIORITY_SS_41(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_5_RX_W_PRIORITY_SS_42(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_5_RX_W_PRIORITY_SS_43(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_5_RX_W_PRIORITY_SS_44(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_5_RX_W_PRIORITY_SS_45(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_5_RX_W_PRIORITY_SS_46(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_5_RX_W_PRIORITY_SS_47(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_6_RX_W_PRIORITY_SS_48(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_6_RX_W_PRIORITY_SS_49(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_6_RX_W_PRIORITY_SS_50(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_6_RX_W_PRIORITY_SS_51(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_6_RX_W_PRIORITY_SS_52(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_6_RX_W_PRIORITY_SS_53(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_6_RX_W_PRIORITY_SS_54(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_6_RX_W_PRIORITY_SS_55(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_7_RX_W_PRIORITY_SS_56(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_7_RX_W_PRIORITY_SS_57(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_7_RX_W_PRIORITY_SS_58(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_7_RX_W_PRIORITY_SS_59(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_7_RX_W_PRIORITY_SS_60(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_7_RX_W_PRIORITY_SS_61(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_7_RX_W_PRIORITY_SS_62(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_7_RX_W_PRIORITY_SS_63(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_8_RX_W_PRIORITY_SS_64(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_8_RX_W_PRIORITY_SS_65(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_8_RX_W_PRIORITY_SS_66(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_8_RX_W_PRIORITY_SS_67(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_8_RX_W_PRIORITY_SS_68(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_8_RX_W_PRIORITY_SS_69(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_8_RX_W_PRIORITY_SS_70(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_8_RX_W_PRIORITY_SS_71(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_9_RX_W_PRIORITY_SS_72(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_9_RX_W_PRIORITY_SS_73(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_9_RX_W_PRIORITY_SS_74(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_9_RX_W_PRIORITY_SS_75(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_9_RX_W_PRIORITY_SS_76(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_9_RX_W_PRIORITY_SS_77(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_9_RX_W_PRIORITY_SS_78(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_9_RX_W_PRIORITY_SS_79(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_10_RX_W_PRIORITY_SS_80(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_10_RX_W_PRIORITY_SS_81(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_10_RX_W_PRIORITY_SS_82(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_10_RX_W_PRIORITY_SS_83(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_10_RX_W_PRIORITY_SS_84(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_10_RX_W_PRIORITY_SS_85(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_10_RX_W_PRIORITY_SS_86(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_10_RX_W_PRIORITY_SS_87(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_11_RX_W_PRIORITY_SS_88(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_11_RX_W_PRIORITY_SS_89(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_11_RX_W_PRIORITY_SS_90(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_11_RX_W_PRIORITY_SS_91(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_11_RX_W_PRIORITY_SS_92(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_11_RX_W_PRIORITY_SS_93(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_11_RX_W_PRIORITY_SS_94(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_11_RX_W_PRIORITY_SS_95(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_12_RX_W_PRIORITY_SS_96(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_12_RX_W_PRIORITY_SS_97(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_12_RX_W_PRIORITY_SS_98(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_12_RX_W_PRIORITY_SS_99(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_12_RX_W_PRIORITY_SS_100(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_12_RX_W_PRIORITY_SS_101(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_12_RX_W_PRIORITY_SS_102(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_12_RX_W_PRIORITY_SS_103(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_13_RX_W_PRIORITY_SS_104(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_13_RX_W_PRIORITY_SS_105(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_13_RX_W_PRIORITY_SS_106(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_13_RX_W_PRIORITY_SS_107(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_13_RX_W_PRIORITY_SS_108(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_13_RX_W_PRIORITY_SS_109(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_13_RX_W_PRIORITY_SS_110(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_13_RX_W_PRIORITY_SS_111(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_14_RX_W_PRIORITY_SS_112(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_14_RX_W_PRIORITY_SS_113(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_14_RX_W_PRIORITY_SS_114(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_14_RX_W_PRIORITY_SS_115(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_14_RX_W_PRIORITY_SS_116(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_14_RX_W_PRIORITY_SS_117(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_14_RX_W_PRIORITY_SS_118(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_14_RX_W_PRIORITY_SS_119(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_15_RX_W_PRIORITY_SS_120(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_15_RX_W_PRIORITY_SS_121(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_15_RX_W_PRIORITY_SS_122(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_15_RX_W_PRIORITY_SS_123(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_15_RX_W_PRIORITY_SS_124(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_15_RX_W_PRIORITY_SS_125(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_15_RX_W_PRIORITY_SS_126(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_15_RX_W_PRIORITY_SS_127(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_16_RX_W_PRIORITY_SS_128(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_16_RX_W_PRIORITY_SS_129(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_16_RX_W_PRIORITY_SS_130(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_16_RX_W_PRIORITY_SS_131(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_16_RX_W_PRIORITY_SS_132(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_16_RX_W_PRIORITY_SS_133(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_16_RX_W_PRIORITY_SS_134(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_16_RX_W_PRIORITY_SS_135(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_17_RX_W_PRIORITY_SS_136(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_17_RX_W_PRIORITY_SS_137(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_17_RX_W_PRIORITY_SS_138(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_17_RX_W_PRIORITY_SS_139(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_17_RX_W_PRIORITY_SS_140(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_17_RX_W_PRIORITY_SS_141(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_17_RX_W_PRIORITY_SS_142(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_17_RX_W_PRIORITY_SS_143(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_18_RX_W_PRIORITY_SS_144(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_18_RX_W_PRIORITY_SS_145(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_18_RX_W_PRIORITY_SS_146(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_18_RX_W_PRIORITY_SS_147(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_18_RX_W_PRIORITY_SS_148(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_18_RX_W_PRIORITY_SS_149(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_18_RX_W_PRIORITY_SS_150(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_18_RX_W_PRIORITY_SS_151(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_19_RX_W_PRIORITY_SS_152(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_19_RX_W_PRIORITY_SS_153(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_19_RX_W_PRIORITY_SS_154(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_19_RX_W_PRIORITY_SS_155(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_19_RX_W_PRIORITY_SS_156(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_19_RX_W_PRIORITY_SS_157(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_19_RX_W_PRIORITY_SS_158(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_19_RX_W_PRIORITY_SS_159(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_20_RX_W_PRIORITY_SS_160(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_20_RX_W_PRIORITY_SS_161(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_20_RX_W_PRIORITY_SS_162(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_20_RX_W_PRIORITY_SS_163(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_20_RX_W_PRIORITY_SS_164(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_20_RX_W_PRIORITY_SS_165(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_20_RX_W_PRIORITY_SS_166(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_20_RX_W_PRIORITY_SS_167(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_21_RX_W_PRIORITY_SS_168(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_21_RX_W_PRIORITY_SS_169(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_W_ROUND_ROBIN_21_RX_W_PRIORITY_SS_170(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_WRR_RING_SERVICE_STATES   171
#define	VXGE_HW_WRR_RING_COUNT   22
#define	VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_0(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_1(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_2(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_3(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_4(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_5(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_6(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_7(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_8(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_9(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_10(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_11(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_12(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_13(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_14(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_15(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_QUEUE_PRIORITY_2_RX_Q_NUMBER_16(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_REPLICATION_QUEUE_PRIORITY_REPLICATION_QUEUE_PRIORITY(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_QUEUE_SELECT_NUMBER(n)   vxge_mBIT(n)
#define	VXGE_HW_RX_QUEUE_SELECT_ENABLE_CODE   vxge_mBIT(15)
#define	VXGE_HW_RX_QUEUE_SELECT_ENABLE_HIERARCHICAL_PRTY   vxge_mBIT(23)
#define	VXGE_HW_RQA_VPBP_CTRL_WR_XON_DIS   vxge_mBIT(15)
#define	VXGE_HW_RQA_VPBP_CTRL_ROCRC_DIS   vxge_mBIT(23)
#define	VXGE_HW_RQA_VPBP_CTRL_TXPE_DIS   vxge_mBIT(31)
#define	VXGE_HW_RX_MULTI_CAST_CTRL_TIME_OUT_DIS   vxge_mBIT(0)
#define	VXGE_HW_RX_MULTI_CAST_CTRL_FRM_DROP_DIS   vxge_mBIT(1)
#define	VXGE_HW_RX_MULTI_CAST_CTRL_NO_RXD_TIME_OUT_CNT(val)   vxge_vBIT(val, 2, 30)
#define	VXGE_HW_RX_MULTI_CAST_CTRL_TIME_OUT_CNT(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_WDE_PRM_CTRL_SPAV_THRESHOLD(val)   vxge_vBIT(val, 2, 10)
#define	VXGE_HW_WDE_PRM_CTRL_SPLIT_THRESHOLD(val)   vxge_vBIT(val, 18, 14)
#define	VXGE_HW_WDE_PRM_CTRL_SPLIT_ON_1ST_ROW   vxge_mBIT(32)
#define	VXGE_HW_WDE_PRM_CTRL_SPLIT_ON_ROW_BNDRY   vxge_mBIT(33)
#define	VXGE_HW_WDE_PRM_CTRL_FB_ROW_SIZE(val)   vxge_vBIT(val, 46, 2)
#define	VXGE_HW_NOA_CTRL_FRM_PRTY_QUOTA(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_NOA_CTRL_NON_FRM_PRTY_QUOTA(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_NOA_CTRL_IGNORE_KDFC_IF_STATUS   vxge_mBIT(16)
#define	VXGE_HW_NOA_CTRL_MAX_JOB_CNT_FOR_WDE0(val)   vxge_vBIT(val, 37, 4)
#define	VXGE_HW_NOA_CTRL_MAX_JOB_CNT_FOR_WDE1(val)   vxge_vBIT(val, 45, 4)
#define	VXGE_HW_NOA_CTRL_MAX_JOB_CNT_FOR_WDE2(val)   vxge_vBIT(val, 53, 4)
#define	VXGE_HW_NOA_CTRL_MAX_JOB_CNT_FOR_WDE3(val)   vxge_vBIT(val, 60, 4)
#define	VXGE_HW_PHASE_CFG_QCC_WR_PHASE_EN   vxge_mBIT(0)
#define	VXGE_HW_PHASE_CFG_QCC_RD_PHASE_EN   vxge_mBIT(3)
#define	VXGE_HW_PHASE_CFG_IMMM_WR_PHASE_EN   vxge_mBIT(7)
#define	VXGE_HW_PHASE_CFG_IMMM_RD_PHASE_EN   vxge_mBIT(11)
#define	VXGE_HW_PHASE_CFG_UMQM_WR_PHASE_EN   vxge_mBIT(15)
#define	VXGE_HW_PHASE_CFG_UMQM_RD_PHASE_EN   vxge_mBIT(19)
#define	VXGE_HW_PHASE_CFG_RCBM_WR_PHASE_EN   vxge_mBIT(23)
#define	VXGE_HW_PHASE_CFG_RCBM_RD_PHASE_EN   vxge_mBIT(27)
#define	VXGE_HW_PHASE_CFG_RXD_RC_WR_PHASE_EN   vxge_mBIT(31)
#define	VXGE_HW_PHASE_CFG_RXD_RC_RD_PHASE_EN   vxge_mBIT(35)
#define	VXGE_HW_PHASE_CFG_RXD_RHS_WR_PHASE_EN   vxge_mBIT(39)
#define	VXGE_HW_PHASE_CFG_RXD_RHS_RD_PHASE_EN   vxge_mBIT(43)
#define	VXGE_HW_RCQ_BYPQ_CFG_OVERFLOW_THRESHOLD(val)   vxge_vBIT(val, 10, 22)
#define	VXGE_HW_RCQ_BYPQ_CFG_BYP_ON_THRESHOLD(val)   vxge_vBIT(val, 39, 9)
#define	VXGE_HW_RCQ_BYPQ_CFG_BYP_OFF_THRESHOLD(val)   vxge_vBIT(val, 55, 9)
#define	VXGE_HW_DOORBELL_INT_STATUS_KDFC_ERR_REG_TXDMA_KDFC_INT   vxge_mBIT(7)
#define	VXGE_HW_DOORBELL_INT_STATUS_USDC_ERR_REG_TXDMA_USDC_INT   vxge_mBIT(15)
#define	VXGE_HW_KDFC_ERR_REG_KDFC_KDFC_ECC_SG_ERR   vxge_mBIT(7)
#define	VXGE_HW_KDFC_ERR_REG_KDFC_KDFC_ECC_DB_ERR   vxge_mBIT(15)
#define	VXGE_HW_KDFC_ERR_REG_KDFC_KDFC_SM_ERR_ALARM   vxge_mBIT(23)
#define	VXGE_HW_KDFC_ERR_REG_KDFC_KDFC_MISC_ERR_1   vxge_mBIT(32)
#define	VXGE_HW_KDFC_ERR_REG_KDFC_KDFC_PCIX_ERR   vxge_mBIT(39)
#define	VXGE_HW_KDFC_ERR_REG_ALARM_KDFC_KDFC_ECC_SG_ERR   vxge_mBIT(7)
#define	VXGE_HW_KDFC_ERR_REG_ALARM_KDFC_KDFC_ECC_DB_ERR   vxge_mBIT(15)
#define	VXGE_HW_KDFC_ERR_REG_ALARM_KDFC_KDFC_SM_ERR_ALARM   vxge_mBIT(23)
#define	VXGE_HW_KDFC_ERR_REG_ALARM_KDFC_KDFC_MISC_ERR_1   vxge_mBIT(32)
#define	VXGE_HW_KDFC_ERR_REG_ALARM_KDFC_KDFC_PCIX_ERR   vxge_mBIT(39)
#define	VXGE_HW_KDFC_VP_PARTITION_0_ENABLE   vxge_mBIT(0)
#define	VXGE_HW_KDFC_VP_PARTITION_0_NUMBER_0(val)   vxge_vBIT(val, 5, 3)
#define	VXGE_HW_KDFC_VP_PARTITION_0_LENGTH_0(val)   vxge_vBIT(val, 17, 15)
#define	VXGE_HW_KDFC_VP_PARTITION_0_NUMBER_1(val)   vxge_vBIT(val, 37, 3)
#define	VXGE_HW_KDFC_VP_PARTITION_0_LENGTH_1(val)   vxge_vBIT(val, 49, 15)
#define	VXGE_HW_KDFC_VP_PARTITION_1_NUMBER_2(val)   vxge_vBIT(val, 5, 3)
#define	VXGE_HW_KDFC_VP_PARTITION_1_LENGTH_2(val)   vxge_vBIT(val, 17, 15)
#define	VXGE_HW_KDFC_VP_PARTITION_1_NUMBER_3(val)   vxge_vBIT(val, 37, 3)
#define	VXGE_HW_KDFC_VP_PARTITION_1_LENGTH_3(val)   vxge_vBIT(val, 49, 15)
#define	VXGE_HW_KDFC_VP_PARTITION_2_NUMBER_4(val)   vxge_vBIT(val, 5, 3)
#define	VXGE_HW_KDFC_VP_PARTITION_2_LENGTH_4(val)   vxge_vBIT(val, 17, 15)
#define	VXGE_HW_KDFC_VP_PARTITION_2_NUMBER_5(val)   vxge_vBIT(val, 37, 3)
#define	VXGE_HW_KDFC_VP_PARTITION_2_LENGTH_5(val)   vxge_vBIT(val, 49, 15)
#define	VXGE_HW_KDFC_VP_PARTITION_3_NUMBER_6(val)   vxge_vBIT(val, 5, 3)
#define	VXGE_HW_KDFC_VP_PARTITION_3_LENGTH_6(val)   vxge_vBIT(val, 17, 15)
#define	VXGE_HW_KDFC_VP_PARTITION_3_NUMBER_7(val)   vxge_vBIT(val, 37, 3)
#define	VXGE_HW_KDFC_VP_PARTITION_3_LENGTH_7(val)   vxge_vBIT(val, 49, 15)
#define	VXGE_HW_KDFC_VP_PARTITION_4_LENGTH_8(val)   vxge_vBIT(val, 17, 15)
#define	VXGE_HW_KDFC_VP_PARTITION_4_LENGTH_9(val)   vxge_vBIT(val, 49, 15)
#define	VXGE_HW_KDFC_VP_PARTITION_5_LENGTH_10(val)   vxge_vBIT(val, 17, 15)
#define	VXGE_HW_KDFC_VP_PARTITION_5_LENGTH_11(val)   vxge_vBIT(val, 49, 15)
#define	VXGE_HW_KDFC_VP_PARTITION_6_LENGTH_12(val)   vxge_vBIT(val, 17, 15)
#define	VXGE_HW_KDFC_VP_PARTITION_6_LENGTH_13(val)   vxge_vBIT(val, 49, 15)
#define	VXGE_HW_KDFC_VP_PARTITION_7_LENGTH_14(val)   vxge_vBIT(val, 17, 15)
#define	VXGE_HW_KDFC_VP_PARTITION_7_LENGTH_15(val)   vxge_vBIT(val, 49, 15)
#define	VXGE_HW_KDFC_VP_PARTITION_8_LENGTH_16(val)   vxge_vBIT(val, 17, 15)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_0(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_1(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_2(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_3(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_4(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_5(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_6(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_7(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_20_NUMBER_0(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_20_NUMBER_1(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_20_NUMBER_2(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_20_NUMBER_3(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_20_NUMBER_4(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_20_NUMBER_5(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_20_NUMBER_6(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_20_NUMBER_7(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_WRR_FIFO_COUNT   20
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_40_NUMBER_0(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_40_NUMBER_1(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_40_NUMBER_2(val)   vxge_vBIT(val, 19, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_40_NUMBER_3(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_40_NUMBER_4(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_40_NUMBER_5(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_40_NUMBER_6(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_KDFC_W_ROUND_ROBIN_40_NUMBER_7(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_0(val)   vxge_vBIT(val, 6, 2)
#define	VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_1(val)   vxge_vBIT(val, 14, 2)
#define	VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_2(val)   vxge_vBIT(val, 22, 2)
#define	VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_3(val)   vxge_vBIT(val, 30, 2)
#define	VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_4(val)   vxge_vBIT(val, 38, 2)
#define	VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_5(val)   vxge_vBIT(val, 46, 2)
#define	VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_6(val)   vxge_vBIT(val, 54, 2)
#define	VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_7(val)   vxge_vBIT(val, 62, 2)
#define	VXGE_HW_KDFC_ENTRY_TYPE_SEL_1_NUMBER_8(val)   vxge_vBIT(val, 6, 2)
#define	VXGE_HW_KDFC_FIFO_0_CTRL_WRR_NUMBER(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_WEIGHTED_RR_SERVICE_STATES   176
#define	VXGE_HW_WRR_FIFO_SERVICE_STATES   153
#define	VXGE_HW_KDFC_FIFO_17_CTRL_WRR_NUMBER(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_RXMAC_INT_STATUS_RXMAC_GEN_ERR_RXMAC_GEN_INT   vxge_mBIT(3)
#define	VXGE_HW_RXMAC_INT_STATUS_RXMAC_ECC_ERR_RXMAC_ECC_INT   vxge_mBIT(7)
#define	VXGE_HW_RXMAC_INT_STATUS_RXMAC_VARIOUS_ERR_RXMAC_VARIOUS_INT   vxge_mBIT(11)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RMAC_PORT0_RMAC_RTS_PART_SG_ERR(val)   vxge_vBIT(val, 0, 4)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RMAC_PORT0_RMAC_RTS_PART_DB_ERR(val)   vxge_vBIT(val, 4, 4)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RMAC_PORT1_RMAC_RTS_PART_SG_ERR(val)   vxge_vBIT(val, 8, 4)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RMAC_PORT1_RMAC_RTS_PART_DB_ERR(val)   vxge_vBIT(val, 12, 4)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RMAC_PORT2_RMAC_RTS_PART_SG_ERR(val)   vxge_vBIT(val, 16, 4)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RMAC_PORT2_RMAC_RTS_PART_DB_ERR(val)   vxge_vBIT(val, 20, 4)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_DA_LKP_PRT0_SG_ERR(val)   vxge_vBIT(val, 24, 2)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_DA_LKP_PRT0_DB_ERR(val)   vxge_vBIT(val, 26, 2)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_DA_LKP_PRT1_SG_ERR(val)   vxge_vBIT(val, 28, 2)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_DA_LKP_PRT1_DB_ERR(val)   vxge_vBIT(val, 30, 2)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_VID_LKP_SG_ERR   vxge_mBIT(32)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_VID_LKP_DB_ERR   vxge_mBIT(33)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_PN_LKP_PRT0_SG_ERR   vxge_mBIT(34)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_PN_LKP_PRT0_DB_ERR   vxge_mBIT(35)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_PN_LKP_PRT1_SG_ERR   vxge_mBIT(36)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_PN_LKP_PRT1_DB_ERR   vxge_mBIT(37)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_PN_LKP_PRT2_SG_ERR   vxge_mBIT(38)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_PN_LKP_PRT2_DB_ERR   vxge_mBIT(39)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_RTH_MASK_SG_ERR(val)   vxge_vBIT(val, 40, 7)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_RTH_MASK_DB_ERR(val)   vxge_vBIT(val, 47, 7)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_RTH_LKP_SG_ERR(val)   vxge_vBIT(val, 54, 3)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_RTH_LKP_DB_ERR(val)   vxge_vBIT(val, 57, 3)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_DS_LKP_SG_ERR   vxge_mBIT(60)
#define	VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_DS_LKP_DB_ERR   vxge_mBIT(61)
#define	VXGE_HW_RXMAC_VARIOUS_ERR_REG_RMAC_RMAC_PORT0_FSM_ERR   vxge_mBIT(0)
#define	VXGE_HW_RXMAC_VARIOUS_ERR_REG_RMAC_RMAC_PORT1_FSM_ERR   vxge_mBIT(1)
#define	VXGE_HW_RXMAC_VARIOUS_ERR_REG_RMAC_RMAC_PORT2_FSM_ERR   vxge_mBIT(2)
#define	VXGE_HW_RXMAC_VARIOUS_ERR_REG_RMACJ_RMACJ_FSM_ERR   vxge_mBIT(3)
#define	VXGE_HW_RXMAC_GEN_CFG_SCALE_RMAC_UTIL   vxge_mBIT(11)
#define	VXGE_HW_RXMAC_AUTHORIZE_ALL_ADDR_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_RXMAC_AUTHORIZE_ALL_VID_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_CRATE_THR0(val)   vxge_vBIT(val, 0, 4)
#define	VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_CRATE_THR1(val)   vxge_vBIT(val, 4, 4)
#define	VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_CRATE_THR2(val)   vxge_vBIT(val, 8, 4)
#define	VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_CRATE_THR3(val)   vxge_vBIT(val, 12, 4)
#define	VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_FRATE_THR0(val)   vxge_vBIT(val, 16, 4)
#define	VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_FRATE_THR1(val)   vxge_vBIT(val, 20, 4)
#define	VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_FRATE_THR2(val)   vxge_vBIT(val, 24, 4)
#define	VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_FRATE_THR3(val)   vxge_vBIT(val, 28, 4)
#define	VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_TRICKLE_EN   vxge_mBIT(35)
#define	VXGE_HW_RXMAC_CFG0_PORT_RMAC_EN   vxge_mBIT(3)
#define	VXGE_HW_RXMAC_CFG0_PORT_STRIP_FCS   vxge_mBIT(7)
#define	VXGE_HW_RXMAC_CFG0_PORT_DISCARD_PFRM   vxge_mBIT(11)
#define	VXGE_HW_RXMAC_CFG0_PORT_IGNORE_FCS_ERR   vxge_mBIT(15)
#define	VXGE_HW_RXMAC_CFG0_PORT_IGNORE_LONG_ERR   vxge_mBIT(19)
#define	VXGE_HW_RXMAC_CFG0_PORT_IGNORE_USIZED_ERR   vxge_mBIT(23)
#define	VXGE_HW_RXMAC_CFG0_PORT_IGNORE_LEN_MISMATCH   vxge_mBIT(27)
#define	VXGE_HW_RXMAC_CFG0_PORT_MAX_PYLD_LEN(val)   vxge_vBIT(val, 50, 14)
#define	VXGE_HW_RXMAC_CFG2_PORT_PROM_EN   vxge_mBIT(3)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_GEN_EN   vxge_mBIT(3)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_RCV_EN   vxge_mBIT(7)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_ACCEL_SEND(val)   vxge_vBIT(val, 9, 3)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_DUAL_THR   vxge_mBIT(15)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_HIGH_PTIME(val)   vxge_vBIT(val, 20, 16)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_IGNORE_PF_FCS_ERR   vxge_mBIT(39)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_IGNORE_PF_LEN_ERR   vxge_mBIT(43)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_LIMITER_EN   vxge_mBIT(47)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_MAX_LIMIT(val)   vxge_vBIT(val, 48, 8)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_PERMIT_RATEMGMT_CTRL   vxge_mBIT(59)
#define	VXGE_HW_RXMAC_RED_CFG0_PORT_RED_EN_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_RXMAC_RED_CFG1_PORT_FINE_EN   vxge_mBIT(3)
#define	VXGE_HW_RXMAC_RED_CFG1_PORT_RED_EN_REPL_QUEUE   vxge_mBIT(11)
#define	VXGE_HW_RXMAC_RED_CFG2_PORT_TRICKLE_EN_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_RXMAC_LINK_UTIL_PORT_RMAC_RMAC_UTILIZATION(val)   vxge_vBIT(val, 1, 7)
#define	VXGE_HW_RXMAC_LINK_UTIL_PORT_RMAC_UTIL_CFG(val)   vxge_vBIT(val, 8, 4)
#define	VXGE_HW_RXMAC_LINK_UTIL_PORT_RMAC_RMAC_FRAC_UTIL(val)   vxge_vBIT(val, 12, 4)
#define	VXGE_HW_RXMAC_LINK_UTIL_PORT_RMAC_PKT_WEIGHT(val)   vxge_vBIT(val, 16, 4)
#define	VXGE_HW_RXMAC_LINK_UTIL_PORT_RMAC_RMAC_SCALE_FACTOR   vxge_mBIT(23)
#define	VXGE_HW_RXMAC_STATUS_PORT_RMAC_RX_FRM_RCVD   vxge_mBIT(3)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_IGNORE_FRAME_ERR   vxge_mBIT(3)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_SUPPORT_SNAP_AB_N   vxge_mBIT(7)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_SEARCH_FOR_HAO   vxge_mBIT(18)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_SUPPORT_MOBILE_IPV6_HDRS   vxge_mBIT(19)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_IPV6_STOP_SEARCHING   vxge_mBIT(23)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_NO_PS_IF_UNKNOWN   vxge_mBIT(27)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_SEARCH_FOR_ETYPE   vxge_mBIT(35)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_TOSS_ANY_FRM_IF_L3_CSUM_ERR   vxge_mBIT(39)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_TOSS_OFFLD_FRM_IF_L3_CSUM_ERR   vxge_mBIT(43)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_TOSS_ANY_FRM_IF_L4_CSUM_ERR   vxge_mBIT(47)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_TOSS_OFFLD_FRM_IF_L4_CSUM_ERR   vxge_mBIT(51)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_TOSS_ANY_FRM_IF_RPA_ERR   vxge_mBIT(55)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_TOSS_OFFLD_FRM_IF_RPA_ERR   vxge_mBIT(59)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_JUMBO_SNAP_EN   vxge_mBIT(63)
#define	VXGE_HW_RXMAC_RX_PA_CFG1_REPL_IPV4_TCP_INCL_PH   vxge_mBIT(3)
#define	VXGE_HW_RXMAC_RX_PA_CFG1_REPL_IPV6_TCP_INCL_PH   vxge_mBIT(7)
#define	VXGE_HW_RXMAC_RX_PA_CFG1_REPL_IPV4_UDP_INCL_PH   vxge_mBIT(11)
#define	VXGE_HW_RXMAC_RX_PA_CFG1_REPL_IPV6_UDP_INCL_PH   vxge_mBIT(15)
#define	VXGE_HW_RXMAC_RX_PA_CFG1_REPL_L4_INCL_CF   vxge_mBIT(19)
#define	VXGE_HW_RXMAC_RX_PA_CFG1_REPL_STRIP_VLAN_TAG   vxge_mBIT(23)
#define	VXGE_HW_RTS_MGR_CFG0_RTS_DP_SP_PRIORITY   vxge_mBIT(3)
#define	VXGE_HW_RTS_MGR_CFG0_FLEX_L4PRTCL_VALUE(val)   vxge_vBIT(val, 24, 8)
#define	VXGE_HW_RTS_MGR_CFG0_ICMP_TRASH   vxge_mBIT(35)
#define	VXGE_HW_RTS_MGR_CFG0_TCPSYN_TRASH   vxge_mBIT(39)
#define	VXGE_HW_RTS_MGR_CFG0_ZL4PYLD_TRASH   vxge_mBIT(43)
#define	VXGE_HW_RTS_MGR_CFG0_L4PRTCL_TCP_TRASH   vxge_mBIT(47)
#define	VXGE_HW_RTS_MGR_CFG0_L4PRTCL_UDP_TRASH   vxge_mBIT(51)
#define	VXGE_HW_RTS_MGR_CFG0_L4PRTCL_FLEX_TRASH   vxge_mBIT(55)
#define	VXGE_HW_RTS_MGR_CFG0_IPFRAG_TRASH   vxge_mBIT(59)
#define	VXGE_HW_RTS_MGR_CFG1_DA_ACTIVE_TABLE   vxge_mBIT(3)
#define	VXGE_HW_RTS_MGR_CFG1_PN_ACTIVE_TABLE   vxge_mBIT(7)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_ETYPE(val)   vxge_vBIT(val, 5, 3)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_ICMP_TCPSYN(val)   vxge_vBIT(val, 9, 3)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_L4PN(val)   vxge_vBIT(val, 13, 3)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_RANGE_L4PN(val)   vxge_vBIT(val, 17, 3)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_RTH_IT(val)   vxge_vBIT(val, 21, 3)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_DS(val)   vxge_vBIT(val, 25, 3)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_QOS(val)   vxge_vBIT(val, 29, 3)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_ZL4PYLD(val)   vxge_vBIT(val, 33, 3)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_L4PRTCL(val)   vxge_vBIT(val, 37, 3)
#define	VXGE_HW_RTS_MGR_DA_PAUSE_CFG_VPATH_VECTOR(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_RTS_MGR_DA_SLOW_PROTO_CFG_VPATH_VECTOR(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_DBG_STAT_RX_ANY_FRMS_PORT0_RX_ANY_FRMS(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_DBG_STAT_RX_ANY_FRMS_PORT1_RX_ANY_FRMS(val)   vxge_vBIT(val, 8, 8)
#define	VXGE_HW_DBG_STAT_RX_ANY_FRMS_PORT2_RX_ANY_FRMS(val)   vxge_vBIT(val, 16, 8)
#define	VXGE_HW_RXMAC_RED_RATE_VP_CRATE_THR0(val)   vxge_vBIT(val, 0, 4)
#define	VXGE_HW_RXMAC_RED_RATE_VP_CRATE_THR1(val)   vxge_vBIT(val, 4, 4)
#define	VXGE_HW_RXMAC_RED_RATE_VP_CRATE_THR2(val)   vxge_vBIT(val, 8, 4)
#define	VXGE_HW_RXMAC_RED_RATE_VP_CRATE_THR3(val)   vxge_vBIT(val, 12, 4)
#define	VXGE_HW_RXMAC_RED_RATE_VP_FRATE_THR0(val)   vxge_vBIT(val, 16, 4)
#define	VXGE_HW_RXMAC_RED_RATE_VP_FRATE_THR1(val)   vxge_vBIT(val, 20, 4)
#define	VXGE_HW_RXMAC_RED_RATE_VP_FRATE_THR2(val)   vxge_vBIT(val, 24, 4)
#define	VXGE_HW_RXMAC_RED_RATE_VP_FRATE_THR3(val)   vxge_vBIT(val, 28, 4)
#define	VXGE_HW_XGMAC_INT_STATUS_XMAC_GEN_ERR_XMAC_GEN_INT   vxge_mBIT(3)
#define	VXGE_HW_XGMAC_INT_STATUS_XMAC_LINK_ERR_PORT0_XMAC_LINK_INT_PORT0   vxge_mBIT(7)
#define	VXGE_HW_XGMAC_INT_STATUS_XMAC_LINK_ERR_PORT1_XMAC_LINK_INT_PORT1   vxge_mBIT(11)
#define	VXGE_HW_XGMAC_INT_STATUS_XGXS_GEN_ERR_XGXS_GEN_INT   vxge_mBIT(15)
#define	VXGE_HW_XGMAC_INT_STATUS_ASIC_NTWK_ERR_ASIC_NTWK_INT   vxge_mBIT(19)
#define	VXGE_HW_XGMAC_INT_STATUS_ASIC_GPIO_ERR_ASIC_GPIO_INT   vxge_mBIT(23)
#define	VXGE_HW_XMAC_GEN_ERR_REG_LAGC_LAG_PORT0_ACTOR_CHURN_DETECTED   vxge_mBIT(7)
#define	VXGE_HW_XMAC_GEN_ERR_REG_LAGC_LAG_PORT0_PARTNER_CHURN_DETECTED   vxge_mBIT(11)
#define	VXGE_HW_XMAC_GEN_ERR_REG_LAGC_LAG_PORT0_RECEIVED_LACPDU   vxge_mBIT(15)
#define	VXGE_HW_XMAC_GEN_ERR_REG_LAGC_LAG_PORT1_ACTOR_CHURN_DETECTED   vxge_mBIT(19)
#define	VXGE_HW_XMAC_GEN_ERR_REG_LAGC_LAG_PORT1_PARTNER_CHURN_DETECTED   vxge_mBIT(23)
#define	VXGE_HW_XMAC_GEN_ERR_REG_LAGC_LAG_PORT1_RECEIVED_LACPDU   vxge_mBIT(27)
#define	VXGE_HW_XMAC_GEN_ERR_REG_XLCM_LAG_FAILOVER_DETECTED   vxge_mBIT(31)
#define	VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE0_SG_ERR(val)   vxge_vBIT(val, 40, 2)
#define	VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE0_DB_ERR(val)   vxge_vBIT(val, 42, 2)
#define	VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE1_SG_ERR(val)   vxge_vBIT(val, 44, 2)
#define	VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE1_DB_ERR(val)   vxge_vBIT(val, 46, 2)
#define	VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE2_SG_ERR(val)   vxge_vBIT(val, 48, 2)
#define	VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE2_DB_ERR(val)   vxge_vBIT(val, 50, 2)
#define	VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE3_SG_ERR(val)   vxge_vBIT(val, 52, 2)
#define	VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE3_DB_ERR(val)   vxge_vBIT(val, 54, 2)
#define	VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE4_SG_ERR(val)   vxge_vBIT(val, 56, 2)
#define	VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE4_DB_ERR(val)   vxge_vBIT(val, 58, 2)
#define	VXGE_HW_XMAC_GEN_ERR_REG_XMACJ_XMAC_FSM_ERR   vxge_mBIT(63)
#define	VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMACJ_PORT_DOWN   vxge_mBIT(3)
#define	VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMACJ_PORT_UP   vxge_mBIT(7)
#define	VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMACJ_PORT_WENT_DOWN   vxge_mBIT(11)
#define	VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMACJ_PORT_WENT_UP   vxge_mBIT(15)
#define	VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMACJ_PORT_REAFFIRMED_FAULT   vxge_mBIT(19)
#define	VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMACJ_PORT_REAFFIRMED_OK   vxge_mBIT(23)
#define	VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMACJ_LINK_DOWN   vxge_mBIT(27)
#define	VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMACJ_LINK_UP   vxge_mBIT(31)
#define	VXGE_HW_XMAC_LINK_ERR_PORT_REG_RATEMGMT_RATE_CHANGE   vxge_mBIT(35)
#define	VXGE_HW_XMAC_LINK_ERR_PORT_REG_RATEMGMT_LASI_INV   vxge_mBIT(39)
#define	VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMDIO_MDIO_MGR_ACCESS_COMPLETE   vxge_mBIT(47)
#define	VXGE_HW_XGXS_GEN_ERR_REG_XGXS_XGXS_FSM_ERR   vxge_mBIT(63)
#define	VXGE_HW_ASIC_NTWK_ERR_REG_XMACJ_NTWK_DOWN   vxge_mBIT(3)
#define	VXGE_HW_ASIC_NTWK_ERR_REG_XMACJ_NTWK_UP   vxge_mBIT(7)
#define	VXGE_HW_ASIC_NTWK_ERR_REG_XMACJ_NTWK_WENT_DOWN   vxge_mBIT(11)
#define	VXGE_HW_ASIC_NTWK_ERR_REG_XMACJ_NTWK_WENT_UP   vxge_mBIT(15)
#define	VXGE_HW_ASIC_NTWK_ERR_REG_XMACJ_NTWK_REAFFIRMED_FAULT   vxge_mBIT(19)
#define	VXGE_HW_ASIC_NTWK_ERR_REG_XMACJ_NTWK_REAFFIRMED_OK   vxge_mBIT(23)
#define	VXGE_HW_ASIC_GPIO_ERR_REG_XMACJ_GPIO_INT(n)   vxge_mBIT(n)
#define	VXGE_HW_XGMAC_GEN_STATUS_XMACJ_NTWK_OK   vxge_mBIT(3)
#define	VXGE_HW_XGMAC_GEN_STATUS_XMACJ_NTWK_DATA_RATE   vxge_mBIT(11)
#define	VXGE_HW_XGMAC_GEN_FW_MEMO_STATUS_XMACJ_EVENTS_PENDING(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_XGMAC_GEN_FW_MEMO_MASK_MASK(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_XGMAC_GEN_FW_VPATH_TO_VSPORT_STATUS_XMACJ_EVENTS_PENDING(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_XGMAC_MAIN_CFG_PORT_PORT_EN   vxge_mBIT(3)
#define	VXGE_HW_XMAC_GEN_CFG_RATEMGMT_MAC_RATE_SEL(val)   vxge_vBIT(val, 2, 2)
#define	VXGE_HW_XMAC_GEN_CFG_TX_HEAD_DROP_WHEN_FAULT   vxge_mBIT(7)
#define	VXGE_HW_XMAC_GEN_CFG_FAULT_BEHAVIOUR   vxge_mBIT(27)
#define	VXGE_HW_XMAC_GEN_CFG_PERIOD_NTWK_UP(val)   vxge_vBIT(val, 28, 4)
#define	VXGE_HW_XMAC_GEN_CFG_PERIOD_NTWK_DOWN(val)   vxge_vBIT(val, 32, 4)
#define	VXGE_HW_XMAC_TIMESTAMP_EN   vxge_mBIT(3)
#define	VXGE_HW_XMAC_TIMESTAMP_USE_LINK_ID(val)   vxge_vBIT(val, 6, 2)
#define	VXGE_HW_XMAC_TIMESTAMP_INTERVAL(val)   vxge_vBIT(val, 12, 4)
#define	VXGE_HW_XMAC_TIMESTAMP_TIMER_RESTART   vxge_mBIT(19)
#define	VXGE_HW_XMAC_TIMESTAMP_XMACJ_ROLLOVER_CNT(val)   vxge_vBIT(val, 32, 16)
#define	VXGE_HW_XMAC_STATS_GEN_CFG_PRTAGGR_CUM_TIMER(val)   vxge_vBIT(val, 4, 4)
#define	VXGE_HW_XMAC_STATS_GEN_CFG_VPATH_CUM_TIMER(val)   vxge_vBIT(val, 8, 4)
#define	VXGE_HW_XMAC_STATS_GEN_CFG_VLAN_HANDLING   vxge_mBIT(15)
#define	VXGE_HW_XMAC_STATS_SYS_CMD_OP(val)   vxge_vBIT(val, 5, 3)
#define	VXGE_HW_XMAC_STATS_SYS_CMD_STROBE   vxge_mBIT(15)
#define	VXGE_HW_XMAC_STATS_SYS_CMD_LOC_SEL(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_XMAC_STATS_SYS_CMD_OFFSET_SEL(val)   vxge_vBIT(val, 32, 8)
#define	VXGE_HW_XMAC_STATS_SYS_DATA_XSMGR_DATA(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_ASIC_NTWK_CTRL_REQ_TEST_NTWK   vxge_mBIT(3)
#define	VXGE_HW_ASIC_NTWK_CTRL_PORT0_REQ_TEST_PORT   vxge_mBIT(11)
#define	VXGE_HW_ASIC_NTWK_CTRL_PORT1_REQ_TEST_PORT   vxge_mBIT(15)
#define	VXGE_HW_ASIC_NTWK_CFG_SHOW_PORT_INFO_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_ASIC_NTWK_CFG_PORT_NUM_VP(n)   vxge_mBIT(n)
#define	VXGE_HW_XMAC_CFG_PORT_XGMII_LOOPBACK   vxge_mBIT(3)
#define	VXGE_HW_XMAC_CFG_PORT_XGMII_REVERSE_LOOPBACK   vxge_mBIT(7)
#define	VXGE_HW_XMAC_CFG_PORT_XGMII_TX_BEHAV   vxge_mBIT(11)
#define	VXGE_HW_XMAC_CFG_PORT_XGMII_RX_BEHAV   vxge_mBIT(15)
#define	VXGE_HW_XMAC_STATION_ADDR_PORT_MAC_ADDR(val)   vxge_vBIT(val, 0, 48)
#define	VXGE_HW_LAG_CFG_EN   vxge_mBIT(3)
#define	VXGE_HW_LAG_CFG_MODE(val)   vxge_vBIT(val, 6, 2)
#define	VXGE_HW_LAG_CFG_TX_DISCARD_BEHAV   vxge_mBIT(11)
#define	VXGE_HW_LAG_CFG_RX_DISCARD_BEHAV   vxge_mBIT(15)
#define	VXGE_HW_LAG_CFG_PREF_INDIV_PORT_NUM   vxge_mBIT(19)
#define	VXGE_HW_LAG_STATUS_XLCM_WAITING_TO_FAILBACK   vxge_mBIT(3)
#define	VXGE_HW_LAG_STATUS_XLCM_TIMER_VAL_COLD_FAILOVER(val)   vxge_vBIT(val, 8, 8)
#define	VXGE_HW_LAG_ACTIVE_PASSIVE_CFG_HOT_STANDBY   vxge_mBIT(3)
#define	VXGE_HW_LAG_ACTIVE_PASSIVE_CFG_LACP_DECIDES   vxge_mBIT(7)
#define	VXGE_HW_LAG_ACTIVE_PASSIVE_CFG_PREF_ACTIVE_PORT_NUM   vxge_mBIT(11)
#define	VXGE_HW_LAG_ACTIVE_PASSIVE_CFG_AUTO_FAILBACK   vxge_mBIT(15)
#define	VXGE_HW_LAG_ACTIVE_PASSIVE_CFG_FAILBACK_EN   vxge_mBIT(19)
#define	VXGE_HW_LAG_ACTIVE_PASSIVE_CFG_COLD_FAILOVER_TIMEOUT(val)   vxge_vBIT(val, 32, 16)
#define	VXGE_HW_LAG_LACP_CFG_EN   vxge_mBIT(3)
#define	VXGE_HW_LAG_LACP_CFG_LACP_BEGIN   vxge_mBIT(7)
#define	VXGE_HW_LAG_LACP_CFG_DISCARD_LACP   vxge_mBIT(11)
#define	VXGE_HW_LAG_LACP_CFG_LIBERAL_LEN_CHK   vxge_mBIT(15)
#define	VXGE_HW_LAG_TIMER_CFG_1_FAST_PER(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_LAG_TIMER_CFG_1_SLOW_PER(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_LAG_TIMER_CFG_1_SHORT_TIMEOUT(val)   vxge_vBIT(val, 32, 16)
#define	VXGE_HW_LAG_TIMER_CFG_1_LONG_TIMEOUT(val)   vxge_vBIT(val, 48, 16)
#define	VXGE_HW_LAG_TIMER_CFG_2_CHURN_DET(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_LAG_TIMER_CFG_2_AGGR_WAIT(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_LAG_TIMER_CFG_2_SHORT_TIMER_SCALE(val)   vxge_vBIT(val, 32, 16)
#define	VXGE_HW_LAG_TIMER_CFG_2_LONG_TIMER_SCALE(val)   vxge_vBIT(val, 48, 16)
#define	VXGE_HW_LAG_SYS_ID_ADDR(val)   vxge_vBIT(val, 0, 48)
#define	VXGE_HW_LAG_SYS_ID_USE_PORT_ADDR   vxge_mBIT(51)
#define	VXGE_HW_LAG_SYS_ID_ADDR_SEL   vxge_mBIT(55)
#define	VXGE_HW_LAG_SYS_CFG_SYS_PRI(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_LAG_AGGR_ADDR_CFG_ADDR(val)   vxge_vBIT(val, 0, 48)
#define	VXGE_HW_LAG_AGGR_ADDR_CFG_USE_PORT_ADDR   vxge_mBIT(51)
#define	VXGE_HW_LAG_AGGR_ADDR_CFG_ADDR_SEL   vxge_mBIT(55)
#define	VXGE_HW_LAG_AGGR_ID_CFG_ID(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_LAG_AGGR_ADMIN_KEY_KEY(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_LAG_AGGR_ALT_ADMIN_KEY_KEY(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_LAG_AGGR_ALT_ADMIN_KEY_ALT_AGGR   vxge_mBIT(19)
#define	VXGE_HW_LAG_AGGR_OPER_KEY_LAGC_KEY(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_LAG_AGGR_PARTNER_SYS_ID_LAGC_ADDR(val)   vxge_vBIT(val, 0, 48)
#define	VXGE_HW_LAG_AGGR_PARTNER_INFO_LAGC_SYS_PRI(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_LAG_AGGR_PARTNER_INFO_LAGC_OPER_KEY(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_LAG_AGGR_STATE_LAGC_TX   vxge_mBIT(3)
#define	VXGE_HW_LAG_AGGR_STATE_LAGC_RX   vxge_mBIT(7)
#define	VXGE_HW_LAG_AGGR_STATE_LAGC_READY   vxge_mBIT(11)
#define	VXGE_HW_LAG_AGGR_STATE_LAGC_INDIVIDUAL   vxge_mBIT(15)
#define	VXGE_HW_LAG_PORT_CFG_EN   vxge_mBIT(3)
#define	VXGE_HW_LAG_PORT_CFG_DISCARD_SLOW_PROTO   vxge_mBIT(7)
#define	VXGE_HW_LAG_PORT_CFG_HOST_CHOSEN_AGGR   vxge_mBIT(11)
#define	VXGE_HW_LAG_PORT_CFG_DISCARD_UNKNOWN_SLOW_PROTO   vxge_mBIT(15)
#define	VXGE_HW_LAG_PORT_ACTOR_ADMIN_CFG_PORT_NUM(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_LAG_PORT_ACTOR_ADMIN_CFG_PORT_PRI(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_LAG_PORT_ACTOR_ADMIN_CFG_KEY_10G(val)   vxge_vBIT(val, 32, 16)
#define	VXGE_HW_LAG_PORT_ACTOR_ADMIN_CFG_KEY_1G(val)   vxge_vBIT(val, 48, 16)
#define	VXGE_HW_LAG_PORT_ACTOR_ADMIN_STATE_LACP_ACTIVITY   vxge_mBIT(3)
#define	VXGE_HW_LAG_PORT_ACTOR_ADMIN_STATE_LACP_TIMEOUT   vxge_mBIT(7)
#define	VXGE_HW_LAG_PORT_ACTOR_ADMIN_STATE_AGGREGATION   vxge_mBIT(11)
#define	VXGE_HW_LAG_PORT_ACTOR_ADMIN_STATE_SYNCHRONIZATION   vxge_mBIT(15)
#define	VXGE_HW_LAG_PORT_ACTOR_ADMIN_STATE_COLLECTING   vxge_mBIT(19)
#define	VXGE_HW_LAG_PORT_ACTOR_ADMIN_STATE_DISTRIBUTING   vxge_mBIT(23)
#define	VXGE_HW_LAG_PORT_ACTOR_ADMIN_STATE_DEFAULTED   vxge_mBIT(27)
#define	VXGE_HW_LAG_PORT_ACTOR_ADMIN_STATE_EXPIRED   vxge_mBIT(31)
#define	VXGE_HW_LAG_PORT_PARTNER_ADMIN_SYS_ID_ADDR(val)   vxge_vBIT(val, 0, 48)
#define	VXGE_HW_LAG_PORT_PARTNER_ADMIN_CFG_SYS_PRI(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_LAG_PORT_PARTNER_ADMIN_CFG_KEY(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_LAG_PORT_PARTNER_ADMIN_CFG_PORT_NUM(val)   vxge_vBIT(val, 32, 16)
#define	VXGE_HW_LAG_PORT_PARTNER_ADMIN_CFG_PORT_PRI(val)   vxge_vBIT(val, 48, 16)
#define	VXGE_HW_LAG_PORT_PARTNER_ADMIN_STATE_LACP_ACTIVITY   vxge_mBIT(3)
#define	VXGE_HW_LAG_PORT_PARTNER_ADMIN_STATE_LACP_TIMEOUT   vxge_mBIT(7)
#define	VXGE_HW_LAG_PORT_PARTNER_ADMIN_STATE_AGGREGATION   vxge_mBIT(11)
#define	VXGE_HW_LAG_PORT_PARTNER_ADMIN_STATE_SYNCHRONIZATION   vxge_mBIT(15)
#define	VXGE_HW_LAG_PORT_PARTNER_ADMIN_STATE_COLLECTING   vxge_mBIT(19)
#define	VXGE_HW_LAG_PORT_PARTNER_ADMIN_STATE_DISTRIBUTING   vxge_mBIT(23)
#define	VXGE_HW_LAG_PORT_PARTNER_ADMIN_STATE_DEFAULTED   vxge_mBIT(27)
#define	VXGE_HW_LAG_PORT_PARTNER_ADMIN_STATE_EXPIRED   vxge_mBIT(31)
#define	VXGE_HW_LAG_PORT_TO_AGGR_LAGC_AGGR_ID(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_LAG_PORT_TO_AGGR_LAGC_AGGR_VLD_ID   vxge_mBIT(19)
#define	VXGE_HW_LAG_PORT_ACTOR_OPER_KEY_LAGC_KEY(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_LAG_PORT_ACTOR_OPER_STATE_LAGC_LACP_ACTIVITY   vxge_mBIT(3)
#define	VXGE_HW_LAG_PORT_ACTOR_OPER_STATE_LAGC_LACP_TIMEOUT   vxge_mBIT(7)
#define	VXGE_HW_LAG_PORT_ACTOR_OPER_STATE_LAGC_AGGREGATION   vxge_mBIT(11)
#define	VXGE_HW_LAG_PORT_ACTOR_OPER_STATE_LAGC_SYNCHRONIZATION   vxge_mBIT(15)
#define	VXGE_HW_LAG_PORT_ACTOR_OPER_STATE_LAGC_COLLECTING   vxge_mBIT(19)
#define	VXGE_HW_LAG_PORT_ACTOR_OPER_STATE_LAGC_DISTRIBUTING   vxge_mBIT(23)
#define	VXGE_HW_LAG_PORT_ACTOR_OPER_STATE_LAGC_DEFAULTED   vxge_mBIT(27)
#define	VXGE_HW_LAG_PORT_ACTOR_OPER_STATE_LAGC_EXPIRED   vxge_mBIT(31)
#define	VXGE_HW_LAG_PORT_PARTNER_OPER_SYS_ID_LAGC_ADDR(val)   vxge_vBIT(val, 0, 48)
#define	VXGE_HW_LAG_PORT_PARTNER_OPER_INFO_LAGC_SYS_PRI(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_LAG_PORT_PARTNER_OPER_INFO_LAGC_KEY(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_LAG_PORT_PARTNER_OPER_INFO_LAGC_PORT_NUM(val)   vxge_vBIT(val, 32, 16)
#define	VXGE_HW_LAG_PORT_PARTNER_OPER_INFO_LAGC_PORT_PRI(val)   vxge_vBIT(val, 48, 16)
#define	VXGE_HW_LAG_PORT_PARTNER_OPER_STATE_LAGC_LACP_ACTIVITY   vxge_mBIT(3)
#define	VXGE_HW_LAG_PORT_PARTNER_OPER_STATE_LAGC_LACP_TIMEOUT   vxge_mBIT(7)
#define	VXGE_HW_LAG_PORT_PARTNER_OPER_STATE_LAGC_AGGREGATION   vxge_mBIT(11)
#define	VXGE_HW_LAG_PORT_PARTNER_OPER_STATE_LAGC_SYNCHRONIZATION   vxge_mBIT(15)
#define	VXGE_HW_LAG_PORT_PARTNER_OPER_STATE_LAGC_COLLECTING   vxge_mBIT(19)
#define	VXGE_HW_LAG_PORT_PARTNER_OPER_STATE_LAGC_DISTRIBUTING   vxge_mBIT(23)
#define	VXGE_HW_LAG_PORT_PARTNER_OPER_STATE_LAGC_DEFAULTED   vxge_mBIT(27)
#define	VXGE_HW_LAG_PORT_PARTNER_OPER_STATE_LAGC_EXPIRED   vxge_mBIT(31)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_READY   vxge_mBIT(3)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_SELECTED(val)   vxge_vBIT(val, 6, 2)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_AGGR_NUM   vxge_mBIT(11)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_PORT_MOVED   vxge_mBIT(15)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_PORT_ENABLED   vxge_mBIT(18)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_PORT_DISABLED   vxge_mBIT(19)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_NTT   vxge_mBIT(23)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_ACTOR_CHURN   vxge_mBIT(27)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_PARTNER_CHURN   vxge_mBIT(31)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_ACTOR_INFO_LEN_MISMATCH   vxge_mBIT(32)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_PARTNER_INFO_LEN_MISMATCH   vxge_mBIT(33)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_COLL_INFO_LEN_MISMATCH   vxge_mBIT(34)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_TERM_INFO_LEN_MISMATCH   vxge_mBIT(35)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_RX_FSM_STATE(val)   vxge_vBIT(val, 37, 3)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_MUX_FSM_STATE(val)   vxge_vBIT(val, 41, 3)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_MUX_REASON(val)   vxge_vBIT(val, 44, 4)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_ACTOR_CHURN_STATE   vxge_mBIT(54)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_PARTNER_CHURN_STATE   vxge_mBIT(55)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_ACTOR_CHURN_COUNT(val)   vxge_vBIT(val, 56, 4)
#define	VXGE_HW_LAG_PORT_STATE_VARS_LAGC_PARTNER_CHURN_COUNT(val)   vxge_vBIT(val, 60, 4)
#define	VXGE_HW_LAG_PORT_TIMER_CNTR_LAGC_CURRENT_WHILE(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_LAG_PORT_TIMER_CNTR_LAGC_PERIODIC_WHILE(val)   vxge_vBIT(val, 8, 8)
#define	VXGE_HW_LAG_PORT_TIMER_CNTR_LAGC_WAIT_WHILE(val)   vxge_vBIT(val, 16, 8)
#define	VXGE_HW_LAG_PORT_TIMER_CNTR_LAGC_TX_LACP(val)   vxge_vBIT(val, 24, 8)
#define	VXGE_HW_LAG_PORT_TIMER_CNTR_LAGC_ACTOR_SYNC_TRANSITION_COUNT(val)   vxge_vBIT(val, 32, 8)
#define	VXGE_HW_LAG_PORT_TIMER_CNTR_LAGC_PARTNER_SYNC_TRANSITION_COUNT(val)   vxge_vBIT(val, 40, 8)
#define	VXGE_HW_LAG_PORT_TIMER_CNTR_LAGC_ACTOR_CHANGE_COUNT(val)   vxge_vBIT(val, 48, 8)
#define	VXGE_HW_LAG_PORT_TIMER_CNTR_LAGC_PARTNER_CHANGE_COUNT(val)   vxge_vBIT(val, 56, 8)
#define	VXGE_HW_RTDMA_INT_STATUS_PDA_ALARM_PDA_INT   vxge_mBIT(1)
#define	VXGE_HW_RTDMA_INT_STATUS_PCC_ERROR_PCC_INT   vxge_mBIT(2)
#define	VXGE_HW_RTDMA_INT_STATUS_LSO_ERROR_LSO_INT   vxge_mBIT(4)
#define	VXGE_HW_RTDMA_INT_STATUS_SM_ERROR_SM_INT   vxge_mBIT(5)
#define	VXGE_HW_PDA_ALARM_REG_PDA_HSC_FIFO_ERR   vxge_mBIT(0)
#define	VXGE_HW_PDA_ALARM_REG_PDA_SM_ERR   vxge_mBIT(1)
#define	VXGE_HW_PCC_ERROR_REG_PCC_PCC_FRM_BUF_SBE(n)   vxge_mBIT(n)
#define	VXGE_HW_PCC_ERROR_REG_PCC_PCC_TXDO_SBE(n)   vxge_mBIT(n)
#define	VXGE_HW_PCC_ERROR_REG_PCC_PCC_FRM_BUF_DBE(n)   vxge_mBIT(n)
#define	VXGE_HW_PCC_ERROR_REG_PCC_PCC_TXDO_DBE(n)   vxge_mBIT(n)
#define	VXGE_HW_PCC_ERROR_REG_PCC_PCC_FSM_ERR_ALARM(n)   vxge_mBIT(n)
#define	VXGE_HW_PCC_ERROR_REG_PCC_PCC_SERR(n)   vxge_mBIT(n)
#define	VXGE_HW_LSO_ERROR_REG_PCC_LSO_ABORT(n)   vxge_mBIT(n)
#define	VXGE_HW_LSO_ERROR_REG_PCC_LSO_FSM_ERR_ALARM(n)   vxge_mBIT(n)
#define	VXGE_HW_SM_ERROR_REG_SM_FSM_ERR_ALARM   vxge_mBIT(15)
#define	VXGE_HW_TXD_OWNERSHIP_CTRL_KEEP_OWNERSHIP   vxge_mBIT(7)
#define	VXGE_HW_PCC_CFG_PCC_ENABLE(n)   vxge_mBIT(n)
#define	VXGE_HW_PCC_CFG_PCC_ECC_ENABLE_N(n)   vxge_mBIT(n)
#define	VXGE_HW_PCC_CONTROL_FE_ENABLE(val)   vxge_vBIT(val, 6, 2)
#define	VXGE_HW_PCC_CONTROL_EARLY_ASSIGN_EN   vxge_mBIT(15)
#define	VXGE_HW_PCC_CONTROL_UNBLOCK_DB_ERR   vxge_mBIT(31)
#define	VXGE_HW_PDA_STATUS1_PDA_WRAP_0_CTR(val)   vxge_vBIT(val, 4, 4)
#define	VXGE_HW_PDA_STATUS1_PDA_WRAP_1_CTR(val)   vxge_vBIT(val, 12, 4)
#define	VXGE_HW_PDA_STATUS1_PDA_WRAP_2_CTR(val)   vxge_vBIT(val, 20, 4)
#define	VXGE_HW_PDA_STATUS1_PDA_WRAP_3_CTR(val)   vxge_vBIT(val, 28, 4)
#define	VXGE_HW_PDA_STATUS1_PDA_WRAP_4_CTR(val)   vxge_vBIT(val, 36, 4)
#define	VXGE_HW_PDA_STATUS1_PDA_WRAP_5_CTR(val)   vxge_vBIT(val, 44, 4)
#define	VXGE_HW_PDA_STATUS1_PDA_WRAP_6_CTR(val)   vxge_vBIT(val, 52, 4)
#define	VXGE_HW_PDA_STATUS1_PDA_WRAP_7_CTR(val)   vxge_vBIT(val, 60, 4)
#define	VXGE_HW_RTDMA_BW_TIMER_TIMER_CTRL(val)   vxge_vBIT(val, 12, 4)
#define	VXGE_HW_G3CMCT_INT_STATUS_ERR_G3IF_INT   vxge_mBIT(0)
#define	VXGE_HW_G3CMCT_ERR_REG_G3IF_SM_ERR   vxge_mBIT(4)
#define	VXGE_HW_G3CMCT_ERR_REG_G3IF_GDDR3_DECC   vxge_mBIT(5)
#define	VXGE_HW_G3CMCT_ERR_REG_G3IF_GDDR3_U_DECC   vxge_mBIT(6)
#define	VXGE_HW_G3CMCT_ERR_REG_G3IF_CTRL_FIFO_DECC   vxge_mBIT(7)
#define	VXGE_HW_G3CMCT_ERR_REG_G3IF_GDDR3_SECC   vxge_mBIT(29)
#define	VXGE_HW_G3CMCT_ERR_REG_G3IF_GDDR3_U_SECC   vxge_mBIT(30)
#define	VXGE_HW_G3CMCT_ERR_REG_G3IF_CTRL_FIFO_SECC   vxge_mBIT(31)
#define	VXGE_HW_MC_INT_STATUS_MC_ERR_MC_INT   vxge_mBIT(3)
#define	VXGE_HW_MC_INT_STATUS_GROCRC_ALARM_ROCRC_INT   vxge_mBIT(7)
#define	VXGE_HW_MC_INT_STATUS_FAU_GEN_ERR_FAU_GEN_INT   vxge_mBIT(11)
#define	VXGE_HW_MC_INT_STATUS_FAU_ECC_ERR_FAU_ECC_INT   vxge_mBIT(15)
#define	VXGE_HW_MC_ERR_REG_MC_XFMD_MEM_ECC_SG_ERR_A   vxge_mBIT(3)
#define	VXGE_HW_MC_ERR_REG_MC_XFMD_MEM_ECC_SG_ERR_B   vxge_mBIT(4)
#define	VXGE_HW_MC_ERR_REG_MC_G3IF_RD_FIFO_ECC_SG_ERR   vxge_mBIT(5)
#define	VXGE_HW_MC_ERR_REG_MC_MIRI_ECC_SG_ERR_0   vxge_mBIT(6)
#define	VXGE_HW_MC_ERR_REG_MC_MIRI_ECC_SG_ERR_1   vxge_mBIT(7)
#define	VXGE_HW_MC_ERR_REG_MC_XFMD_MEM_ECC_DB_ERR_A   vxge_mBIT(10)
#define	VXGE_HW_MC_ERR_REG_MC_XFMD_MEM_ECC_DB_ERR_B   vxge_mBIT(11)
#define	VXGE_HW_MC_ERR_REG_MC_G3IF_RD_FIFO_ECC_DB_ERR   vxge_mBIT(12)
#define	VXGE_HW_MC_ERR_REG_MC_MIRI_ECC_DB_ERR_0   vxge_mBIT(13)
#define	VXGE_HW_MC_ERR_REG_MC_MIRI_ECC_DB_ERR_1   vxge_mBIT(14)
#define	VXGE_HW_MC_ERR_REG_MC_SM_ERR   vxge_mBIT(15)
#define	VXGE_HW_GROCRC_ALARM_REG_XFMD_WR_FIFO_ERR   vxge_mBIT(3)
#define	VXGE_HW_GROCRC_ALARM_REG_WDE2MSR_RD_FIFO_ERR   vxge_mBIT(7)
#define	VXGE_HW_RX_THRESH_CFG_REPL_PAUSE_LOW_THR(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_RX_THRESH_CFG_REPL_PAUSE_HIGH_THR(val)   vxge_vBIT(val, 8, 8)
#define	VXGE_HW_RX_THRESH_CFG_REPL_RED_THR_0(val)   vxge_vBIT(val, 16, 8)
#define	VXGE_HW_RX_THRESH_CFG_REPL_RED_THR_1(val)   vxge_vBIT(val, 24, 8)
#define	VXGE_HW_RX_THRESH_CFG_REPL_RED_THR_2(val)   vxge_vBIT(val, 32, 8)
#define	VXGE_HW_RX_THRESH_CFG_REPL_RED_THR_3(val)   vxge_vBIT(val, 40, 8)
#define	VXGE_HW_RX_THRESH_CFG_REPL_GLOBAL_WOL_EN   vxge_mBIT(62)
#define	VXGE_HW_RX_THRESH_CFG_REPL_EXACT_VP_MATCH_REQ   vxge_mBIT(63)
#define	VXGE_HW_FBMC_ECC_CFG_ENABLE(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_PCIPIF_INT_STATUS_DBECC_ERR_DBECC_ERR_INT   vxge_mBIT(3)
#define	VXGE_HW_PCIPIF_INT_STATUS_SBECC_ERR_SBECC_ERR_INT   vxge_mBIT(7)
#define	VXGE_HW_PCIPIF_INT_STATUS_GENERAL_ERR_GENERAL_ERR_INT   vxge_mBIT(11)
#define	VXGE_HW_PCIPIF_INT_STATUS_SRPCIM_MSG_SRPCIM_MSG_INT   vxge_mBIT(15)
#define	VXGE_HW_PCIPIF_INT_STATUS_MRPCIM_SPARE_R1_MRPCIM_SPARE_R1_INT   vxge_mBIT(19)
#define	VXGE_HW_DBECC_ERR_REG_PCI_RETRY_BUF_DB_ERR   vxge_mBIT(3)
#define	VXGE_HW_DBECC_ERR_REG_PCI_RETRY_SOT_DB_ERR   vxge_mBIT(7)
#define	VXGE_HW_DBECC_ERR_REG_PCI_P_HDR_DB_ERR   vxge_mBIT(11)
#define	VXGE_HW_DBECC_ERR_REG_PCI_P_DATA_DB_ERR   vxge_mBIT(15)
#define	VXGE_HW_DBECC_ERR_REG_PCI_NP_HDR_DB_ERR   vxge_mBIT(19)
#define	VXGE_HW_DBECC_ERR_REG_PCI_NP_DATA_DB_ERR   vxge_mBIT(23)
#define	VXGE_HW_SBECC_ERR_REG_PCI_RETRY_BUF_SG_ERR   vxge_mBIT(3)
#define	VXGE_HW_SBECC_ERR_REG_PCI_RETRY_SOT_SG_ERR   vxge_mBIT(7)
#define	VXGE_HW_SBECC_ERR_REG_PCI_P_HDR_SG_ERR   vxge_mBIT(11)
#define	VXGE_HW_SBECC_ERR_REG_PCI_P_DATA_SG_ERR   vxge_mBIT(15)
#define	VXGE_HW_SBECC_ERR_REG_PCI_NP_HDR_SG_ERR   vxge_mBIT(19)
#define	VXGE_HW_SBECC_ERR_REG_PCI_NP_DATA_SG_ERR   vxge_mBIT(23)
#define	VXGE_HW_GENERAL_ERR_REG_PCI_DROPPED_ILLEGAL_CFG   vxge_mBIT(3)
#define	VXGE_HW_GENERAL_ERR_REG_PCI_ILLEGAL_MEM_MAP_PROG   vxge_mBIT(7)
#define	VXGE_HW_GENERAL_ERR_REG_PCI_LINK_RST_FSM_ERR   vxge_mBIT(11)
#define	VXGE_HW_GENERAL_ERR_REG_PCI_RX_ILLEGAL_TLP_VPLANE   vxge_mBIT(15)
#define	VXGE_HW_GENERAL_ERR_REG_PCI_TRAINING_RESET_DET   vxge_mBIT(19)
#define	VXGE_HW_GENERAL_ERR_REG_PCI_PCI_LINK_DOWN_DET   vxge_mBIT(23)
#define	VXGE_HW_GENERAL_ERR_REG_PCI_RESET_ACK_DLLP   vxge_mBIT(27)
#define	VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE0_RMSG_INT   vxge_mBIT(0)
#define	VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE1_RMSG_INT   vxge_mBIT(1)
#define	VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE2_RMSG_INT   vxge_mBIT(2)
#define	VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE3_RMSG_INT   vxge_mBIT(3)
#define	VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE4_RMSG_INT   vxge_mBIT(4)
#define	VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE5_RMSG_INT   vxge_mBIT(5)
#define	VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE6_RMSG_INT   vxge_mBIT(6)
#define	VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE7_RMSG_INT   vxge_mBIT(7)
#define	VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE8_RMSG_INT   vxge_mBIT(8)
#define	VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE9_RMSG_INT   vxge_mBIT(9)
#define	VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE10_RMSG_INT   vxge_mBIT(10)
#define	VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE11_RMSG_INT   vxge_mBIT(11)
#define	VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE12_RMSG_INT   vxge_mBIT(12)
#define	VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE13_RMSG_INT   vxge_mBIT(13)
#define	VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE14_RMSG_INT   vxge_mBIT(14)
#define	VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE15_RMSG_INT   vxge_mBIT(15)
#define	VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE16_RMSG_INT   vxge_mBIT(16)
#define	VXGE_HW_GCMG1_INT_STATUS_GSSCC_ERR_GSSCC_INT   vxge_mBIT(0)
#define	VXGE_HW_GCMG1_INT_STATUS_GSSC0_ERR0_GSSC0_0_INT   vxge_mBIT(1)
#define	VXGE_HW_GCMG1_INT_STATUS_GSSC0_ERR1_GSSC0_1_INT   vxge_mBIT(2)
#define	VXGE_HW_GCMG1_INT_STATUS_GSSC1_ERR0_GSSC1_0_INT   vxge_mBIT(3)
#define	VXGE_HW_GCMG1_INT_STATUS_GSSC1_ERR1_GSSC1_1_INT   vxge_mBIT(4)
#define	VXGE_HW_GCMG1_INT_STATUS_GSSC2_ERR0_GSSC2_0_INT   vxge_mBIT(5)
#define	VXGE_HW_GCMG1_INT_STATUS_GSSC2_ERR1_GSSC2_1_INT   vxge_mBIT(6)
#define	VXGE_HW_GCMG1_INT_STATUS_UQM_ERR_UQM_INT   vxge_mBIT(7)
#define	VXGE_HW_GCMG1_INT_STATUS_GQCC_ERR_GQCC_INT   vxge_mBIT(8)
#define	VXGE_HW_PCMG1_INT_STATUS_PSSCC_ERR_PSSCC_INT   vxge_mBIT(0)
#define	VXGE_HW_PCMG1_INT_STATUS_PQCC_ERR_PQCC_INT   vxge_mBIT(1)
#define	VXGE_HW_PCMG1_INT_STATUS_PQCC_CQM_ERR_PQCC_CQM_INT   vxge_mBIT(2)
#define	VXGE_HW_PCMG1_INT_STATUS_PQCC_SQM_ERR_PQCC_SQM_INT   vxge_mBIT(3)
#define	VXGE_HW_ONE_INT_STATUS_RXPE_ERR_RXPE_INT   vxge_mBIT(7)
#define	VXGE_HW_ONE_INT_STATUS_TXPE_BCC_MEM_SG_ECC_ERR_TXPE_BCC_MEM_SG_ECC_INT   vxge_mBIT(13)
#define	VXGE_HW_ONE_INT_STATUS_TXPE_BCC_MEM_DB_ECC_ERR_TXPE_BCC_MEM_DB_ECC_INT   vxge_mBIT(14)
#define	VXGE_HW_ONE_INT_STATUS_TXPE_ERR_TXPE_INT   vxge_mBIT(15)
#define	VXGE_HW_ONE_INT_STATUS_DLM_ERR_DLM_INT   vxge_mBIT(23)
#define	VXGE_HW_ONE_INT_STATUS_PE_ERR_PE_INT   vxge_mBIT(31)
#define	VXGE_HW_ONE_INT_STATUS_RPE_ERR_RPE_INT   vxge_mBIT(39)
#define	VXGE_HW_ONE_INT_STATUS_RPE_FSM_ERR_RPE_FSM_INT   vxge_mBIT(47)
#define	VXGE_HW_ONE_INT_STATUS_OES_ERR_OES_INT   vxge_mBIT(55)
#define	VXGE_HW_NOA_WCT_CTRL_VP_INT_NUM   vxge_mBIT(0)
#define	VXGE_HW_RC_CFG2_BUFF1_SIZE(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_RC_CFG2_BUFF2_SIZE(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_RC_CFG2_BUFF3_SIZE(val)   vxge_vBIT(val, 32, 16)
#define	VXGE_HW_RC_CFG2_BUFF4_SIZE(val)   vxge_vBIT(val, 48, 16)
#define	VXGE_HW_RC_CFG3_BUFF5_SIZE(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_RX_MULTI_CAST_CTRL1_ENABLE   vxge_mBIT(7)
#define	VXGE_HW_RX_MULTI_CAST_CTRL1_DELAY_COUNT(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_RXDM_DBG_RD_ADDR(val)   vxge_vBIT(val, 0, 12)
#define	VXGE_HW_RXDM_DBG_RD_ENABLE   vxge_mBIT(31)
#define	VXGE_HW_RXDM_DBG_RD_DATA_RMC_RXDM_DBG_RD_DATA(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_RQA_TOP_PRTY_FOR_VH_RQA_TOP_PRTY_FOR_VH(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_TIM_STATUS_TIM_RESET_IN_PROGRESS   vxge_mBIT(0)
#define	VXGE_HW_TIM_ECC_ENABLE_VBLS_N   vxge_mBIT(7)
#define	VXGE_HW_TIM_ECC_ENABLE_BMAP_N   vxge_mBIT(15)
#define	VXGE_HW_TIM_ECC_ENABLE_BMAP_MSG_N   vxge_mBIT(23)
#define	VXGE_HW_TIM_BP_CTRL_RD_XON   vxge_mBIT(7)
#define	VXGE_HW_TIM_BP_CTRL_WR_XON   vxge_mBIT(15)
#define	VXGE_HW_TIM_BP_CTRL_ROCRC_BYP   vxge_mBIT(23)
#define	VXGE_HW_TIM_RESOURCE_ASSIGNMENT_VH_BMAP_ROOT(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_TIM_BMAP_MAPPING_VP_ERR_TIM_DEST_VPATH(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_GCMG2_INT_STATUS_GXTMC_ERR_GXTMC_INT   vxge_mBIT(7)
#define	VXGE_HW_GCMG2_INT_STATUS_GCP_ERR_GCP_INT   vxge_mBIT(15)
#define	VXGE_HW_GCMG2_INT_STATUS_CMC_ERR_CMC_INT   vxge_mBIT(23)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_MEM_DB_ERR(val)   vxge_vBIT(val, 0, 4)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_MEM_SG_ERR(val)   vxge_vBIT(val, 4, 4)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_CMC_RD_DATA_DB_ERR   vxge_mBIT(8)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_REQ_FIFO_ERR   vxge_mBIT(9)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_REQ_DATA_FIFO_ERR   vxge_mBIT(10)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_WR_RSP_FIFO_ERR   vxge_mBIT(11)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_RD_RSP_FIFO_ERR   vxge_mBIT(12)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_CMI_WRP_FIFO_ERR   vxge_mBIT(13)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_CMI_WRP_ERR   vxge_mBIT(14)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_CMI_RRP_FIFO_ERR   vxge_mBIT(15)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_CMI_RRP_ERR   vxge_mBIT(16)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_CMI_DATA_SM_ERR   vxge_mBIT(17)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_CMI_CMC0_IF_ERR   vxge_mBIT(18)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_ARB_SM_ERR   vxge_mBIT(19)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_CFC_SM_ERR   vxge_mBIT(20)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_DFETCH_CREDIT_OVERFLOW   vxge_mBIT(21)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_DFETCH_CREDIT_UNDERFLOW   vxge_mBIT(22)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_DFETCH_SM_ERR   vxge_mBIT(23)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_RCTRL_CREDIT_OVERFLOW   vxge_mBIT(24)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_RCTRL_CREDIT_UNDERFLOW   vxge_mBIT(25)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_RCTRL_SM_ERR   vxge_mBIT(26)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_WCOMPL_SM_ERR   vxge_mBIT(27)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_WCOMPL_TAG_ERR   vxge_mBIT(28)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_WREQ_SM_ERR   vxge_mBIT(29)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_WREQ_FIFO_ERR   vxge_mBIT(30)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_CP2BDT_RFIFO_POP_ERR   vxge_mBIT(31)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_XTMC_BDT_CMI_OP_ERR   vxge_mBIT(32)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_XTMC_BDT_DFETCH_OP_ERR   vxge_mBIT(33)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_XTMC_BDT_DFIFO_ERR   vxge_mBIT(34)
#define	VXGE_HW_GXTMC_ERR_REG_XTMC_CMI_ARB_SM_ERR   vxge_mBIT(35)
#define	VXGE_HW_CMC_ERR_REG_CMC_CMC_SM_ERR   vxge_mBIT(0)
#define	VXGE_HW_GCP_ERR_REG_CP_H2L2CP_FIFO_ERR   vxge_mBIT(0)
#define	VXGE_HW_GCP_ERR_REG_CP_STC2CP_FIFO_ERR   vxge_mBIT(1)
#define	VXGE_HW_GCP_ERR_REG_CP_STE2CP_FIFO_ERR   vxge_mBIT(2)
#define	VXGE_HW_GCP_ERR_REG_CP_TTE2CP_FIFO_ERR   vxge_mBIT(3)
#define	VXGE_HW_PCMG2_INT_STATUS_PXTMC_ERR_PXTMC_INT   vxge_mBIT(7)
#define	VXGE_HW_PCMG2_INT_STATUS_CP_EXC_CP_XT_EXC_INT   vxge_mBIT(15)
#define	VXGE_HW_PCMG2_INT_STATUS_CP_ERR_CP_ERR_INT   vxge_mBIT(23)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_XT_PIF_SRAM_DB_ERR(val)   vxge_vBIT(val, 0, 2)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_MPT_REQ_FIFO_ERR   vxge_mBIT(2)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_MPT_PRSP_FIFO_ERR   vxge_mBIT(3)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_MPT_WRSP_FIFO_ERR   vxge_mBIT(4)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_UPT_REQ_FIFO_ERR   vxge_mBIT(5)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_UPT_PRSP_FIFO_ERR   vxge_mBIT(6)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_UPT_WRSP_FIFO_ERR   vxge_mBIT(7)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CPT_REQ_FIFO_ERR   vxge_mBIT(8)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CPT_PRSP_FIFO_ERR   vxge_mBIT(9)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CPT_WRSP_FIFO_ERR   vxge_mBIT(10)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_REQ_FIFO_ERR   vxge_mBIT(11)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_REQ_DATA_FIFO_ERR   vxge_mBIT(12)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_WR_RSP_FIFO_ERR   vxge_mBIT(13)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_RD_RSP_FIFO_ERR   vxge_mBIT(14)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_MPT_REQ_SHADOW_ERR   vxge_mBIT(15)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_MPT_RSP_SHADOW_ERR   vxge_mBIT(16)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_UPT_REQ_SHADOW_ERR   vxge_mBIT(17)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_UPT_RSP_SHADOW_ERR   vxge_mBIT(18)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CPT_REQ_SHADOW_ERR   vxge_mBIT(19)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CPT_RSP_SHADOW_ERR   vxge_mBIT(20)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_XIL_SHADOW_ERR   vxge_mBIT(21)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_ARB_SHADOW_ERR   vxge_mBIT(22)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_RAM_SHADOW_ERR   vxge_mBIT(23)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CMW_SHADOW_ERR   vxge_mBIT(24)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CMR_SHADOW_ERR   vxge_mBIT(25)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_MPT_REQ_FSM_ERR   vxge_mBIT(26)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_MPT_RSP_FSM_ERR   vxge_mBIT(27)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_UPT_REQ_FSM_ERR   vxge_mBIT(28)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_UPT_RSP_FSM_ERR   vxge_mBIT(29)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CPT_REQ_FSM_ERR   vxge_mBIT(30)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CPT_RSP_FSM_ERR   vxge_mBIT(31)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_XIL_FSM_ERR   vxge_mBIT(32)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_ARB_FSM_ERR   vxge_mBIT(33)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CMW_FSM_ERR   vxge_mBIT(34)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CMR_FSM_ERR   vxge_mBIT(35)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_MXP_RD_PROT_ERR   vxge_mBIT(36)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_UXP_RD_PROT_ERR   vxge_mBIT(37)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CXP_RD_PROT_ERR   vxge_mBIT(38)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_MXP_WR_PROT_ERR   vxge_mBIT(39)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_UXP_WR_PROT_ERR   vxge_mBIT(40)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CXP_WR_PROT_ERR   vxge_mBIT(41)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_MXP_INV_ADDR_ERR   vxge_mBIT(42)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_UXP_INV_ADDR_ERR   vxge_mBIT(43)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CXP_INV_ADDR_ERR   vxge_mBIT(44)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_MXP_RD_PROT_INFO_ERR   vxge_mBIT(45)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_UXP_RD_PROT_INFO_ERR   vxge_mBIT(46)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CXP_RD_PROT_INFO_ERR   vxge_mBIT(47)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_MXP_WR_PROT_INFO_ERR   vxge_mBIT(48)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_UXP_WR_PROT_INFO_ERR   vxge_mBIT(49)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CXP_WR_PROT_INFO_ERR   vxge_mBIT(50)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_MXP_INV_ADDR_INFO_ERR   vxge_mBIT(51)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_UXP_INV_ADDR_INFO_ERR   vxge_mBIT(52)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CXP_INV_ADDR_INFO_ERR   vxge_mBIT(53)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_XT_PIF_SRAM_SG_ERR(val)   vxge_vBIT(val, 54, 2)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CP2BDT_DFIFO_PUSH_ERR   vxge_mBIT(56)
#define	VXGE_HW_PXTMC_ERR_REG_XTMC_CP2BDT_RFIFO_PUSH_ERR   vxge_mBIT(57)
#define	VXGE_HW_CP_ERR_REG_CP_CP_DCACHE_SG_ERR(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_CP_ERR_REG_CP_CP_ICACHE_SG_ERR(val)   vxge_vBIT(val, 8, 2)
#define	VXGE_HW_CP_ERR_REG_CP_CP_DTAG_SG_ERR   vxge_mBIT(10)
#define	VXGE_HW_CP_ERR_REG_CP_CP_ITAG_SG_ERR   vxge_mBIT(11)
#define	VXGE_HW_CP_ERR_REG_CP_CP_TRACE_SG_ERR   vxge_mBIT(12)
#define	VXGE_HW_CP_ERR_REG_CP_DMA2CP_SG_ERR   vxge_mBIT(13)
#define	VXGE_HW_CP_ERR_REG_CP_MP2CP_SG_ERR   vxge_mBIT(14)
#define	VXGE_HW_CP_ERR_REG_CP_QCC2CP_SG_ERR   vxge_mBIT(15)
#define	VXGE_HW_CP_ERR_REG_CP_STC2CP_SG_ERR(val)   vxge_vBIT(val, 16, 2)
#define	VXGE_HW_CP_ERR_REG_CP_CP_DCACHE_DB_ERR(val)   vxge_vBIT(val, 24, 8)
#define	VXGE_HW_CP_ERR_REG_CP_CP_ICACHE_DB_ERR(val)   vxge_vBIT(val, 32, 2)
#define	VXGE_HW_CP_ERR_REG_CP_CP_DTAG_DB_ERR   vxge_mBIT(34)
#define	VXGE_HW_CP_ERR_REG_CP_CP_ITAG_DB_ERR   vxge_mBIT(35)
#define	VXGE_HW_CP_ERR_REG_CP_CP_TRACE_DB_ERR   vxge_mBIT(36)
#define	VXGE_HW_CP_ERR_REG_CP_DMA2CP_DB_ERR   vxge_mBIT(37)
#define	VXGE_HW_CP_ERR_REG_CP_MP2CP_DB_ERR   vxge_mBIT(38)
#define	VXGE_HW_CP_ERR_REG_CP_QCC2CP_DB_ERR   vxge_mBIT(39)
#define	VXGE_HW_CP_ERR_REG_CP_STC2CP_DB_ERR(val)   vxge_vBIT(val, 40, 2)
#define	VXGE_HW_CP_ERR_REG_CP_H2L2CP_FIFO_ERR   vxge_mBIT(48)
#define	VXGE_HW_CP_ERR_REG_CP_STC2CP_FIFO_ERR   vxge_mBIT(49)
#define	VXGE_HW_CP_ERR_REG_CP_STE2CP_FIFO_ERR   vxge_mBIT(50)
#define	VXGE_HW_CP_ERR_REG_CP_TTE2CP_FIFO_ERR   vxge_mBIT(51)
#define	VXGE_HW_CP_ERR_REG_CP_SWIF2CP_FIFO_ERR   vxge_mBIT(52)
#define	VXGE_HW_CP_ERR_REG_CP_CP2DMA_FIFO_ERR   vxge_mBIT(53)
#define	VXGE_HW_CP_ERR_REG_CP_DAM2CP_FIFO_ERR   vxge_mBIT(54)
#define	VXGE_HW_CP_ERR_REG_CP_MP2CP_FIFO_ERR   vxge_mBIT(55)
#define	VXGE_HW_CP_ERR_REG_CP_QCC2CP_FIFO_ERR   vxge_mBIT(56)
#define	VXGE_HW_CP_ERR_REG_CP_DMA2CP_FIFO_ERR   vxge_mBIT(57)
#define	VXGE_HW_CP_ERR_REG_CP_CP_WAKE_FSM_INTEGRITY_ERR   vxge_mBIT(60)
#define	VXGE_HW_CP_ERR_REG_CP_CP_PMON_FSM_INTEGRITY_ERR   vxge_mBIT(61)
#define	VXGE_HW_CP_ERR_REG_CP_DMA_RD_SHADOW_ERR   vxge_mBIT(62)
#define	VXGE_HW_CP_ERR_REG_CP_PIFT_CREDIT_ERR   vxge_mBIT(63)
#define	VXGE_HW_CP_EXC_REG_CP_CP_CAUSE_INFO_INT   vxge_mBIT(47)
#define	VXGE_HW_CP_EXC_REG_CP_CP_CAUSE_CRIT_INT   vxge_mBIT(55)
#define	VXGE_HW_CP_EXC_REG_CP_CP_SERR   vxge_mBIT(63)
#define	VXGE_HW_CP_EXC_CAUSE_CP_CP_CAUSE(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_MSG_INT_STATUS_TIM_ERR_TIM_INT   vxge_mBIT(7)
#define	VXGE_HW_MSG_INT_STATUS_MSG_EXC_MSG_XT_EXC_INT   vxge_mBIT(60)
#define	VXGE_HW_MSG_INT_STATUS_MSG_ERR3_MSG_ERR3_INT   vxge_mBIT(61)
#define	VXGE_HW_MSG_INT_STATUS_MSG_ERR2_MSG_ERR2_INT   vxge_mBIT(62)
#define	VXGE_HW_MSG_INT_STATUS_MSG_ERR_MSG_ERR_INT   vxge_mBIT(63)
#define	VXGE_HW_TIM_ERR_REG_TIM_VBLS_SG_ERR   vxge_mBIT(4)
#define	VXGE_HW_TIM_ERR_REG_TIM_BMAP_PA_SG_ERR   vxge_mBIT(5)
#define	VXGE_HW_TIM_ERR_REG_TIM_BMAP_PB_SG_ERR   vxge_mBIT(6)
#define	VXGE_HW_TIM_ERR_REG_TIM_BMAP_MSG_SG_ERR   vxge_mBIT(7)
#define	VXGE_HW_TIM_ERR_REG_TIM_VBLS_DB_ERR   vxge_mBIT(12)
#define	VXGE_HW_TIM_ERR_REG_TIM_BMAP_PA_DB_ERR   vxge_mBIT(13)
#define	VXGE_HW_TIM_ERR_REG_TIM_BMAP_PB_DB_ERR   vxge_mBIT(14)
#define	VXGE_HW_TIM_ERR_REG_TIM_BMAP_MSG_DB_ERR   vxge_mBIT(15)
#define	VXGE_HW_TIM_ERR_REG_TIM_BMAP_MEM_CNTRL_SM_ERR   vxge_mBIT(18)
#define	VXGE_HW_TIM_ERR_REG_TIM_BMAP_MSG_MEM_CNTRL_SM_ERR   vxge_mBIT(19)
#define	VXGE_HW_TIM_ERR_REG_TIM_MPIF_PCIWR_ERR   vxge_mBIT(20)
#define	VXGE_HW_TIM_ERR_REG_TIM_ROCRC_BMAP_UPDT_FIFO_ERR   vxge_mBIT(22)
#define	VXGE_HW_TIM_ERR_REG_TIM_CREATE_BMAPMSG_FIFO_ERR   vxge_mBIT(23)
#define	VXGE_HW_TIM_ERR_REG_TIM_ROCRCIF_MISMATCH   vxge_mBIT(46)
#define	VXGE_HW_TIM_ERR_REG_TIM_BMAP_MAPPING_VP_ERR(n)   vxge_mBIT(n)
#define	VXGE_HW_MSG_ERR_REG_UP_UXP_WAKE_FSM_INTEGRITY_ERR   vxge_mBIT(0)
#define	VXGE_HW_MSG_ERR_REG_MP_MXP_WAKE_FSM_INTEGRITY_ERR   vxge_mBIT(1)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_DMQ_DMA_READ_CMD_FSM_INTEGRITY_ERR   vxge_mBIT(2)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_DMQ_DMA_RESP_FSM_INTEGRITY_ERR   vxge_mBIT(3)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_DMQ_OWN_FSM_INTEGRITY_ERR   vxge_mBIT(4)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_PDA_ACC_FSM_INTEGRITY_ERR   vxge_mBIT(5)
#define	VXGE_HW_MSG_ERR_REG_MP_MXP_PMON_FSM_INTEGRITY_ERR   vxge_mBIT(6)
#define	VXGE_HW_MSG_ERR_REG_UP_UXP_PMON_FSM_INTEGRITY_ERR   vxge_mBIT(7)
#define	VXGE_HW_MSG_ERR_REG_UP_UXP_DTAG_SG_ERR   vxge_mBIT(8)
#define	VXGE_HW_MSG_ERR_REG_UP_UXP_ITAG_SG_ERR   vxge_mBIT(10)
#define	VXGE_HW_MSG_ERR_REG_MP_MXP_DTAG_SG_ERR   vxge_mBIT(12)
#define	VXGE_HW_MSG_ERR_REG_MP_MXP_ITAG_SG_ERR   vxge_mBIT(14)
#define	VXGE_HW_MSG_ERR_REG_UP_UXP_TRACE_SG_ERR   vxge_mBIT(16)
#define	VXGE_HW_MSG_ERR_REG_MP_MXP_TRACE_SG_ERR   vxge_mBIT(17)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_CMG2MSG_SG_ERR   vxge_mBIT(18)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_TXPE2MSG_SG_ERR   vxge_mBIT(19)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_RXPE2MSG_SG_ERR   vxge_mBIT(20)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_RPE2MSG_SG_ERR   vxge_mBIT(21)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_UMQ_SG_ERR   vxge_mBIT(26)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_BWR_PF_SG_ERR   vxge_mBIT(27)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_DMQ_ECC_SG_ERR   vxge_mBIT(29)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_DMA_RESP_ECC_SG_ERR   vxge_mBIT(31)
#define	VXGE_HW_MSG_ERR_REG_MSG_XFMDQRY_FSM_INTEGRITY_ERR   vxge_mBIT(33)
#define	VXGE_HW_MSG_ERR_REG_MSG_FRMQRY_FSM_INTEGRITY_ERR   vxge_mBIT(34)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_UMQ_WRITE_FSM_INTEGRITY_ERR   vxge_mBIT(35)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_UMQ_BWR_PF_FSM_INTEGRITY_ERR   vxge_mBIT(36)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_REG_RESP_FIFO_ERR   vxge_mBIT(38)
#define	VXGE_HW_MSG_ERR_REG_UP_UXP_DTAG_DB_ERR   vxge_mBIT(39)
#define	VXGE_HW_MSG_ERR_REG_UP_UXP_ITAG_DB_ERR   vxge_mBIT(41)
#define	VXGE_HW_MSG_ERR_REG_MP_MXP_DTAG_DB_ERR   vxge_mBIT(43)
#define	VXGE_HW_MSG_ERR_REG_MP_MXP_ITAG_DB_ERR   vxge_mBIT(45)
#define	VXGE_HW_MSG_ERR_REG_UP_UXP_TRACE_DB_ERR   vxge_mBIT(47)
#define	VXGE_HW_MSG_ERR_REG_MP_MXP_TRACE_DB_ERR   vxge_mBIT(48)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_CMG2MSG_DB_ERR   vxge_mBIT(49)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_TXPE2MSG_DB_ERR   vxge_mBIT(50)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_RXPE2MSG_DB_ERR   vxge_mBIT(51)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_RPE2MSG_DB_ERR   vxge_mBIT(52)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_REG_READ_FIFO_ERR   vxge_mBIT(53)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_MXP2UXP_FIFO_ERR   vxge_mBIT(54)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_KDFC_SIF_FIFO_ERR   vxge_mBIT(55)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_CXP2SWIF_FIFO_ERR   vxge_mBIT(56)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_UMQ_DB_ERR   vxge_mBIT(57)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_BWR_PF_DB_ERR   vxge_mBIT(58)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_BWR_SIF_FIFO_ERR   vxge_mBIT(59)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_DMQ_ECC_DB_ERR   vxge_mBIT(60)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_DMA_READ_FIFO_ERR   vxge_mBIT(61)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_DMA_RESP_ECC_DB_ERR   vxge_mBIT(62)
#define	VXGE_HW_MSG_ERR_REG_MSG_QUE_UXP2MXP_FIFO_ERR   vxge_mBIT(63)
#define	VXGE_HW_MSG_EXC_REG_MP_MXP_CAUSE_INFO_INT   vxge_mBIT(50)
#define	VXGE_HW_MSG_EXC_REG_MP_MXP_CAUSE_CRIT_INT   vxge_mBIT(51)
#define	VXGE_HW_MSG_EXC_REG_UP_UXP_CAUSE_INFO_INT   vxge_mBIT(54)
#define	VXGE_HW_MSG_EXC_REG_UP_UXP_CAUSE_CRIT_INT   vxge_mBIT(55)
#define	VXGE_HW_MSG_EXC_REG_MP_MXP_SERR   vxge_mBIT(62)
#define	VXGE_HW_MSG_EXC_REG_UP_UXP_SERR   vxge_mBIT(63)
#define	VXGE_HW_MSG_EXC_CAUSE_MP_MXP(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_MSG_EXC_CAUSE_UP_UXP(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_CMG2MSG_DISPATCH_FSM_INTEGRITY_ERR   vxge_mBIT(0)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_DMQ_DISPATCH_FSM_INTEGRITY_ERR   vxge_mBIT(1)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_SWIF_DISPATCH_FSM_INTEGRITY_ERR   vxge_mBIT(2)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_PIC_WRITE_FSM_INTEGRITY_ERR   vxge_mBIT(3)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_SWIFREG_FSM_INTEGRITY_ERR   vxge_mBIT(4)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_TIM_WRITE_FSM_INTEGRITY_ERR   vxge_mBIT(5)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_UMQ_TA_FSM_INTEGRITY_ERR   vxge_mBIT(6)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_TXPE_TA_FSM_INTEGRITY_ERR   vxge_mBIT(7)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_RXPE_TA_FSM_INTEGRITY_ERR   vxge_mBIT(8)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_SWIF_TA_FSM_INTEGRITY_ERR   vxge_mBIT(9)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_DMA_TA_FSM_INTEGRITY_ERR   vxge_mBIT(10)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_CP_TA_FSM_INTEGRITY_ERR   vxge_mBIT(11)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA16_FSM_INTEGRITY_ERR   vxge_mBIT(12)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA15_FSM_INTEGRITY_ERR   vxge_mBIT(13)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA14_FSM_INTEGRITY_ERR   vxge_mBIT(14)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA13_FSM_INTEGRITY_ERR   vxge_mBIT(15)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA12_FSM_INTEGRITY_ERR   vxge_mBIT(16)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA11_FSM_INTEGRITY_ERR   vxge_mBIT(17)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA10_FSM_INTEGRITY_ERR   vxge_mBIT(18)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA9_FSM_INTEGRITY_ERR   vxge_mBIT(19)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA8_FSM_INTEGRITY_ERR   vxge_mBIT(20)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA7_FSM_INTEGRITY_ERR   vxge_mBIT(21)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA6_FSM_INTEGRITY_ERR   vxge_mBIT(22)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA5_FSM_INTEGRITY_ERR   vxge_mBIT(23)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA4_FSM_INTEGRITY_ERR   vxge_mBIT(24)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA3_FSM_INTEGRITY_ERR   vxge_mBIT(25)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA2_FSM_INTEGRITY_ERR   vxge_mBIT(26)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA1_FSM_INTEGRITY_ERR   vxge_mBIT(27)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA0_FSM_INTEGRITY_ERR   vxge_mBIT(28)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_FBMC_OWN_FSM_INTEGRITY_ERR   vxge_mBIT(29)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_TXPE2MSG_DISPATCH_FSM_INTEGRITY_ERR   vxge_mBIT(30)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_RXPE2MSG_DISPATCH_FSM_INTEGRITY_ERR   vxge_mBIT(31)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_RPE2MSG_DISPATCH_FSM_INTEGRITY_ERR   vxge_mBIT(32)
#define	VXGE_HW_MSG_ERR2_REG_MP_MP_PIFT_IF_CREDIT_CNT_ERR   vxge_mBIT(33)
#define	VXGE_HW_MSG_ERR2_REG_UP_UP_PIFT_IF_CREDIT_CNT_ERR   vxge_mBIT(34)
#define	VXGE_HW_MSG_ERR2_REG_MSG_QUE_UMQ2PIC_CMD_FIFO_ERR   vxge_mBIT(62)
#define	VXGE_HW_MSG_ERR2_REG_TIM_TIM2MSG_CMD_FIFO_ERR   vxge_mBIT(63)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_SG_ERR0   vxge_mBIT(0)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_SG_ERR1   vxge_mBIT(1)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_SG_ERR2   vxge_mBIT(2)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_SG_ERR3   vxge_mBIT(3)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_SG_ERR4   vxge_mBIT(4)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_SG_ERR5   vxge_mBIT(5)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_SG_ERR6   vxge_mBIT(6)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_SG_ERR7   vxge_mBIT(7)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_ICACHE_SG_ERR0   vxge_mBIT(8)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_ICACHE_SG_ERR1   vxge_mBIT(9)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_SG_ERR0   vxge_mBIT(16)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_SG_ERR1   vxge_mBIT(17)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_SG_ERR2   vxge_mBIT(18)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_SG_ERR3   vxge_mBIT(19)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_SG_ERR4   vxge_mBIT(20)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_SG_ERR5   vxge_mBIT(21)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_SG_ERR6   vxge_mBIT(22)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_SG_ERR7   vxge_mBIT(23)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_ICACHE_SG_ERR0   vxge_mBIT(24)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_ICACHE_SG_ERR1   vxge_mBIT(25)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_DB_ERR0   vxge_mBIT(32)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_DB_ERR1   vxge_mBIT(33)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_DB_ERR2   vxge_mBIT(34)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_DB_ERR3   vxge_mBIT(35)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_DB_ERR4   vxge_mBIT(36)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_DB_ERR5   vxge_mBIT(37)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_DB_ERR6   vxge_mBIT(38)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_DB_ERR7   vxge_mBIT(39)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_ICACHE_DB_ERR0   vxge_mBIT(40)
#define	VXGE_HW_MSG_ERR3_REG_UP_UXP_ICACHE_DB_ERR1   vxge_mBIT(41)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_DB_ERR0   vxge_mBIT(48)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_DB_ERR1   vxge_mBIT(49)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_DB_ERR2   vxge_mBIT(50)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_DB_ERR3   vxge_mBIT(51)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_DB_ERR4   vxge_mBIT(52)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_DB_ERR5   vxge_mBIT(53)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_DB_ERR6   vxge_mBIT(54)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_DB_ERR7   vxge_mBIT(55)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_ICACHE_DB_ERR0   vxge_mBIT(56)
#define	VXGE_HW_MSG_ERR3_REG_MP_MXP_ICACHE_DB_ERR1   vxge_mBIT(57)
#define	VXGE_HW_FAU_GEN_ERR_REG_FMPF_PORT0_PERMANENT_STOP   vxge_mBIT(3)
#define	VXGE_HW_FAU_GEN_ERR_REG_FMPF_PORT1_PERMANENT_STOP   vxge_mBIT(7)
#define	VXGE_HW_FAU_GEN_ERR_REG_FMPF_PORT2_PERMANENT_STOP   vxge_mBIT(11)
#define	VXGE_HW_FAU_GEN_ERR_REG_FALR_AUTO_LRO_NOTIFICATION   vxge_mBIT(15)
#define	VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT0_FAU_MAC2F_N_SG_ERR   vxge_mBIT(0)
#define	VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT0_FAU_MAC2F_N_DB_ERR   vxge_mBIT(1)
#define	VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT0_FAU_MAC2F_W_SG_ERR(val)   vxge_vBIT(val, 2, 2)
#define	VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT0_FAU_MAC2F_W_DB_ERR(val)   vxge_vBIT(val, 4, 2)
#define	VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT1_FAU_MAC2F_N_SG_ERR   vxge_mBIT(6)
#define	VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT1_FAU_MAC2F_N_DB_ERR   vxge_mBIT(7)
#define	VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT1_FAU_MAC2F_W_SG_ERR(val)   vxge_vBIT(val, 8, 2)
#define	VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT1_FAU_MAC2F_W_DB_ERR(val)   vxge_vBIT(val, 10, 2)
#define	VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT2_FAU_MAC2F_N_SG_ERR   vxge_mBIT(12)
#define	VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT2_FAU_MAC2F_N_DB_ERR   vxge_mBIT(13)
#define	VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT2_FAU_MAC2F_W_SG_ERR(val)   vxge_vBIT(val, 14, 2)
#define	VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT2_FAU_MAC2F_W_DB_ERR(val)   vxge_vBIT(val, 16, 2)
#define	VXGE_HW_FAU_ECC_ERR_REG_FAU_FAU_XFMD_INS_SG_ERR(val)   vxge_vBIT(val, 18, 2)
#define	VXGE_HW_FAU_ECC_ERR_REG_FAU_FAU_XFMD_INS_DB_ERR(val)   vxge_vBIT(val, 20, 2)
#define	VXGE_HW_FAU_ECC_ERR_REG_FAUJ_FAU_FSM_ERR   vxge_mBIT(31)
#define	VXGE_HW_FAU_PA_CFG_REPL_L4_COMP_CSUM   vxge_mBIT(3)
#define	VXGE_HW_FAU_PA_CFG_REPL_L3_INCL_CF   vxge_mBIT(7)
#define	VXGE_HW_FAU_PA_CFG_REPL_L3_COMP_CSUM   vxge_mBIT(11)
#define	VXGE_HW_DBG_STATS_FAU_RX_PATH_RX_PERMITTED_FRMS(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_FAU_LAG_CFG_COLL_ALG(val)   vxge_vBIT(val, 2, 2)
#define	VXGE_HW_FAU_LAG_CFG_INCR_RX_AGGR_STATS   vxge_mBIT(7)
#define	VXGE_HW_TPA_INT_STATUS_ORP_ERR_ORP_INT   vxge_mBIT(15)
#define	VXGE_HW_TPA_INT_STATUS_PTM_ALARM_PTM_INT   vxge_mBIT(23)
#define	VXGE_HW_TPA_INT_STATUS_TPA_ERROR_TPA_INT   vxge_mBIT(31)
#define	VXGE_HW_ORP_ERR_REG_ORP_FIFO_SG_ERR   vxge_mBIT(3)
#define	VXGE_HW_ORP_ERR_REG_ORP_FIFO_DB_ERR   vxge_mBIT(7)
#define	VXGE_HW_ORP_ERR_REG_ORP_XFMD_FIFO_UFLOW_ERR   vxge_mBIT(11)
#define	VXGE_HW_ORP_ERR_REG_ORP_FRM_FIFO_UFLOW_ERR   vxge_mBIT(15)
#define	VXGE_HW_ORP_ERR_REG_ORP_XFMD_RCV_FSM_ERR   vxge_mBIT(19)
#define	VXGE_HW_ORP_ERR_REG_ORP_OUTREAD_FSM_ERR   vxge_mBIT(23)
#define	VXGE_HW_ORP_ERR_REG_ORP_OUTQEM_FSM_ERR   vxge_mBIT(27)
#define	VXGE_HW_ORP_ERR_REG_ORP_XFMD_RCV_SHADOW_ERR   vxge_mBIT(31)
#define	VXGE_HW_ORP_ERR_REG_ORP_OUTREAD_SHADOW_ERR   vxge_mBIT(35)
#define	VXGE_HW_ORP_ERR_REG_ORP_OUTQEM_SHADOW_ERR   vxge_mBIT(39)
#define	VXGE_HW_ORP_ERR_REG_ORP_OUTFRM_SHADOW_ERR   vxge_mBIT(43)
#define	VXGE_HW_ORP_ERR_REG_ORP_OPTPRS_SHADOW_ERR   vxge_mBIT(47)
#define	VXGE_HW_PTM_ALARM_REG_PTM_RDCTRL_SYNC_ERR   vxge_mBIT(3)
#define	VXGE_HW_PTM_ALARM_REG_PTM_RDCTRL_FIFO_ERR   vxge_mBIT(7)
#define	VXGE_HW_PTM_ALARM_REG_XFMD_RD_FIFO_ERR   vxge_mBIT(11)
#define	VXGE_HW_PTM_ALARM_REG_WDE2MSR_WR_FIFO_ERR   vxge_mBIT(15)
#define	VXGE_HW_PTM_ALARM_REG_PTM_FRMM_ECC_DB_ERR(val)   vxge_vBIT(val, 18, 2)
#define	VXGE_HW_PTM_ALARM_REG_PTM_FRMM_ECC_SG_ERR(val)   vxge_vBIT(val, 22, 2)
#define	VXGE_HW_TPA_ERROR_REG_TPA_FSM_ERR_ALARM   vxge_mBIT(3)
#define	VXGE_HW_TPA_ERROR_REG_TPA_TPA_DA_LKUP_PRT0_DB_ERR   vxge_mBIT(7)
#define	VXGE_HW_TPA_ERROR_REG_TPA_TPA_DA_LKUP_PRT0_SG_ERR   vxge_mBIT(11)
#define	VXGE_HW_TPA_GLOBAL_CFG_SUPPORT_SNAP_AB_N   vxge_mBIT(7)
#define	VXGE_HW_TPA_GLOBAL_CFG_ECC_ENABLE_N   vxge_mBIT(35)
#define	VXGE_HW_PTM_ECC_CFG_PTM_FRMM_ECC_EN_N   vxge_mBIT(3)
#define	VXGE_HW_PTM_PHASE_CFG_FRMM_WR_PHASE_EN   vxge_mBIT(3)
#define	VXGE_HW_PTM_PHASE_CFG_FRMM_RD_PHASE_EN   vxge_mBIT(7)
#define	VXGE_HW_DBG_STATS_TPA_TX_PATH_TX_PERMITTED_FRMS(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_TMAC_INT_STATUS_TXMAC_GEN_ERR_TXMAC_GEN_INT   vxge_mBIT(3)
#define	VXGE_HW_TMAC_INT_STATUS_TXMAC_ECC_ERR_TXMAC_ECC_INT   vxge_mBIT(7)
#define	VXGE_HW_TXMAC_GEN_ERR_REG_TMACJ_PERMANENT_STOP   vxge_mBIT(3)
#define	VXGE_HW_TXMAC_GEN_ERR_REG_TMACJ_NO_VALID_VSPORT   vxge_mBIT(7)
#define	VXGE_HW_TXMAC_ECC_ERR_REG_TMACJ_TMAC_TPA2MAC_SG_ERR   vxge_mBIT(3)
#define	VXGE_HW_TXMAC_ECC_ERR_REG_TMACJ_TMAC_TPA2MAC_DB_ERR   vxge_mBIT(7)
#define	VXGE_HW_TXMAC_ECC_ERR_REG_TMACJ_TMAC_TPA2M_SB_SG_ERR   vxge_mBIT(11)
#define	VXGE_HW_TXMAC_ECC_ERR_REG_TMACJ_TMAC_TPA2M_SB_DB_ERR   vxge_mBIT(15)
#define	VXGE_HW_TXMAC_ECC_ERR_REG_TMACJ_TMAC_TPA2M_DA_SG_ERR   vxge_mBIT(19)
#define	VXGE_HW_TXMAC_ECC_ERR_REG_TMACJ_TMAC_TPA2M_DA_DB_ERR   vxge_mBIT(23)
#define	VXGE_HW_TXMAC_ECC_ERR_REG_TMAC_TMAC_PORT0_FSM_ERR   vxge_mBIT(27)
#define	VXGE_HW_TXMAC_ECC_ERR_REG_TMAC_TMAC_PORT1_FSM_ERR   vxge_mBIT(31)
#define	VXGE_HW_TXMAC_ECC_ERR_REG_TMAC_TMAC_PORT2_FSM_ERR   vxge_mBIT(35)
#define	VXGE_HW_TXMAC_ECC_ERR_REG_TMACJ_TMACJ_FSM_ERR   vxge_mBIT(39)
#define	VXGE_HW_DBG_STAT_TX_ANY_FRMS_PORT0_TX_ANY_FRMS(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_DBG_STAT_TX_ANY_FRMS_PORT1_TX_ANY_FRMS(val)   vxge_vBIT(val, 8, 8)
#define	VXGE_HW_DBG_STAT_TX_ANY_FRMS_PORT2_TX_ANY_FRMS(val)   vxge_vBIT(val, 16, 8)
#define	VXGE_HW_TXMAC_LINK_UTIL_PORT_TMAC_TMAC_UTILIZATION(val)   vxge_vBIT(val, 1, 7)
#define	VXGE_HW_TXMAC_LINK_UTIL_PORT_TMAC_UTIL_CFG(val)   vxge_vBIT(val, 8, 4)
#define	VXGE_HW_TXMAC_LINK_UTIL_PORT_TMAC_TMAC_FRAC_UTIL(val)   vxge_vBIT(val, 12, 4)
#define	VXGE_HW_TXMAC_LINK_UTIL_PORT_TMAC_PKT_WEIGHT(val)   vxge_vBIT(val, 16, 4)
#define	VXGE_HW_TXMAC_LINK_UTIL_PORT_TMAC_TMAC_SCALE_FACTOR   vxge_mBIT(23)
#define	VXGE_HW_TXMAC_CFG0_PORT_TMAC_EN   vxge_mBIT(3)
#define	VXGE_HW_TXMAC_CFG0_PORT_APPEND_PAD   vxge_mBIT(7)
#define	VXGE_HW_TXMAC_CFG0_PORT_PAD_BYTE(val)   vxge_vBIT(val, 8, 8)
#define	VXGE_HW_TXMAC_CFG1_PORT_AVG_IPG(val)   vxge_vBIT(val, 40, 8)
#define	VXGE_HW_TXMAC_STATUS_PORT_TMAC_TX_FRM_SENT   vxge_mBIT(3)
#define	VXGE_HW_LAG_DISTRIB_DEST_MAP_VPATH(n)   vxge_mBIT(n)
#define	VXGE_HW_LAG_MARKER_CFG_GEN_RCVR_EN   vxge_mBIT(3)
#define	VXGE_HW_LAG_MARKER_CFG_RESP_EN   vxge_mBIT(7)
#define	VXGE_HW_LAG_MARKER_CFG_RESP_TIMEOUT(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_LAG_MARKER_CFG_SLOW_PROTO_MRKR_MIN_INTERVAL(val)   vxge_vBIT(val, 32, 16)
#define	VXGE_HW_LAG_MARKER_CFG_THROTTLE_MRKR_RESP   vxge_mBIT(51)
#define	VXGE_HW_LAG_TX_CFG_INCR_TX_AGGR_STATS   vxge_mBIT(3)
#define	VXGE_HW_LAG_TX_CFG_DISTRIB_ALG_SEL(val)   vxge_vBIT(val, 6, 2)
#define	VXGE_HW_LAG_TX_CFG_DISTRIB_REMAP_IF_FAIL   vxge_mBIT(11)
#define	VXGE_HW_LAG_TX_CFG_COLL_MAX_DELAY(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_LAG_TX_STATUS_TLAG_TIMER_VAL_EMPTIED_LINK(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_LAG_TX_STATUS_TLAG_TIMER_VAL_SLOW_PROTO_MRKR(val)   vxge_vBIT(val, 8, 8)
#define	VXGE_HW_LAG_TX_STATUS_TLAG_TIMER_VAL_SLOW_PROTO_MRKRRESP(val)   vxge_vBIT(val, 16, 8)
#define	VXGE_HAL_SRPCIM_TO_MRPCIM_VPLANE_RMSG_SWIF_SRPCIM_TO_MRPCIM_VPLANE_RMSG(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_MRPCIM_TO_SRPCIM_VPLANE_WMSG_MRPCIM_TO_SRPCIM_VPLANE_WMSG(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_DEBUG_STATS0_RSTDROP_MSG(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_DEBUG_STATS0_RSTDROP_CPL(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_DEBUG_STATS1_RSTDROP_CLIENT0(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_DEBUG_STATS1_RSTDROP_CLIENT1(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_DEBUG_STATS2_RSTDROP_CLIENT2(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_DEBUG_STATS3_VPLANE_DEPL_PH(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_DEBUG_STATS3_VPLANE_DEPL_NPH(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_DEBUG_STATS3_VPLANE_DEPL_CPLH(val)   vxge_vBIT(val, 32, 16)
#define	VXGE_HW_DEBUG_STATS4_VPLANE_DEPL_PD(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_DEBUG_STATS4_VPLANE_DEPL_NPD(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_DEBUG_STATS4_VPLANE_DEPL_CPLD(val)   vxge_vBIT(val, 32, 16)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_PIC_INT   vxge_mBIT(0)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_PCI_INT   vxge_mBIT(1)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_RTDMA_INT   vxge_mBIT(2)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_WRDMA_INT   vxge_mBIT(3)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_G3CMCT_INT   vxge_mBIT(4)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_GCMG1_INT   vxge_mBIT(5)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_GCMG2_INT   vxge_mBIT(6)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_GCMG3_INT   vxge_mBIT(7)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_G3CMIFL_INT   vxge_mBIT(8)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_G3CMIFU_INT   vxge_mBIT(9)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_PCMG1_INT   vxge_mBIT(10)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_PCMG2_INT   vxge_mBIT(11)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_PCMG3_INT   vxge_mBIT(12)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_XMAC_INT   vxge_mBIT(13)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_RXMAC_INT   vxge_mBIT(14)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_TMAC_INT   vxge_mBIT(15)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_G3FBIF_INT   vxge_mBIT(16)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_FBMC_INT   vxge_mBIT(17)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_G3FBCT_INT   vxge_mBIT(18)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_TPA_INT   vxge_mBIT(19)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_DRBELL_INT   vxge_mBIT(20)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_ONE_INT   vxge_mBIT(21)
#define	VXGE_HW_MRPCIM_GENERAL_INT_STATUS_MSG_INT   vxge_mBIT(22)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_PIC_INT   vxge_mBIT(0)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_PCI_INT   vxge_mBIT(1)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_RTDMA_INT   vxge_mBIT(2)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_WRDMA_INT   vxge_mBIT(3)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_G3CMCT_INT   vxge_mBIT(4)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_GCMG1_INT   vxge_mBIT(5)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_GCMG2_INT   vxge_mBIT(6)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_GCMG3_INT   vxge_mBIT(7)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_G3CMIFL_INT   vxge_mBIT(8)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_G3CMIFU_INT   vxge_mBIT(9)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_PCMG1_INT   vxge_mBIT(10)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_PCMG2_INT   vxge_mBIT(11)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_PCMG3_INT   vxge_mBIT(12)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_XMAC_INT   vxge_mBIT(13)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_RXMAC_INT   vxge_mBIT(14)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_TMAC_INT   vxge_mBIT(15)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_G3FBIF_INT   vxge_mBIT(16)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_FBMC_INT   vxge_mBIT(17)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_G3FBCT_INT   vxge_mBIT(18)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_TPA_INT   vxge_mBIT(19)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_DRBELL_INT   vxge_mBIT(20)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_ONE_INT   vxge_mBIT(21)
#define	VXGE_HW_MRPCIM_GENERAL_INT_MASK_MSG_INT   vxge_mBIT(22)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_INI_ERRORS_INI_INT   vxge_mBIT(3)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_DMA_ERRORS_DMA_INT   vxge_mBIT(7)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_TGT_ERRORS_TGT_INT   vxge_mBIT(11)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CONFIG_ERRORS_CONFIG_INT   vxge_mBIT(15)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_CRDT_INT   vxge_mBIT(19)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_PLL_ERRORS_PLL_INT   vxge_mBIT(27)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE0_CRD_INT_VPLANE0_INT   vxge_mBIT(31)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE1_CRD_INT_VPLANE1_INT   vxge_mBIT(32)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE2_CRD_INT_VPLANE2_INT   vxge_mBIT(33)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE3_CRD_INT_VPLANE3_INT   vxge_mBIT(34)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE4_CRD_INT_VPLANE4_INT   vxge_mBIT(35)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE5_CRD_INT_VPLANE5_INT   vxge_mBIT(36)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE6_CRD_INT_VPLANE6_INT   vxge_mBIT(37)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE7_CRD_INT_VPLANE7_INT   vxge_mBIT(38)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE8_CRD_INT_VPLANE8_INT   vxge_mBIT(39)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE9_CRD_INT_VPLANE9_INT   vxge_mBIT(40)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE10_CRD_INT_VPLANE10_INT   vxge_mBIT(41)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE11_CRD_INT_VPLANE11_INT   vxge_mBIT(42)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE12_CRD_INT_VPLANE12_INT   vxge_mBIT(43)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE13_CRD_INT_VPLANE13_INT   vxge_mBIT(44)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE14_CRD_INT_VPLANE14_INT   vxge_mBIT(45)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE15_CRD_INT_VPLANE15_INT   vxge_mBIT(46)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE16_CRD_INT_VPLANE16_INT   vxge_mBIT(47)
#define	VXGE_HW_MRPCIM_PPIF_INT_STATUS_VPATH_TO_MRPCIM_ALARM_VPATH_TO_MRPCIM_ALARM_INT   vxge_mBIT(55)
#define	VXGE_HW_INI_ERRORS_REG_SCPL_CPL_TIMEOUT_UNUSED_TAG   vxge_mBIT(3)
#define	VXGE_HW_INI_ERRORS_REG_SCPL_CPL_TIMEOUT   vxge_mBIT(7)
#define	VXGE_HW_INI_ERRORS_REG_DCPL_FSM_ERR   vxge_mBIT(11)
#define	VXGE_HW_INI_ERRORS_REG_DCPL_POISON   vxge_mBIT(12)
#define	VXGE_HW_INI_ERRORS_REG_DCPL_UNSUPPORTED   vxge_mBIT(15)
#define	VXGE_HW_INI_ERRORS_REG_DCPL_ABORT   vxge_mBIT(19)
#define	VXGE_HW_INI_ERRORS_REG_INI_TLP_ABORT   vxge_mBIT(23)
#define	VXGE_HW_INI_ERRORS_REG_INI_DLLP_ABORT   vxge_mBIT(27)
#define	VXGE_HW_INI_ERRORS_REG_INI_ECRC_ERR   vxge_mBIT(31)
#define	VXGE_HW_INI_ERRORS_REG_INI_BUF_DB_ERR   vxge_mBIT(35)
#define	VXGE_HW_INI_ERRORS_REG_INI_BUF_SG_ERR   vxge_mBIT(39)
#define	VXGE_HW_INI_ERRORS_REG_INI_DATA_OVERFLOW   vxge_mBIT(43)
#define	VXGE_HW_INI_ERRORS_REG_INI_HDR_OVERFLOW   vxge_mBIT(47)
#define	VXGE_HW_INI_ERRORS_REG_INI_MRD_SYS_DROP   vxge_mBIT(51)
#define	VXGE_HW_INI_ERRORS_REG_INI_MWR_SYS_DROP   vxge_mBIT(55)
#define	VXGE_HW_INI_ERRORS_REG_INI_MRD_CLIENT_DROP   vxge_mBIT(59)
#define	VXGE_HW_INI_ERRORS_REG_INI_MWR_CLIENT_DROP   vxge_mBIT(63)
#define	VXGE_HW_DMA_ERRORS_REG_RDARB_FSM_ERR   vxge_mBIT(3)
#define	VXGE_HW_DMA_ERRORS_REG_WRARB_FSM_ERR   vxge_mBIT(7)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_WRDMA_WR_HDR_OVERFLOW   vxge_mBIT(8)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_WRDMA_WR_HDR_UNDERFLOW   vxge_mBIT(9)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_WRDMA_WR_DATA_OVERFLOW   vxge_mBIT(10)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_WRDMA_WR_DATA_UNDERFLOW   vxge_mBIT(11)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_MSG_WR_HDR_OVERFLOW   vxge_mBIT(12)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_MSG_WR_HDR_UNDERFLOW   vxge_mBIT(13)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_MSG_WR_DATA_OVERFLOW   vxge_mBIT(14)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_MSG_WR_DATA_UNDERFLOW   vxge_mBIT(15)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_STATS_WR_HDR_OVERFLOW   vxge_mBIT(16)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_STATS_WR_HDR_UNDERFLOW   vxge_mBIT(17)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_STATS_WR_DATA_OVERFLOW   vxge_mBIT(18)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_STATS_WR_DATA_UNDERFLOW   vxge_mBIT(19)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_RTDMA_WR_HDR_OVERFLOW   vxge_mBIT(20)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_RTDMA_WR_HDR_UNDERFLOW   vxge_mBIT(21)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_RTDMA_WR_DATA_OVERFLOW   vxge_mBIT(22)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_RTDMA_WR_DATA_UNDERFLOW   vxge_mBIT(23)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_WRDMA_RD_HDR_OVERFLOW   vxge_mBIT(24)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_WRDMA_RD_HDR_UNDERFLOW   vxge_mBIT(25)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_RTDMA_RD_HDR_OVERFLOW   vxge_mBIT(28)
#define	VXGE_HW_DMA_ERRORS_REG_DMA_RTDMA_RD_HDR_UNDERFLOW   vxge_mBIT(29)
#define	VXGE_HW_DMA_ERRORS_REG_DBLGEN_FSM_ERR   vxge_mBIT(32)
#define	VXGE_HW_DMA_ERRORS_REG_DBLGEN_CREDIT_FSM_ERR   vxge_mBIT(33)
#define	VXGE_HW_DMA_ERRORS_REG_DBLGEN_DMA_WRR_SM_ERR   vxge_mBIT(34)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_VENDOR_MSG   vxge_mBIT(0)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_MSG_UNLOCK   vxge_mBIT(1)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_ILLEGAL_TLP_BE   vxge_mBIT(2)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_BOOT_WRITE   vxge_mBIT(3)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_PIF_WR_CROSS_QWRANGE   vxge_mBIT(4)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_PIF_READ_CROSS_QWRANGE   vxge_mBIT(5)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_KDFC_READ   vxge_mBIT(6)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_USDC_READ   vxge_mBIT(7)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_USDC_WR_CROSS_QWRANGE   vxge_mBIT(8)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_MSIX_BEYOND_RANGE   vxge_mBIT(9)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_WR_TO_KDFC_POISON   vxge_mBIT(10)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_WR_TO_USDC_POISON   vxge_mBIT(11)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_WR_TO_PIF_POISON   vxge_mBIT(12)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_WR_TO_MSIX_POISON   vxge_mBIT(13)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_WR_TO_MRIOV_POISON   vxge_mBIT(14)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_NOT_MEM_TLP   vxge_mBIT(15)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_UNKNOWN_MEM_TLP   vxge_mBIT(16)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_REQ_FSM_ERR   vxge_mBIT(17)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_CPL_FSM_ERR   vxge_mBIT(18)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_KDFC_PROT_ERR   vxge_mBIT(19)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_SWIF_PROT_ERR   vxge_mBIT(20)
#define	VXGE_HW_TGT_ERRORS_REG_TGT_MRIOV_MEM_MAP_CFG_ERR   vxge_mBIT(21)
#define	VXGE_HW_CONFIG_ERRORS_REG_I2C_ILLEGAL_STOP_COND   vxge_mBIT(3)
#define	VXGE_HW_CONFIG_ERRORS_REG_I2C_ILLEGAL_START_COND   vxge_mBIT(7)
#define	VXGE_HW_CONFIG_ERRORS_REG_I2C_EXP_RD_CNT   vxge_mBIT(11)
#define	VXGE_HW_CONFIG_ERRORS_REG_I2C_EXTRA_CYCLE   vxge_mBIT(15)
#define	VXGE_HW_CONFIG_ERRORS_REG_I2C_MAIN_FSM_ERR   vxge_mBIT(19)
#define	VXGE_HW_CONFIG_ERRORS_REG_I2C_REQ_COLLISION   vxge_mBIT(23)
#define	VXGE_HW_CONFIG_ERRORS_REG_I2C_REG_FSM_ERR   vxge_mBIT(27)
#define	VXGE_HW_CONFIG_ERRORS_REG_CFGM_I2C_TIMEOUT   vxge_mBIT(31)
#define	VXGE_HW_CONFIG_ERRORS_REG_RIC_I2C_TIMEOUT   vxge_mBIT(35)
#define	VXGE_HW_CONFIG_ERRORS_REG_CFGM_FSM_ERR   vxge_mBIT(39)
#define	VXGE_HW_CONFIG_ERRORS_REG_RIC_FSM_ERR   vxge_mBIT(43)
#define	VXGE_HW_CONFIG_ERRORS_REG_PIFM_ILLEGAL_ACCESS   vxge_mBIT(47)
#define	VXGE_HW_CONFIG_ERRORS_REG_PIFM_TIMEOUT   vxge_mBIT(51)
#define	VXGE_HW_CONFIG_ERRORS_REG_PIFM_FSM_ERR   vxge_mBIT(55)
#define	VXGE_HW_CONFIG_ERRORS_REG_PIFM_TO_FSM_ERR   vxge_mBIT(59)
#define	VXGE_HW_CONFIG_ERRORS_REG_RIC_RIC_RD_TIMEOUT   vxge_mBIT(63)
#define	VXGE_HW_CRDT_ERRORS_REG_WRCRDTARB_FSM_ERR   vxge_mBIT(11)
#define	VXGE_HW_CRDT_ERRORS_REG_WRCRDTARB_INTCTL_ILLEGAL_CRD_DEAL   vxge_mBIT(15)
#define	VXGE_HW_CRDT_ERRORS_REG_WRCRDTARB_PDA_ILLEGAL_CRD_DEAL   vxge_mBIT(19)
#define	VXGE_HW_CRDT_ERRORS_REG_WRCRDTARB_PCI_MSG_ILLEGAL_CRD_DEAL   vxge_mBIT(23)
#define	VXGE_HW_CRDT_ERRORS_REG_RDCRDTARB_FSM_ERR   vxge_mBIT(35)
#define	VXGE_HW_CRDT_ERRORS_REG_RDCRDTARB_RDA_ILLEGAL_CRD_DEAL   vxge_mBIT(39)
#define	VXGE_HW_CRDT_ERRORS_REG_RDCRDTARB_PDA_ILLEGAL_CRD_DEAL   vxge_mBIT(43)
#define	VXGE_HW_CRDT_ERRORS_REG_RDCRDTARB_DBLGEN_ILLEGAL_CRD_DEAL   vxge_mBIT(47)
#define	VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_STATSB_FSM_ERR   vxge_mBIT(3)
#define	VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_XGEN_FSM_ERR   vxge_mBIT(7)
#define	VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_XMEM_FSM_ERR   vxge_mBIT(11)
#define	VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_KDFCCTL_FSM_ERR   vxge_mBIT(15)
#define	VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_MRIOVCTL_FSM_ERR   vxge_mBIT(19)
#define	VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_SPI_FLSH_ERR   vxge_mBIT(23)
#define	VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_SPI_IIC_ACK_ERR   vxge_mBIT(27)
#define	VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_SPI_IIC_CHKSUM_ERR   vxge_mBIT(31)
#define	VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_INI_SERR_DET   vxge_mBIT(35)
#define	VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_INTCTL_MSIX_FSM_ERR   vxge_mBIT(39)
#define	VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_INTCTL_MSI_OVERFLOW   vxge_mBIT(43)
#define	VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_PPIF_PCI_NOT_FLUSH_DURING_SW_RESET   vxge_mBIT(47)
#define	VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_PPIF_SW_RESET_FSM_ERR   vxge_mBIT(51)
#define	VXGE_HW_PLL_ERRORS_REG_CORE_CMG_PLL_OOL   vxge_mBIT(3)
#define	VXGE_HW_PLL_ERRORS_REG_CORE_FB_PLL_OOL   vxge_mBIT(7)
#define	VXGE_HW_PLL_ERRORS_REG_CORE_X_PLL_OOL   vxge_mBIT(11)
#define	VXGE_HW_SRPCIM_TO_MRPCIM_ALARM_REG_PPIF_SRPCIM_TO_MRPCIM_ALARM(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_VPATH_TO_MRPCIM_ALARM_REG_PPIF_VPATH_TO_MRPCIM_ALARM(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_CRDT_ERRORS_VPLANE_REG_WRCRDTARB_P_H_CONSUME_CRDT_ERR   vxge_mBIT(3)
#define	VXGE_HW_CRDT_ERRORS_VPLANE_REG_WRCRDTARB_P_D_CONSUME_CRDT_ERR   vxge_mBIT(7)
#define	VXGE_HW_CRDT_ERRORS_VPLANE_REG_WRCRDTARB_P_H_RETURN_CRDT_ERR   vxge_mBIT(11)
#define	VXGE_HW_CRDT_ERRORS_VPLANE_REG_WRCRDTARB_P_D_RETURN_CRDT_ERR   vxge_mBIT(15)
#define	VXGE_HW_CRDT_ERRORS_VPLANE_REG_RDCRDTARB_NP_H_CONSUME_CRDT_ERR   vxge_mBIT(19)
#define	VXGE_HW_CRDT_ERRORS_VPLANE_REG_RDCRDTARB_NP_H_RETURN_CRDT_ERR   vxge_mBIT(23)
#define	VXGE_HW_CRDT_ERRORS_VPLANE_REG_RDCRDTARB_TAG_CONSUME_TAG_ERR   vxge_mBIT(27)
#define	VXGE_HW_CRDT_ERRORS_VPLANE_REG_RDCRDTARB_TAG_RETURN_TAG_ERR   vxge_mBIT(31)
#define	VXGE_HW_MRPCIM_RST_IN_PROG_MRPCIM_RST_IN_PROG   vxge_mBIT(7)
#define	VXGE_HW_MRPCIM_REG_MODIFIED_MRPCIM_REG_MODIFIED   vxge_mBIT(7)
#define	VXGE_HW_WRITE_ARB_PENDING_WRARB_WRDMA   vxge_mBIT(3)
#define	VXGE_HW_WRITE_ARB_PENDING_WRARB_RTDMA   vxge_mBIT(7)
#define	VXGE_HW_WRITE_ARB_PENDING_WRARB_MSG   vxge_mBIT(11)
#define	VXGE_HW_WRITE_ARB_PENDING_WRARB_STATSB   vxge_mBIT(15)
#define	VXGE_HW_WRITE_ARB_PENDING_WRARB_INTCTL   vxge_mBIT(19)
#define	VXGE_HW_READ_ARB_PENDING_RDARB_WRDMA   vxge_mBIT(3)
#define	VXGE_HW_READ_ARB_PENDING_RDARB_RTDMA   vxge_mBIT(7)
#define	VXGE_HW_READ_ARB_PENDING_RDARB_DBLGEN   vxge_mBIT(11)
#define	VXGE_HW_DMAIF_DMADBL_PENDING_DMAIF_WRDMA_WR   vxge_mBIT(0)
#define	VXGE_HW_DMAIF_DMADBL_PENDING_DMAIF_WRDMA_RD   vxge_mBIT(1)
#define	VXGE_HW_DMAIF_DMADBL_PENDING_DMAIF_RTDMA_WR   vxge_mBIT(2)
#define	VXGE_HW_DMAIF_DMADBL_PENDING_DMAIF_RTDMA_RD   vxge_mBIT(3)
#define	VXGE_HW_DMAIF_DMADBL_PENDING_DMAIF_MSG_WR   vxge_mBIT(4)
#define	VXGE_HW_DMAIF_DMADBL_PENDING_DMAIF_STATS_WR   vxge_mBIT(5)
#define	VXGE_HW_DMAIF_DMADBL_PENDING_DBLGEN_IN_PROG(val)   vxge_vBIT(val, 13, 51)
#define	VXGE_HW_WRCRDTARB_STATUS0_VPLANE_WRCRDTARB_ABS_AVAIL_P_H(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_WRCRDTARB_STATUS1_VPLANE_WRCRDTARB_ABS_AVAIL_P_D(val)   vxge_vBIT(val, 4, 12)
#define	VXGE_HW_MRPCIM_GENERAL_CFG1_CLEAR_SERR   vxge_mBIT(7)
#define	VXGE_HW_MRPCIM_GENERAL_CFG2_INS_TX_WR_TD   vxge_mBIT(3)
#define	VXGE_HW_MRPCIM_GENERAL_CFG2_INS_TX_RD_TD   vxge_mBIT(7)
#define	VXGE_HW_MRPCIM_GENERAL_CFG2_INS_TX_CPL_TD   vxge_mBIT(11)
#define	VXGE_HW_MRPCIM_GENERAL_CFG2_INI_TIMEOUT_EN_MWR   vxge_mBIT(15)
#define	VXGE_HW_MRPCIM_GENERAL_CFG2_INI_TIMEOUT_EN_MRD   vxge_mBIT(19)
#define	VXGE_HW_MRPCIM_GENERAL_CFG2_IGNORE_VPATH_RST_FOR_MSIX   vxge_mBIT(23)
#define	VXGE_HW_MRPCIM_GENERAL_CFG2_FLASH_READ_MSB   vxge_mBIT(27)
#define	VXGE_HW_MRPCIM_GENERAL_CFG2_DIS_HOST_PIPELINE_WR   vxge_mBIT(31)
#define	VXGE_HW_MRPCIM_GENERAL_CFG2_MRPCIM_STATS_ENABLE   vxge_mBIT(43)
#define	VXGE_HW_MRPCIM_GENERAL_CFG2_MRPCIM_STATS_MAP_TO_VPATH(val)   vxge_vBIT(val, 47, 5)
#define	VXGE_HW_MRPCIM_GENERAL_CFG2_EN_BLOCK_MSIX_DUE_TO_SERR   vxge_mBIT(55)
#define	VXGE_HW_MRPCIM_GENERAL_CFG2_FORCE_SENDING_INTA   vxge_mBIT(59)
#define	VXGE_HW_MRPCIM_GENERAL_CFG2_DIS_SWIF_PROT_ON_RDS   vxge_mBIT(63)
#define	VXGE_HW_MRPCIM_GENERAL_CFG3_PROTECTION_CA_OR_UNSUPN   vxge_mBIT(0)
#define	VXGE_HW_MRPCIM_GENERAL_CFG3_ILLEGAL_RD_CA_OR_UNSUPN   vxge_mBIT(3)
#define	VXGE_HW_MRPCIM_GENERAL_CFG3_RD_BYTE_SWAPEN   vxge_mBIT(7)
#define	VXGE_HW_MRPCIM_GENERAL_CFG3_RD_BIT_FLIPEN   vxge_mBIT(11)
#define	VXGE_HW_MRPCIM_GENERAL_CFG3_WR_BYTE_SWAPEN   vxge_mBIT(15)
#define	VXGE_HW_MRPCIM_GENERAL_CFG3_WR_BIT_FLIPEN   vxge_mBIT(19)
#define	VXGE_HW_MRPCIM_GENERAL_CFG3_MR_MAX_MVFS(val)   vxge_vBIT(val, 20, 16)
#define	VXGE_HW_MRPCIM_GENERAL_CFG3_MR_MVF_TBL_SIZE(val)   vxge_vBIT(val, 36, 16)
#define	VXGE_HW_MRPCIM_GENERAL_CFG3_PF0_SW_RESET_EN   vxge_mBIT(55)
#define	VXGE_HW_MRPCIM_GENERAL_CFG3_REG_MODIFIED_CFG(val)   vxge_vBIT(val, 56, 2)
#define	VXGE_HW_MRPCIM_GENERAL_CFG3_CPL_ECC_ENABLE_N   vxge_mBIT(59)
#define	VXGE_HW_MRPCIM_GENERAL_CFG3_BYPASS_DAISY_CHAIN   vxge_mBIT(63)
#define	VXGE_HW_MRPCIM_STATS_START_HOST_ADDR_MRPCIM_STATS_START_HOST_ADDR(val)   vxge_vBIT(val, 0, 57)
#define	VXGE_HW_RDCRDTARB_CFG0_RDA_MAX_OUTSTANDING_RDS(val)   vxge_vBIT(val, 18, 6)
#define	VXGE_HW_RDCRDTARB_CFG0_PDA_MAX_OUTSTANDING_RDS(val)   vxge_vBIT(val, 26, 6)
#define	VXGE_HW_RDCRDTARB_CFG0_DBLGEN_MAX_OUTSTANDING_RDS(val)   vxge_vBIT(val, 34, 6)
#define	VXGE_HW_RDCRDTARB_CFG0_WAIT_CNT(val)   vxge_vBIT(val, 48, 4)
#define	VXGE_HW_RDCRDTARB_CFG0_MAX_OUTSTANDING_RDS(val)   vxge_vBIT(val, 54, 6)
#define	VXGE_HW_RDCRDTARB_CFG0_EN_XON   vxge_mBIT(63)
#define	VXGE_HW_BF_SW_RESET_BF_SW_RESET(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_SW_RESET_STATUS_RESET_CMPLT   vxge_mBIT(7)
#define	VXGE_HW_SW_RESET_STATUS_INIT_CMPLT   vxge_mBIT(15)
#define	VXGE_HW_SW_RESET_CFG1_TYPE   vxge_mBIT(0)
#define	VXGE_HW_SW_RESET_CFG1_WAIT_TIME_FOR_FLUSH_PCI(val)   vxge_vBIT(val, 7, 25)
#define	VXGE_HW_SW_RESET_CFG1_SOPR_ASSERT_TIME(val)   vxge_vBIT(val, 32, 4)
#define	VXGE_HW_SW_RESET_CFG1_WAIT_TIME_AFTER_RESET(val)   vxge_vBIT(val, 38, 25)
#define	VXGE_HW_MRPCIM_DEBUG_STATS0_INI_WR_DROP(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_MRPCIM_DEBUG_STATS0_INI_RD_DROP(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_MRPCIM_DEBUG_STATS1_VPLANE_WRCRDTARB_PH_CRDT_DEPLETED(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_MRPCIM_DEBUG_STATS2_VPLANE_WRCRDTARB_PD_CRDT_DEPLETED(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_MRPCIM_DEBUG_STATS3_VPLANE_RDCRDTARB_NPH_CRDT_DEPLETED(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_MRPCIM_DEBUG_STATS4_INI_WR_VPIN_DROP(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_MRPCIM_DEBUG_STATS4_INI_RD_VPIN_DROP(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_GENSTATS_COUNT01_GENSTATS_COUNT1(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_GENSTATS_COUNT01_GENSTATS_COUNT0(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_GENSTATS_COUNT23_GENSTATS_COUNT3(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_GENSTATS_COUNT23_GENSTATS_COUNT2(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_GENSTATS_COUNT4_GENSTATS_COUNT4(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_GENSTATS_COUNT5_GENSTATS_COUNT5(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_GENSTATS_CFG_DTYPE_SEL(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_GENSTATS_CFG_CLIENT_NO_SEL(val)   vxge_vBIT(val, 9, 3)
#define	VXGE_HW_GENSTATS_CFG_WR_RD_CPL_SEL(val)   vxge_vBIT(val, 14, 2)
#define	VXGE_HW_GENSTATS_CFG_VPATH_SEL(val)   vxge_vBIT(val, 31, 17)
#define	VXGE_HW_GENSTAT_64BIT_CFG_EN_FOR_GENSTATS0   vxge_mBIT(3)
#define	VXGE_HW_GENSTAT_64BIT_CFG_EN_FOR_GENSTATS2   vxge_mBIT(7)
#define	VXGE_HW_GCMG3_INT_STATUS_GSTC_ERR0_GSTC0_INT   vxge_mBIT(0)
#define	VXGE_HW_GCMG3_INT_STATUS_GSTC_ERR1_GSTC1_INT   vxge_mBIT(1)
#define	VXGE_HW_GCMG3_INT_STATUS_GH2L_ERR0_GH2L0_INT   vxge_mBIT(2)
#define	VXGE_HW_GCMG3_INT_STATUS_GHSQ_ERR_GH2L1_INT   vxge_mBIT(3)
#define	VXGE_HW_GCMG3_INT_STATUS_GHSQ_ERR2_GH2L2_INT   vxge_mBIT(4)
#define	VXGE_HW_GCMG3_INT_STATUS_GH2L_SMERR0_GH2L3_INT   vxge_mBIT(5)
#define	VXGE_HW_GCMG3_INT_STATUS_GHSQ_ERR3_GH2L4_INT   vxge_mBIT(6)
#define	VXGE_HW_G3IFCMD_FB_INT_STATUS_ERR_G3IF_INT   vxge_mBIT(0)
#define	VXGE_HW_G3IFCMD_FB_ERR_REG_G3IF_CK_DLL_LOCK   vxge_mBIT(6)
#define	VXGE_HW_G3IFCMD_FB_ERR_REG_G3IF_SM_ERR   vxge_mBIT(7)
#define	VXGE_HW_G3IFCMD_FB_ERR_REG_G3IF_RWDQS_DLL_LOCK(val)   vxge_vBIT(val, 24, 8)
#define	VXGE_HW_G3IFCMD_FB_ERR_REG_G3IF_IOCAL_FAULT   vxge_mBIT(55)
#define	VXGE_HW_G3IFCMD_CMU_INT_STATUS_ERR_G3IF_INT   vxge_mBIT(0)
#define	VXGE_HW_G3IFCMD_CMU_ERR_REG_G3IF_CK_DLL_LOCK   vxge_mBIT(6)
#define	VXGE_HW_G3IFCMD_CMU_ERR_REG_G3IF_SM_ERR   vxge_mBIT(7)
#define	VXGE_HW_G3IFCMD_CMU_ERR_REG_G3IF_RWDQS_DLL_LOCK(val)   vxge_vBIT(val, 24, 8)
#define	VXGE_HW_G3IFCMD_CMU_ERR_REG_G3IF_IOCAL_FAULT   vxge_mBIT(55)
#define	VXGE_HW_G3IFCMD_CML_INT_STATUS_ERR_G3IF_INT   vxge_mBIT(0)
#define	VXGE_HW_G3IFCMD_CML_ERR_REG_G3IF_CK_DLL_LOCK   vxge_mBIT(6)
#define	VXGE_HW_G3IFCMD_CML_ERR_REG_G3IF_SM_ERR   vxge_mBIT(7)
#define	VXGE_HW_G3IFCMD_CML_ERR_REG_G3IF_RWDQS_DLL_LOCK(val)   vxge_vBIT(val, 24, 8)
#define	VXGE_HW_G3IFCMD_CML_ERR_REG_G3IF_IOCAL_FAULT   vxge_mBIT(55)
#define	VXGE_HW_VPATH_TO_VPLANE_MAP_VPATH_TO_VPLANE_MAP(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_XGXS_CFG_PORT_SIG_DETECT_FORCE_LOS(val)   vxge_vBIT(val, 16, 4)
#define	VXGE_HW_XGXS_CFG_PORT_SIG_DETECT_FORCE_VALID(val)   vxge_vBIT(val, 20, 4)
#define	VXGE_HW_XGXS_CFG_PORT_SEL_INFO_0   vxge_mBIT(27)
#define	VXGE_HW_XGXS_CFG_PORT_SEL_INFO_1(val)   vxge_vBIT(val, 29, 3)
#define	VXGE_HW_XGXS_CFG_PORT_TX_LANE0_SKEW(val)   vxge_vBIT(val, 32, 4)
#define	VXGE_HW_XGXS_CFG_PORT_TX_LANE1_SKEW(val)   vxge_vBIT(val, 36, 4)
#define	VXGE_HW_XGXS_CFG_PORT_TX_LANE2_SKEW(val)   vxge_vBIT(val, 40, 4)
#define	VXGE_HW_XGXS_CFG_PORT_TX_LANE3_SKEW(val)   vxge_vBIT(val, 44, 4)
#define	VXGE_HW_XGXS_RXBER_CFG_PORT_INTERVAL_DUR(val)   vxge_vBIT(val, 0, 4)
#define	VXGE_HW_XGXS_RXBER_CFG_PORT_RXGXS_INTERVAL_CNT(val)   vxge_vBIT(val, 16, 48)
#define	VXGE_HW_XGXS_RXBER_STATUS_PORT_RXGXS_RXGXS_LANE_A_ERR_CNT(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_XGXS_RXBER_STATUS_PORT_RXGXS_RXGXS_LANE_B_ERR_CNT(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_XGXS_RXBER_STATUS_PORT_RXGXS_RXGXS_LANE_C_ERR_CNT(val)   vxge_vBIT(val, 32, 16)
#define	VXGE_HW_XGXS_RXBER_STATUS_PORT_RXGXS_RXGXS_LANE_D_ERR_CNT(val)   vxge_vBIT(val, 48, 16)
#define	VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_TX_ACTIVITY(val)   vxge_vBIT(val, 0, 4)
#define	VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_RX_ACTIVITY(val)   vxge_vBIT(val, 4, 4)
#define	VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_CTC_FIFO_ERR   BIT(11)
#define	VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_BYTE_SYNC_LOST(val)   vxge_vBIT(val, 12, 4)
#define	VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_CTC_ERR(val)   vxge_vBIT(val, 16, 4)
#define	VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_ALIGNMENT_ERR   vxge_mBIT(23)
#define	VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_DEC_ERR(val)   vxge_vBIT(val, 24, 8)
#define	VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_SKIP_INS_REQ(val)   vxge_vBIT(val, 32, 4)
#define	VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_SKIP_DEL_REQ(val)   vxge_vBIT(val, 36, 4)
#define	VXGE_HW_XGXS_PMA_RESET_PORT_SERDES_RESET(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_XGXS_STATIC_CFG_PORT_FW_CTRL_SERDES   vxge_mBIT(3)
#define	VXGE_HW_XGXS_INFO_PORT_XMACJ_INFO_0(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_XGXS_INFO_PORT_XMACJ_INFO_1(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_RATEMGMT_CFG_PORT_MODE(val)   vxge_vBIT(val, 2, 2)
#define	VXGE_HW_RATEMGMT_CFG_PORT_RATE   vxge_mBIT(7)
#define	VXGE_HW_RATEMGMT_CFG_PORT_FIXED_USE_FSM   vxge_mBIT(11)
#define	VXGE_HW_RATEMGMT_CFG_PORT_ANTP_USE_FSM   vxge_mBIT(15)
#define	VXGE_HW_RATEMGMT_CFG_PORT_ANBE_USE_FSM   vxge_mBIT(19)
#define	VXGE_HW_RATEMGMT_STATUS_PORT_RATEMGMT_COMPLETE   vxge_mBIT(3)
#define	VXGE_HW_RATEMGMT_STATUS_PORT_RATEMGMT_RATE   vxge_mBIT(7)
#define	VXGE_HW_RATEMGMT_STATUS_PORT_RATEMGMT_MAC_MATCHES_PHY   vxge_mBIT(11)
#define	VXGE_HW_RATEMGMT_FIXED_CFG_PORT_RESTART   vxge_mBIT(7)
#define	VXGE_HW_RATEMGMT_ANTP_CFG_PORT_RESTART   vxge_mBIT(7)
#define	VXGE_HW_RATEMGMT_ANTP_CFG_PORT_USE_PREAMBLE_EXT_PHY   vxge_mBIT(11)
#define	VXGE_HW_RATEMGMT_ANTP_CFG_PORT_USE_ACT_SEL   vxge_mBIT(15)
#define	VXGE_HW_RATEMGMT_ANTP_CFG_PORT_T_RETRY_PHY_QUERY(val)   vxge_vBIT(val, 16, 4)
#define	VXGE_HW_RATEMGMT_ANTP_CFG_PORT_T_WAIT_MDIO_RESPONSE(val)   vxge_vBIT(val, 20, 4)
#define	VXGE_HW_RATEMGMT_ANTP_CFG_PORT_T_LDOWN_REAUTO_RESPONSE(val)   vxge_vBIT(val, 24, 4)
#define	VXGE_HW_RATEMGMT_ANTP_CFG_PORT_ADVERTISE_10G   vxge_mBIT(31)
#define	VXGE_HW_RATEMGMT_ANTP_CFG_PORT_ADVERTISE_1G   vxge_mBIT(35)
#define	VXGE_HW_RATEMGMT_ANBE_CFG_PORT_RESTART   vxge_mBIT(7)
#define	VXGE_HW_RATEMGMT_ANBE_CFG_PORT_PARALLEL_DETECT_10G_KX4_ENABLE   vxge_mBIT(11)
#define	VXGE_HW_RATEMGMT_ANBE_CFG_PORT_PARALLEL_DETECT_1G_KX_ENABLE   vxge_mBIT(15)
#define	VXGE_HW_RATEMGMT_ANBE_CFG_PORT_T_SYNC_10G_KX4(val)   vxge_vBIT(val, 16, 4)
#define	VXGE_HW_RATEMGMT_ANBE_CFG_PORT_T_SYNC_1G_KX(val)   vxge_vBIT(val, 20, 4)
#define	VXGE_HW_RATEMGMT_ANBE_CFG_PORT_T_DME_EXCHANGE(val)   vxge_vBIT(val, 24, 4)
#define	VXGE_HW_RATEMGMT_ANBE_CFG_PORT_ADVERTISE_10G_KX4   vxge_mBIT(31)
#define	VXGE_HW_RATEMGMT_ANBE_CFG_PORT_ADVERTISE_1G_KX   vxge_mBIT(35)
#define	VXGE_HW_ANBE_CFG_PORT_RESET_CFG_REGS(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_ANBE_CFG_PORT_ALIGN_10G_KX4_OVERRIDE(val)   vxge_vBIT(val, 10, 2)
#define	VXGE_HW_ANBE_CFG_PORT_SYNC_1G_KX_OVERRIDE(val)   vxge_vBIT(val, 14, 2)
#define	VXGE_HW_ANBE_MGR_CTRL_PORT_WE   vxge_mBIT(3)
#define	VXGE_HW_ANBE_MGR_CTRL_PORT_STROBE   vxge_mBIT(7)
#define	VXGE_HW_ANBE_MGR_CTRL_PORT_ADDR(val)   vxge_vBIT(val, 15, 9)
#define	VXGE_HW_ANBE_MGR_CTRL_PORT_DATA(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_ANBE_FW_MSTR_PORT_CONNECT_BEAN_TO_SERDES   vxge_mBIT(3)
#define	VXGE_HW_ANBE_FW_MSTR_PORT_TX_ZEROES_TO_SERDES   vxge_mBIT(7)
#define	VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_CHOSE_10G_KX4_USING_PD   vxge_mBIT(3)
#define	VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_CHOSE_10G_KX4_USING_DME   vxge_mBIT(7)
#define	VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_CHOSE_1G_KX_USING_PD   vxge_mBIT(11)
#define	VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_CHOSE_1G_KX_USING_DME   vxge_mBIT(15)
#define	VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_ANBEFSM_STATE(val)   vxge_vBIT(val, 18, 6)
#define	VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_BEAN_NEXT_PAGE_RECEIVED   vxge_mBIT(27)
#define	VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_BEAN_BASE_PAGE_RECEIVED   vxge_mBIT(35)
#define	VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_BEAN_AUTONEG_COMPLETE   vxge_mBIT(39)
#define	VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_UNEXPECTED_NP_BEFORE_BP   vxge_mBIT(43)
#define	VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_UNEXPECTED_AN_COMPLETE_BEFORE_BP   vxge_mBIT(47)
#define	VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_UNEXPECTED_AN_COMPLETE_BEFORE_NP   vxge_mBIT(51)
#define	VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_UNEXPECTED_MODE_WHEN_AN_COMPLETE   vxge_mBIT(55)
#define	VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_COUNT_BP(val)   vxge_vBIT(val, 56, 4)
#define	VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_COUNT_NP(val)   vxge_vBIT(val, 60, 4)
#define	VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_FEC_ENABLE   vxge_mBIT(32)
#define	VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_FEC_ABILITY   vxge_mBIT(33)
#define	VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_10G_KR_CAPABLE   vxge_mBIT(40)
#define	VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_10G_KX4_CAPABLE   vxge_mBIT(41)
#define	VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_1G_KX_CAPABLE   vxge_mBIT(42)
#define	VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_TX_NONCE(val)   vxge_vBIT(val, 43, 5)
#define	VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_NP   vxge_mBIT(48)
#define	VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_ACK   vxge_mBIT(49)
#define	VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_REMOTE_FAULT   vxge_mBIT(50)
#define	VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_ASM_DIR   vxge_mBIT(51)
#define	VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_PAUSE   vxge_mBIT(53)
#define	VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_ECHOED_NONCE(val)   vxge_vBIT(val, 54, 5)
#define	VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_SELECTOR_FIELD(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_ANBE_HWFSM_NP_STATUS_PORT_RATEMGMT_NP_BITS_47_TO_32(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_ANBE_HWFSM_NP_STATUS_PORT_RATEMGMT_NP_BITS_31_TO_0(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_CHOSE_10G   vxge_mBIT(3)
#define	VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_CHOSE_1G   vxge_mBIT(7)
#define	VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_ANTPFSM_STATE(val)   vxge_vBIT(val, 10, 6)
#define	VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_AUTONEG_COMPLETE   vxge_mBIT(23)
#define	VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_UNEXPECTED_NO_LP_XNP   vxge_mBIT(27)
#define	VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_GOT_LP_XNP   vxge_mBIT(31)
#define	VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_UNEXPECTED_MESSAGE_CODE   vxge_mBIT(35)
#define	VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_UNEXPECTED_NO_HCD   vxge_mBIT(43)
#define	VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_FOUND_HCD   vxge_mBIT(47)
#define	VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_UNEXPECTED_INVALID_RATE   vxge_mBIT(51)
#define	VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_VALID_RATE   vxge_mBIT(55)
#define	VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_PERSISTENT_LDOWN   vxge_mBIT(59)
#define	VXGE_HW_ANTP_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_NP   vxge_mBIT(0)
#define	VXGE_HW_ANTP_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_ACK   vxge_mBIT(1)
#define	VXGE_HW_ANTP_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_RF   vxge_mBIT(2)
#define	VXGE_HW_ANTP_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_XNP   vxge_mBIT(3)
#define	VXGE_HW_ANTP_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_ABILITY_FIELD(val)   vxge_vBIT(val, 4, 7)
#define	VXGE_HW_ANTP_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_SELECTOR_FIELD(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_ANTP_HWFSM_XNP_STATUS_PORT_RATEMGMT_XNP_NP   vxge_mBIT(0)
#define	VXGE_HW_ANTP_HWFSM_XNP_STATUS_PORT_RATEMGMT_XNP_ACK   vxge_mBIT(1)
#define	VXGE_HW_ANTP_HWFSM_XNP_STATUS_PORT_RATEMGMT_XNP_MP   vxge_mBIT(2)
#define	VXGE_HW_ANTP_HWFSM_XNP_STATUS_PORT_RATEMGMT_XNP_ACK2   vxge_mBIT(3)
#define	VXGE_HW_ANTP_HWFSM_XNP_STATUS_PORT_RATEMGMT_XNP_TOGGLE   vxge_mBIT(4)
#define	VXGE_HW_ANTP_HWFSM_XNP_STATUS_PORT_RATEMGMT_XNP_MESSAGE_CODE(val)   vxge_vBIT(val, 5, 11)
#define	VXGE_HW_ANTP_HWFSM_XNP_STATUS_PORT_RATEMGMT_XNP_UNF_CODE_FIELD1(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_ANTP_HWFSM_XNP_STATUS_PORT_RATEMGMT_XNP_UNF_CODE_FIELD2(val)   vxge_vBIT(val, 32, 16)
#define	VXGE_HW_MDIO_MGR_ACCESS_PORT_STROBE_ONE   BIT(3)
#define	VXGE_HW_MDIO_MGR_ACCESS_PORT_OP_TYPE(val)   vxge_vBIT(val, 5, 3)
#define	VXGE_HW_MDIO_MGR_ACCESS_PORT_DEVAD(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_MDIO_MGR_ACCESS_PORT_ADDR(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_MDIO_MGR_ACCESS_PORT_DATA(val)   vxge_vBIT(val, 32, 16)
#define	VXGE_HW_MDIO_MGR_ACCESS_PORT_ST_PATTERN(val)   vxge_vBIT(val, 49, 2)
#define	VXGE_HW_MDIO_MGR_ACCESS_PORT_PREAMBLE   vxge_mBIT(51)
#define	VXGE_HW_MDIO_MGR_ACCESS_PORT_PRTAD(val)   vxge_vBIT(val, 55, 5)
#define	VXGE_HW_MDIO_MGR_ACCESS_PORT_STROBE_TWO   vxge_mBIT(63)
#define	VXGE_HW_XMAC_VSPORT_CHOICES_VH_VSPORT_VECTOR(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_RX_THRESH_CFG_VP_PAUSE_LOW_THR(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_RX_THRESH_CFG_VP_PAUSE_HIGH_THR(val)   vxge_vBIT(val, 8, 8)
#define	VXGE_HW_RX_THRESH_CFG_VP_RED_THR_0(val)   vxge_vBIT(val, 16, 8)
#define	VXGE_HW_RX_THRESH_CFG_VP_RED_THR_1(val)   vxge_vBIT(val, 24, 8)
#define	VXGE_HW_RX_THRESH_CFG_VP_RED_THR_2(val)   vxge_vBIT(val, 32, 8)
#define	VXGE_HW_RX_THRESH_CFG_VP_RED_THR_3(val)   vxge_vBIT(val, 40, 8)
#define	VXGE_HW_TIM_MR2SR_RESOURCE_ASSIGNMENT_VH_BMAP_ROOT(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_SRPCIM_PCIPIF_INT_STATUS_MRPCIM_MSG_MRPCIM_MSG_INT   BIT(3)
#define	VXGE_HW_SRPCIM_PCIPIF_INT_STATUS_VPATH_MSG_VPATH_MSG_INT   BIT(7)
#define	VXGE_HW_SRPCIM_PCIPIF_INT_STATUS_SRPCIM_SPARE_R1_SRPCIM_SPARE_R1_INT   BIT(11)
#define	VXGE_HW_MRPCIM_MSG_REG_SWIF_MRPCIM_TO_SRPCIM_RMSG_INT   BIT(3)
#define	VXGE_HW_VPATH_MSG_REG_SWIF_VPATH0_TO_SRPCIM_RMSG_INT   BIT(0)
#define	VXGE_HW_VPATH_MSG_REG_SWIF_VPATH1_TO_SRPCIM_RMSG_INT   BIT(1)
#define	VXGE_HW_VPATH_MSG_REG_SWIF_VPATH2_TO_SRPCIM_RMSG_INT   BIT(2)
#define	VXGE_HW_VPATH_MSG_REG_SWIF_VPATH3_TO_SRPCIM_RMSG_INT   BIT(3)
#define	VXGE_HW_VPATH_MSG_REG_SWIF_VPATH4_TO_SRPCIM_RMSG_INT   BIT(4)
#define	VXGE_HW_VPATH_MSG_REG_SWIF_VPATH5_TO_SRPCIM_RMSG_INT   BIT(5)
#define	VXGE_HW_VPATH_MSG_REG_SWIF_VPATH6_TO_SRPCIM_RMSG_INT   BIT(6)
#define	VXGE_HW_VPATH_MSG_REG_SWIF_VPATH7_TO_SRPCIM_RMSG_INT   BIT(7)
#define	VXGE_HW_VPATH_MSG_REG_SWIF_VPATH8_TO_SRPCIM_RMSG_INT   BIT(8)
#define	VXGE_HW_VPATH_MSG_REG_SWIF_VPATH9_TO_SRPCIM_RMSG_INT   BIT(9)
#define	VXGE_HW_VPATH_MSG_REG_SWIF_VPATH10_TO_SRPCIM_RMSG_INT   BIT(10)
#define	VXGE_HW_VPATH_MSG_REG_SWIF_VPATH11_TO_SRPCIM_RMSG_INT   BIT(11)
#define	VXGE_HW_VPATH_MSG_REG_SWIF_VPATH12_TO_SRPCIM_RMSG_INT   BIT(12)
#define	VXGE_HW_VPATH_MSG_REG_SWIF_VPATH13_TO_SRPCIM_RMSG_INT   BIT(13)
#define	VXGE_HW_VPATH_MSG_REG_SWIF_VPATH14_TO_SRPCIM_RMSG_INT   BIT(14)
#define	VXGE_HW_VPATH_MSG_REG_SWIF_VPATH15_TO_SRPCIM_RMSG_INT   BIT(15)
#define	VXGE_HW_VPATH_MSG_REG_SWIF_VPATH16_TO_SRPCIM_RMSG_INT   BIT(16)
#define	VXGE_HW_SRPCIM_TO_MRPCIM_WMSG_SRPCIM_TO_MRPCIM_WMSG(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_SRPCIM_TO_MRPCIM_WMSG_TRIG_SRPCIM_TO_MRPCIM_WMSG_TRIG   BIT(0)
#define	VXGE_HW_MRPCIM_TO_SRPCIM_RMSG_SWIF_MRPCIM_TO_SRPCIM_RMSG(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_VPATH_TO_SRPCIM_RMSG_SEL_VPATH_TO_SRPCIM_RMSG_SEL(val)   vxge_vBIT(val, 0, 5)
#define	VXGE_HW_VPATH_TO_SRPCIM_RMSG_SWIF_VPATH_TO_SRPCIM_RMSG(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_SRPCIM_GENERAL_INT_STATUS_PIC_INT   BIT(0)
#define	VXGE_HW_SRPCIM_GENERAL_INT_STATUS_PCI_INT   BIT(3)
#define	VXGE_HW_SRPCIM_GENERAL_INT_STATUS_XMAC_INT   BIT(7)
#define	VXGE_HW_SRPCIM_GENERAL_INT_MASK_PIC_INT   BIT(0)
#define	VXGE_HW_SRPCIM_GENERAL_INT_MASK_PCI_INT   BIT(3)
#define	VXGE_HW_SRPCIM_GENERAL_INT_MASK_XMAC_INT   BIT(7)
#define	VXGE_HW_SRPCIM_GEN_ERRORS_REG_PCICONFIG_PF_STATUS_ERR   BIT(3)
#define	VXGE_HW_SRPCIM_GEN_ERRORS_REG_PCICONFIG_PF_UNCOR_ERR   BIT(7)
#define	VXGE_HW_SRPCIM_GEN_ERRORS_REG_PCICONFIG_PF_COR_ERR   BIT(11)
#define	VXGE_HW_SRPCIM_GEN_ERRORS_REG_INTCTRL_SCHED_INT   BIT(15)
#define	VXGE_HW_SRPCIM_GEN_ERRORS_REG_INI_SERR_DET   BIT(19)
#define	VXGE_HW_SRPCIM_GEN_ERRORS_REG_TGT_PF_ILLEGAL_ACCESS   BIT(23)
#define	VXGE_HW_MRPCIM_TO_SRPCIM_ALARM_REG_PPIF_MRPCIM_TO_SRPCIM_ALARM   BIT(3)
#define	VXGE_HW_PF_SW_RESET_PF_SW_RESET(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_SRPCIM_GENERAL_CFG1_BOOT_BYTE_SWAPEN   BIT(19)
#define	VXGE_HW_SRPCIM_GENERAL_CFG1_BOOT_BIT_FLIPEN   BIT(23)
#define	VXGE_HW_SRPCIM_GENERAL_CFG1_MSIX_ADDR_SWAPEN   BIT(27)
#define	VXGE_HW_SRPCIM_GENERAL_CFG1_MSIX_ADDR_FLIPEN   BIT(31)
#define	VXGE_HW_SRPCIM_GENERAL_CFG1_MSIX_DATA_SWAPEN   BIT(35)
#define	VXGE_HW_SRPCIM_GENERAL_CFG1_MSIX_DATA_FLIPEN   BIT(39)
#define	VXGE_HW_SRPCIM_INTERRUPT_CFG1_ALARM_MAP_TO_MSG(val)   vxge_vBIT(val, 1, 7)
#define	VXGE_HW_SRPCIM_INTERRUPT_CFG1_TRAFFIC_CLASS(val)   vxge_vBIT(val, 9, 3)
#define	VXGE_HW_SRPCIM_CLEAR_MSIX_MASK_SRPCIM_CLEAR_MSIX_MASK   BIT(0)
#define	VXGE_HW_SRPCIM_SET_MSIX_MASK_SRPCIM_SET_MSIX_MASK   BIT(0)
#define	VXGE_HW_SRPCIM_CLR_MSIX_ONE_SHOT_SRPCIM_CLR_MSIX_ONE_SHOT   BIT(0)
#define	VXGE_HW_SRPCIM_RST_IN_PROG_SRPCIM_RST_IN_PROG   BIT(7)
#define	VXGE_HW_SRPCIM_REG_MODIFIED_SRPCIM_REG_MODIFIED   BIT(7)
#define	VXGE_HW_TGT_PF_ILLEGAL_ACCESS_SWIF_REGION(val)   vxge_vBIT(val, 1, 7)
#define	VXGE_HW_SRPCIM_MSIX_STATUS_INTCTL_SRPCIM_MSIX_MASK   BIT(3)
#define	VXGE_HW_SRPCIM_MSIX_STATUS_INTCTL_SRPCIM_MSIX_PENDING_VECTOR   BIT(7)
#define	VXGE_HW_XGMAC_SR_INT_STATUS_ASIC_NTWK_SR_ERR_ASIC_NTWK_SR_INT   BIT(3)
#define	VXGE_HW_ASIC_NTWK_SR_ERR_REG_XMACJ_NTWK_SUSTAINED_FAULT   BIT(3)
#define	VXGE_HW_ASIC_NTWK_SR_ERR_REG_XMACJ_NTWK_SUSTAINED_OK   BIT(7)
#define	VXGE_HW_ASIC_NTWK_SR_ERR_REG_XMACJ_NTWK_SUSTAINED_FAULT_OCCURRED   BIT(11)
#define	VXGE_HW_ASIC_NTWK_SR_ERR_REG_XMACJ_NTWK_SUSTAINED_OK_OCCURRED   BIT(15)
#define	VXGE_HW_XMAC_VSPORT_CHOICES_SR_CLONE_VSPORT_VECTOR(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_MR_RQA_TOP_PRTY_FOR_VH_RQA_TOP_PRTY_FOR_VH(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_UMQ_VH_DATA_LIST_EMPTY_ROCRC_UMQ_VH_DATA_LIST_EMPTY   BIT(0)
#define	VXGE_HW_WDE_CFG_NS0_FORCE_MWB_START   BIT(0)
#define	VXGE_HW_WDE_CFG_NS0_FORCE_MWB_END   BIT(1)
#define	VXGE_HW_WDE_CFG_NS0_FORCE_QB_START   BIT(2)
#define	VXGE_HW_WDE_CFG_NS0_FORCE_QB_END   BIT(3)
#define	VXGE_HW_WDE_CFG_NS0_FORCE_MPSB_START   BIT(4)
#define	VXGE_HW_WDE_CFG_NS0_FORCE_MPSB_END   BIT(5)
#define	VXGE_HW_WDE_CFG_NS0_MWB_OPT_EN   BIT(6)
#define	VXGE_HW_WDE_CFG_NS0_QB_OPT_EN   BIT(7)
#define	VXGE_HW_WDE_CFG_NS0_MPSB_OPT_EN   BIT(8)
#define	VXGE_HW_WDE_CFG_NS1_FORCE_MWB_START   BIT(9)
#define	VXGE_HW_WDE_CFG_NS1_FORCE_MWB_END   BIT(10)
#define	VXGE_HW_WDE_CFG_NS1_FORCE_QB_START   BIT(11)
#define	VXGE_HW_WDE_CFG_NS1_FORCE_QB_END   BIT(12)
#define	VXGE_HW_WDE_CFG_NS1_FORCE_MPSB_START   BIT(13)
#define	VXGE_HW_WDE_CFG_NS1_FORCE_MPSB_END   BIT(14)
#define	VXGE_HW_WDE_CFG_NS1_MWB_OPT_EN   BIT(15)
#define	VXGE_HW_WDE_CFG_NS1_QB_OPT_EN   BIT(16)
#define	VXGE_HW_WDE_CFG_NS1_MPSB_OPT_EN   BIT(17)
#define	VXGE_HW_WDE_CFG_DISABLE_QPAD_FOR_UNALIGNED_ADDR   BIT(19)
#define	VXGE_HW_WDE_CFG_ALIGNMENT_PREFERENCE(val)   vxge_vBIT(val, 30, 2)
#define	VXGE_HW_WDE_CFG_MEM_WORD_SIZE(val)   vxge_vBIT(val, 46, 2)
#define	VXGE_HW_VPATH_TO_FUNC_MAP_CFG1_VPATH_TO_FUNC_MAP_CFG1(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_VPATH_IS_FIRST_VPATH_IS_FIRST   vxge_mBIT(3)
#define	VXGE_HW_SRPCIM_TO_VPATH_WMSG_SRPCIM_TO_VPATH_WMSG(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_SRPCIM_TO_VPATH_WMSG_TRIG_SRPCIM_TO_VPATH_WMSG_TRIG   vxge_mBIT(0)
#define	VXGE_HW_TIM_VPATH_ASSIGNMENT_BMAP_ROOT(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_RQA_TOP_PRTY_FOR_VP_RQA_TOP_PRTY_FOR_VP(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_IGNORE_FRAME_ERR   vxge_mBIT(3)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_SUPPORT_SNAP_AB_N   vxge_mBIT(7)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_SEARCH_FOR_HAO   vxge_mBIT(18)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_SUPPORT_MOBILE_IPV6_HDRS   vxge_mBIT(19)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_IPV6_STOP_SEARCHING   vxge_mBIT(23)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_NO_PS_IF_UNKNOWN   vxge_mBIT(27)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_SEARCH_FOR_ETYPE   vxge_mBIT(35)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_TOSS_ANY_FRM_IF_L3_CSUM_ERR   vxge_mBIT(39)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_TOSS_OFFLD_FRM_IF_L3_CSUM_ERR   vxge_mBIT(43)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_TOSS_ANY_FRM_IF_L4_CSUM_ERR   vxge_mBIT(47)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_TOSS_OFFLD_FRM_IF_L4_CSUM_ERR   vxge_mBIT(51)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_TOSS_ANY_FRM_IF_RPA_ERR   vxge_mBIT(55)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_TOSS_OFFLD_FRM_IF_RPA_ERR   vxge_mBIT(59)
#define	VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_JUMBO_SNAP_EN   vxge_mBIT(63)
#define	VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_RTS_DP_SP_PRIORITY   vxge_mBIT(3)
#define	VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_FLEX_L4PRTCL_VALUE(val)   vxge_vBIT(val, 24, 8)
#define	VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_ICMP_TRASH   vxge_mBIT(35)
#define	VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_TCPSYN_TRASH   vxge_mBIT(39)
#define	VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_ZL4PYLD_TRASH   vxge_mBIT(43)
#define	VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_L4PRTCL_TCP_TRASH   vxge_mBIT(47)
#define	VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_L4PRTCL_UDP_TRASH   vxge_mBIT(51)
#define	VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_L4PRTCL_FLEX_TRASH   vxge_mBIT(55)
#define	VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_IPFRAG_TRASH   vxge_mBIT(59)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_ETYPE(val)   vxge_vBIT(val, 5, 3)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_ICMP_TCPSYN(val)   vxge_vBIT(val, 9, 3)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_L4PN(val)   vxge_vBIT(val, 13, 3)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_RANGE_L4PN(val)   vxge_vBIT(val, 17, 3)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_RTH_IT(val)   vxge_vBIT(val, 21, 3)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_DS(val)   vxge_vBIT(val, 25, 3)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_QOS(val)   vxge_vBIT(val, 29, 3)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_ZL4PYLD(val)   vxge_vBIT(val, 33, 3)
#define	VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_L4PRTCL(val)   vxge_vBIT(val, 37, 3)
#define	VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_RMAC_EN   vxge_mBIT(3)
#define	VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_STRIP_FCS   vxge_mBIT(7)
#define	VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_DISCARD_PFRM   vxge_mBIT(11)
#define	VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_IGNORE_FCS_ERR   vxge_mBIT(15)
#define	VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_IGNORE_LONG_ERR   vxge_mBIT(19)
#define	VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_IGNORE_USIZED_ERR   vxge_mBIT(23)
#define	VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_IGNORE_LEN_MISMATCH   vxge_mBIT(27)
#define	VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_MAX_PYLD_LEN(val)   vxge_vBIT(val, 50, 14)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_GEN_EN   vxge_mBIT(3)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_RCV_EN   vxge_mBIT(7)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_ACCEL_SEND(val)   vxge_vBIT(val, 9, 3)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_DUAL_THR   vxge_mBIT(15)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_HIGH_PTIME(val)   vxge_vBIT(val, 20, 16)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_IGNORE_PF_FCS_ERR   vxge_mBIT(39)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_IGNORE_PF_LEN_ERR   vxge_mBIT(43)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_LIMITER_EN   vxge_mBIT(47)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_MAX_LIMIT(val)   vxge_vBIT(val, 48, 8)
#define	VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_PERMIT_RATEMGMT_CTRL   vxge_mBIT(59)
#define	VXGE_HW_XMAC_VSPORT_CHOICES_VP_VSPORT_VECTOR(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_XGMAC_GEN_STATUS_VPMGMT_CLONE_XMACJ_NTWK_OK   vxge_mBIT(3)
#define	VXGE_HW_XGMAC_GEN_STATUS_VPMGMT_CLONE_XMACJ_NTWK_DATA_RATE   vxge_mBIT(11)
#define	VXGE_HW_XGMAC_STATUS_PORT_VPMGMT_CLONE_RMAC_REMOTE_FAULT   vxge_mBIT(3)
#define	VXGE_HW_XGMAC_STATUS_PORT_VPMGMT_CLONE_RMAC_LOCAL_FAULT   vxge_mBIT(7)
#define	VXGE_HW_XGMAC_STATUS_PORT_VPMGMT_CLONE_XMACJ_MAC_PHY_LAYER_AVAIL   vxge_mBIT(11)
#define	VXGE_HW_XGMAC_STATUS_PORT_VPMGMT_CLONE_XMACJ_PORT_OK   vxge_mBIT(15)
#define	VXGE_HW_XMAC_GEN_CFG_VPMGMT_CLONE_RATEMGMT_MAC_RATE_SEL(val)   vxge_vBIT(val, 2, 2)
#define	VXGE_HW_XMAC_GEN_CFG_VPMGMT_CLONE_TX_HEAD_DROP_WHEN_FAULT   vxge_mBIT(7)
#define	VXGE_HW_XMAC_GEN_CFG_VPMGMT_CLONE_FAULT_BEHAVIOUR   vxge_mBIT(27)
#define	VXGE_HW_XMAC_GEN_CFG_VPMGMT_CLONE_PERIOD_NTWK_UP(val)   vxge_vBIT(val, 28, 4)
#define	VXGE_HW_XMAC_GEN_CFG_VPMGMT_CLONE_PERIOD_NTWK_DOWN(val)   vxge_vBIT(val, 32, 4)
#define	VXGE_HW_XMAC_TIMESTAMP_VPMGMT_CLONE_EN   vxge_mBIT(3)
#define	VXGE_HW_XMAC_TIMESTAMP_VPMGMT_CLONE_USE_LINK_ID(val)   vxge_vBIT(val, 6, 2)
#define	VXGE_HW_XMAC_TIMESTAMP_VPMGMT_CLONE_INTERVAL(val)   vxge_vBIT(val, 12, 4)
#define	VXGE_HW_XMAC_TIMESTAMP_VPMGMT_CLONE_TIMER_RESTART   vxge_mBIT(19)
#define	VXGE_HW_XMAC_TIMESTAMP_VPMGMT_CLONE_XMACJ_ROLLOVER_CNT(val)   vxge_vBIT(val, 32, 16)
#define	VXGE_HW_XMAC_STATS_GEN_CFG_VPMGMT_CLONE_PRTAGGR_CUM_TIMER(val)   vxge_vBIT(val, 4, 4)
#define	VXGE_HW_XMAC_STATS_GEN_CFG_VPMGMT_CLONE_VPATH_CUM_TIMER(val)   vxge_vBIT(val, 8, 4)
#define	VXGE_HW_XMAC_STATS_GEN_CFG_VPMGMT_CLONE_VLAN_HANDLING   vxge_mBIT(15)
#define	VXGE_HW_XMAC_CFG_PORT_VPMGMT_CLONE_XGMII_LOOPBACK   vxge_mBIT(3)
#define	VXGE_HW_XMAC_CFG_PORT_VPMGMT_CLONE_XGMII_REVERSE_LOOPBACK   vxge_mBIT(7)
#define	VXGE_HW_XMAC_CFG_PORT_VPMGMT_CLONE_XGMII_TX_BEHAV   vxge_mBIT(11)
#define	VXGE_HW_XMAC_CFG_PORT_VPMGMT_CLONE_XGMII_RX_BEHAV   vxge_mBIT(15)
#define	VXGE_HW_TXMAC_GEN_CFG0_VPMGMT_CLONE_CHOSEN_TX_PORT   vxge_mBIT(7)
#define	VXGE_HW_TXMAC_CFG0_PORT_VPMGMT_CLONE_TMAC_EN   vxge_mBIT(3)
#define	VXGE_HW_TXMAC_CFG0_PORT_VPMGMT_CLONE_APPEND_PAD   vxge_mBIT(7)
#define	VXGE_HW_TXMAC_CFG0_PORT_VPMGMT_CLONE_PAD_BYTE(val)   vxge_vBIT(val, 8, 8)
#define	VXGE_HW_WOL_MP_CRC_CRC(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_WOL_MP_CRC_RC_EN   vxge_mBIT(63)
#define	VXGE_HW_WOL_MP_MASK_A_MASK(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_WOL_MP_MASK_B_MASK(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_FAU_PA_CFG_VPMGMT_CLONE_REPL_L4_COMP_CSUM   vxge_mBIT(3)
#define	VXGE_HW_FAU_PA_CFG_VPMGMT_CLONE_REPL_L3_INCL_CF   vxge_mBIT(7)
#define	VXGE_HW_FAU_PA_CFG_VPMGMT_CLONE_REPL_L3_COMP_CSUM   vxge_mBIT(11)
#define	VXGE_HW_RX_DATAPATH_UTIL_VP_CLONE_FAU_RX_UTILIZATION(val)   vxge_vBIT(val, 7, 9)
#define	VXGE_HW_RX_DATAPATH_UTIL_VP_CLONE_RX_UTIL_CFG(val)   vxge_vBIT(val, 16, 4)
#define	VXGE_HW_RX_DATAPATH_UTIL_VP_CLONE_FAU_RX_FRAC_UTIL(val)   vxge_vBIT(val, 20, 4)
#define	VXGE_HW_RX_DATAPATH_UTIL_VP_CLONE_RX_PKT_WEIGHT(val)   vxge_vBIT(val, 24, 4)
#define	VXGE_HW_TX_DATAPATH_UTIL_VP_CLONE_TPA_TX_UTILIZATION(val)   vxge_vBIT(val, 7, 9)
#define	VXGE_HW_TX_DATAPATH_UTIL_VP_CLONE_TX_UTIL_CFG(val)   vxge_vBIT(val, 16, 4)
#define	VXGE_HW_TX_DATAPATH_UTIL_VP_CLONE_TPA_TX_FRAC_UTIL(val)   vxge_vBIT(val, 20, 4)
#define	VXGE_HW_TX_DATAPATH_UTIL_VP_CLONE_TX_PKT_WEIGHT(val)   vxge_vBIT(val, 24, 4)
#define	VXGE_HW_USDC_VPATH_SGRP_ASSIGN(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_WRDMA_ALARM_STATUS_PRC_ALARM_PRC_INT   vxge_mBIT(1)
#define	VXGE_HW_PRC_ALARM_REG_PRC_RING_BUMP   vxge_mBIT(0)
#define	VXGE_HW_PRC_ALARM_REG_PRC_RXDCM_SC_ERR   vxge_mBIT(1)
#define	VXGE_HW_PRC_ALARM_REG_PRC_RXDCM_SC_ABORT   vxge_mBIT(2)
#define	VXGE_HW_PRC_ALARM_REG_PRC_QUANTA_SIZE_ERR   vxge_mBIT(3)
#define	VXGE_HW_PRC_CFG1_RX_TIMER_VAL(val)   vxge_vBIT(val, 3, 29)
#define	VXGE_HW_PRC_CFG1_TIM_RING_BUMP_INT_ENABLE   vxge_mBIT(34)
#define	VXGE_HW_PRC_CFG1_RTI_TINT_DISABLE   vxge_mBIT(35)
#define	VXGE_HW_PRC_CFG1_GREEDY_RETURN   vxge_mBIT(36)
#define	VXGE_HW_PRC_CFG1_QUICK_SHOT   vxge_mBIT(37)
#define	VXGE_HW_PRC_CFG1_RX_TIMER_CI   vxge_mBIT(39)
#define	VXGE_HW_PRC_CFG1_RESET_TIMER_ON_RXD_RET(val)   vxge_vBIT(val, 40, 2)
#define	VXGE_HW_PRC_CFG4_IN_SVC   vxge_mBIT(7)
#define	VXGE_HW_PRC_CFG4_RING_MODE(val)   vxge_vBIT(val, 14, 2)
#define	VXGE_HW_PRC_CFG4_RXD_NO_SNOOP   vxge_mBIT(22)
#define	VXGE_HW_PRC_CFG4_FRM_NO_SNOOP   vxge_mBIT(23)
#define	VXGE_HW_PRC_CFG4_RTH_DISABLE   vxge_mBIT(31)
#define	VXGE_HW_PRC_CFG4_IGNORE_OWNERSHIP   vxge_mBIT(32)
#define	VXGE_HW_PRC_CFG4_SIGNAL_BENIGN_OVFLW   vxge_mBIT(36)
#define	VXGE_HW_PRC_CFG4_BIMODAL_INTERRUPT   vxge_mBIT(37)
#define	VXGE_HW_PRC_CFG4_BACKOFF_INTERVAL(val)   vxge_vBIT(val, 40, 24)
#define	VXGE_HW_PRC_CFG5_RXD0_ADD(val)   vxge_vBIT(val, 0, 61)
#define	VXGE_HW_PRC_CFG6_FRM_PAD_EN   vxge_mBIT(0)
#define	VXGE_HW_PRC_CFG6_QSIZE_ALIGNED_RXD   vxge_mBIT(2)
#define	VXGE_HW_PRC_CFG6_DOORBELL_MODE_EN   vxge_mBIT(5)
#define	VXGE_HW_PRC_CFG6_L3_CPC_TRSFR_CODE_EN   vxge_mBIT(8)
#define	VXGE_HW_PRC_CFG6_L4_CPC_TRSFR_CODE_EN   vxge_mBIT(9)
#define	VXGE_HW_PRC_CFG6_RXD_CRXDT(val)   vxge_vBIT(val, 23, 9)
#define	VXGE_HW_PRC_CFG6_GET_RXD_CRXDT(val)   vxge_bVALn(val, 23, 9)
#define	VXGE_HW_PRC_CFG6_RXD_SPAT(val)   vxge_vBIT(val, 36, 9)
#define	VXGE_HW_PRC_CFG6_GET_RXD_SPAT(val)   vxge_bVALn(val, 36, 9)
#define	VXGE_HW_PRC_CFG7_SCATTER_MODE(val)   vxge_vBIT(val, 6, 2)
#define	VXGE_HW_PRC_CFG7_SMART_SCAT_EN   vxge_mBIT(11)
#define	VXGE_HW_PRC_CFG7_RXD_NS_CHG_EN   vxge_mBIT(12)
#define	VXGE_HW_PRC_CFG7_NO_HDR_SEPARATION   vxge_mBIT(14)
#define	VXGE_HW_PRC_CFG7_RXD_BUFF_SIZE_MASK(val)   vxge_vBIT(val, 20, 4)
#define	VXGE_HW_PRC_CFG7_BUFF_SIZE0_MASK(val)   vxge_vBIT(val, 27, 5)
#define	VXGE_HW_TIM_DEST_ADDR_TIM_DEST_ADDR(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_PRC_RXD_DOORBELL_NEW_QW_CNT(val)   vxge_vBIT(val, 48, 16)
#define	VXGE_HW_RQA_PRTY_FOR_VP_RQA_PRTY_FOR_VP(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RXDMEM_SIZE_PRC_RXDMEM_SIZE(val)   vxge_vBIT(val, 51, 13)
#define	VXGE_HW_FRM_IN_PROGRESS_CNT_PRC_FRM_IN_PROGRESS_CNT(val)   vxge_vBIT(val, 59, 5)
#define	VXGE_HW_RX_MULTI_CAST_STATS_FRAME_DISCARD(val)   vxge_vBIT(val, 48, 16)
#define	VXGE_HW_RX_FRM_TRANSFERRED_RX_FRM_TRANSFERRED(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_RXD_RETURNED_RXD_RETURNED(val)   vxge_vBIT(val, 48, 16)
#define	VXGE_HW_KDFC_FIFO_TRPL_PARTITION_LENGTH_0(val)   vxge_vBIT(val, 17, 15)
#define	VXGE_HW_KDFC_FIFO_TRPL_PARTITION_LENGTH_1(val)   vxge_vBIT(val, 33, 15)
#define	VXGE_HW_KDFC_FIFO_TRPL_PARTITION_LENGTH_2(val)   vxge_vBIT(val, 49, 15)
#define	VXGE_HW_KDFC_FIFO_TRPL_CTRL_TRIPLET_ENABLE   vxge_mBIT(7)
#define	VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_MODE(val)   vxge_vBIT(val, 14, 2)
#define	VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_FLIP_EN   vxge_mBIT(22)
#define	VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_SWAP_EN   vxge_mBIT(23)
#define	VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_INT_CTRL(val)   vxge_vBIT(val, 26, 2)
#define	VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_CTRL_STRUC   vxge_mBIT(28)
#define	VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_ADD_PAD   vxge_mBIT(29)
#define	VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_NO_SNOOP   vxge_mBIT(30)
#define	VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_RLX_ORD   vxge_mBIT(31)
#define	VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_SELECT(val)   vxge_vBIT(val, 32, 8)
#define	VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_INT_NO(val)   vxge_vBIT(val, 41, 7)
#define	VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_BIT_MAP(val)   vxge_vBIT(val, 48, 16)
#define	VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_MODE(val)   vxge_vBIT(val, 14, 2)
#define	VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_FLIP_EN   vxge_mBIT(22)
#define	VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_SWAP_EN   vxge_mBIT(23)
#define	VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_INT_CTRL(val)   vxge_vBIT(val, 26, 2)
#define	VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_CTRL_STRUC   vxge_mBIT(28)
#define	VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_ADD_PAD   vxge_mBIT(29)
#define	VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_NO_SNOOP   vxge_mBIT(30)
#define	VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_RLX_ORD   vxge_mBIT(31)
#define	VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_SELECT(val)   vxge_vBIT(val, 32, 8)
#define	VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_INT_NO(val)   vxge_vBIT(val, 41, 7)
#define	VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_BIT_MAP(val)   vxge_vBIT(val, 48, 16)
#define	VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_FLIP_EN   vxge_mBIT(22)
#define	VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_SWAP_EN   vxge_mBIT(23)
#define	VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_INT_CTRL(val)   vxge_vBIT(val, 26, 2)
#define	VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_CTRL_STRUC   vxge_mBIT(28)
#define	VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_ADD_PAD   vxge_mBIT(29)
#define	VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_NO_SNOOP   vxge_mBIT(30)
#define	VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_RLX_ORD   vxge_mBIT(31)
#define	VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_SELECT(val)   vxge_vBIT(val, 32, 8)
#define	VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_INT_NO(val)   vxge_vBIT(val, 41, 7)
#define	VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_BIT_MAP(val)   vxge_vBIT(val, 48, 16)
#define	VXGE_HW_KDFC_TRPL_FIFO_0_WB_ADDRESS_ADD(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_KDFC_TRPL_FIFO_1_WB_ADDRESS_ADD(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_KDFC_TRPL_FIFO_2_WB_ADDRESS_ADD(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_KDFC_TRPL_FIFO_OFFSET_KDFC_RCTR0(val)   vxge_vBIT(val, 1, 15)
#define	VXGE_HW_KDFC_TRPL_FIFO_OFFSET_KDFC_RCTR1(val)   vxge_vBIT(val, 17, 15)
#define	VXGE_HW_KDFC_TRPL_FIFO_OFFSET_KDFC_RCTR2(val)   vxge_vBIT(val, 33, 15)
#define	VXGE_HW_KDFC_DRBL_TRIPLET_TOTAL_KDFC_MAX_SIZE(val)   vxge_vBIT(val, 17, 15)
#define	VXGE_HW_USDC_DRBL_CTRL_FLIP_EN   vxge_mBIT(22)
#define	VXGE_HW_USDC_DRBL_CTRL_SWAP_EN   vxge_mBIT(23)
#define	VXGE_HW_USDC_VP_READY_USDC_HTN_READY   vxge_mBIT(7)
#define	VXGE_HW_USDC_VP_READY_USDC_SRQ_READY   vxge_mBIT(15)
#define	VXGE_HW_USDC_VP_READY_USDC_CQRQ_READY   vxge_mBIT(23)
#define	VXGE_HW_KDFC_STATUS_KDFC_WRR_0_READY   vxge_mBIT(0)
#define	VXGE_HW_KDFC_STATUS_KDFC_WRR_1_READY   vxge_mBIT(1)
#define	VXGE_HW_KDFC_STATUS_KDFC_WRR_2_READY   vxge_mBIT(2)
#define	VXGE_HW_XMAC_RPA_VCFG_IPV4_TCP_INCL_PH   vxge_mBIT(3)
#define	VXGE_HW_XMAC_RPA_VCFG_IPV6_TCP_INCL_PH   vxge_mBIT(7)
#define	VXGE_HW_XMAC_RPA_VCFG_IPV4_UDP_INCL_PH   vxge_mBIT(11)
#define	VXGE_HW_XMAC_RPA_VCFG_IPV6_UDP_INCL_PH   vxge_mBIT(15)
#define	VXGE_HW_XMAC_RPA_VCFG_L4_INCL_CF   vxge_mBIT(19)
#define	VXGE_HW_XMAC_RPA_VCFG_STRIP_VLAN_TAG   vxge_mBIT(23)
#define	VXGE_HW_RXMAC_VCFG0_RTS_MAX_FRM_LEN(val)   vxge_vBIT(val, 2, 14)
#define	VXGE_HW_RXMAC_VCFG0_RTS_USE_MIN_LEN   vxge_mBIT(19)
#define	VXGE_HW_RXMAC_VCFG0_RTS_MIN_FRM_LEN(val)   vxge_vBIT(val, 26, 14)
#define	VXGE_HW_RXMAC_VCFG0_UCAST_ALL_ADDR_EN   vxge_mBIT(43)
#define	VXGE_HW_RXMAC_VCFG0_MCAST_ALL_ADDR_EN   vxge_mBIT(47)
#define	VXGE_HW_RXMAC_VCFG0_BCAST_EN   vxge_mBIT(51)
#define	VXGE_HW_RXMAC_VCFG0_ALL_VID_EN   vxge_mBIT(55)
#define	VXGE_HW_RXMAC_VCFG1_RTS_RTH_MULTI_IT_BD_MODE(val)   vxge_vBIT(val, 42, 2)
#define	VXGE_HW_RXMAC_VCFG1_RTS_RTH_MULTI_IT_EN_MODE   vxge_mBIT(47)
#define	VXGE_HW_RXMAC_VCFG1_CONTRIB_L2_FLOW   vxge_mBIT(51)
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(val)   vxge_vBIT(val, 1, 7)
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(val)   vxge_vBIT(val, 8, 4)
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE   vxge_mBIT(15)
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_BEHAV_TBL_SEL   vxge_mBIT(23)
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_TABLE_SEL   vxge_mBIT(27)
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS   vxge_mBIT(0)
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(val)   vxge_vBIT(val, 40, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_VHN(val)   vxge_vBIT(val, 48, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_CTRL_VFID(val)   vxge_vBIT(val, 56, 8)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA0_DATA(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_DATA(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_PRIV_MODE_EN   vxge_mBIT(54)
#define	VXGE_HW_RTS_ACCESS_STEER_DATA1_PRIV_MODE_VPN(val)   vxge_vBIT(val, 55, 5)
#define	VXGE_HW_XMAC_VSPORT_CHOICE_VSPORT_NUMBER(val)   vxge_vBIT(val, 3, 5)
#define	VXGE_HW_XMAC_STATS_ACCESS_CMD_OP(val)   vxge_vBIT(val, 6, 2)
#define	VXGE_HW_XMAC_STATS_ACCESS_CMD_STROBE   vxge_mBIT(15)
#define	VXGE_HW_XMAC_STATS_ACCESS_CMD_OFFSET_SEL(val)   vxge_vBIT(val, 32, 8)
#define	VXGE_HW_XMAC_STATS_ACCESS_DATA_XSMGR_DATA(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_ASIC_NTWK_VP_CTRL_REQ_TEST_NTWK   vxge_mBIT(3)
#define	VXGE_HW_ASIC_NTWK_VP_CTRL_XMACJ_SHOW_PORT_INFO   vxge_mBIT(55)
#define	VXGE_HW_ASIC_NTWK_VP_CTRL_XMACJ_PORT_NUM   vxge_mBIT(63)
#define	VXGE_HW_XGMAC_VP_INT_STATUS_ASIC_NTWK_VP_ERR_ASIC_NTWK_VP_INT   vxge_mBIT(3)
#define	VXGE_HW_ASIC_NW_VP_ERR_REG_XMACJ_STN_FLT   vxge_mBIT(3)
#define	VXGE_HW_ASIC_NW_VP_ERR_REG_XMACJ_STN_OK   vxge_mBIT(7)
#define	VXGE_HW_ASIC_NW_VP_ERR_REG_XMACJ_STN_FLT_OCCURR   vxge_mBIT(11)
#define	VXGE_HW_ASIC_NW_VP_ERR_REG_XMACJ_STN_OK_OCCURR   vxge_mBIT(15)
#define	VXGE_HW_ASIC_NTWK_VP_ERR_REG_XMACJ_NTWK_REAFFIRMED_FAULT   vxge_mBIT(19)
#define	VXGE_HW_ASIC_NTWK_VP_ERR_REG_XMACJ_NTWK_REAFFIRMED_OK   vxge_mBIT(23)
#define	VXGE_HW_RTDMA_BW_CTRL_BW_CTRL_EN   vxge_mBIT(39)
#define	VXGE_HW_RTDMA_BW_CTRL_DESIRED_BW(val)   vxge_vBIT(val, 46, 18)
#define	VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_GEN_INT_AFTER_ABORT   vxge_mBIT(3)
#define	VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_PAD_MODE(val)   vxge_vBIT(val, 6, 2)
#define	VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_PAD_PATTERN(val)   vxge_vBIT(val, 8, 8)
#define	VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_WAIT_FOR_SPACE   vxge_mBIT(19)
#define	VXGE_HW_PCI_EXP_DEVCTL_READRQ   0x7000
#define	VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_FILL_THRESH(val)   vxge_vBIT(val, 21, 3)
#define	VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_TXD_PYLD_WMARK_EN   vxge_mBIT(28)
#define	VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_TXD_PYLD_WMARK(val)   vxge_vBIT(val, 29, 3)
#define	VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_ADDR_BDRY_EN   vxge_mBIT(35)
#define	VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_ADDR_BDRY(val)   vxge_vBIT(val, 37, 3)
#define	VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_TXD_WAIT_FOR_SPACE   vxge_mBIT(43)
#define	VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_TXD_FILL_THRESH(val)   vxge_vBIT(val, 51, 5)
#define	VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_TXD_ADDR_BDRY_EN   vxge_mBIT(59)
#define	VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_TXD_ADDR_BDRY(val)   vxge_vBIT(val, 61, 3)
#define	VXGE_HW_PDA_PCC_JOB_MONITOR_PDA_PCC_JOB_STATUS   vxge_mBIT(7)
#define	VXGE_HW_TX_PROTOCOL_ASSIST_CFG_LSOV2_EN   vxge_mBIT(6)
#define	VXGE_HW_TX_PROTOCOL_ASSIST_CFG_IPV6_KEEP_SEARCHING   vxge_mBIT(7)
#define	VXGE_HW_TIM_CFG1_INT_NUM_BTIMER_VAL(val)   vxge_vBIT(val, 6, 26)
#define	VXGE_HW_TIM_CFG1_INT_NUM_BITMP_EN   vxge_mBIT(35)
#define	VXGE_HW_TIM_CFG1_INT_NUM_TXFRM_CNT_EN   vxge_mBIT(36)
#define	VXGE_HW_TIM_CFG1_INT_NUM_TXD_CNT_EN   vxge_mBIT(37)
#define	VXGE_HW_TIM_CFG1_INT_NUM_TIMER_AC   vxge_mBIT(38)
#define	VXGE_HW_TIM_CFG1_INT_NUM_TIMER_CI   vxge_mBIT(39)
#define	VXGE_HW_TIM_CFG1_INT_NUM_URNG_A(val)   vxge_vBIT(val, 41, 7)
#define	VXGE_HW_TIM_CFG1_INT_NUM_URNG_B(val)   vxge_vBIT(val, 49, 7)
#define	VXGE_HW_TIM_CFG1_INT_NUM_URNG_C(val)   vxge_vBIT(val, 57, 7)
#define	VXGE_HW_TIM_CFG2_INT_NUM_UEC_A(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_TIM_CFG2_INT_NUM_UEC_B(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_TIM_CFG2_INT_NUM_UEC_C(val)   vxge_vBIT(val, 32, 16)
#define	VXGE_HW_TIM_CFG2_INT_NUM_UEC_D(val)   vxge_vBIT(val, 48, 16)
#define	VXGE_HW_TIM_CFG3_INT_NUM_TIMER_RI   vxge_mBIT(0)
#define	VXGE_HW_TIM_CFG3_INT_NUM_RTIMER_EVENT_SF(val)   vxge_vBIT(val, 1, 4)
#define	VXGE_HW_TIM_CFG3_INT_NUM_RTIMER_VAL(val)   vxge_vBIT(val, 6, 26)
#define	VXGE_HW_TIM_CFG3_INT_NUM_UTIL_SEL(val)   vxge_vBIT(val, 32, 6)
#define	VXGE_HW_TIM_CFG3_INT_NUM_LTIMER_VAL(val)   vxge_vBIT(val, 38, 26)
#define	VXGE_HW_TIM_WRKLD_CLC_WRKLD_EVAL_PRD(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_TIM_WRKLD_CLC_WRKLD_EVAL_DIV(val)   vxge_vBIT(val, 35, 5)
#define	VXGE_HW_TIM_WRKLD_CLC_CNT_FRM_BYTE   vxge_mBIT(40)
#define	VXGE_HW_TIM_WRKLD_CLC_CNT_RX_TX(val)   vxge_vBIT(val, 41, 2)
#define	VXGE_HW_TIM_WRKLD_CLC_CNT_LNK_EN   vxge_mBIT(43)
#define	VXGE_HW_TIM_WRKLD_CLC_HOST_UTIL(val)   vxge_vBIT(val, 57, 7)
#define	VXGE_HW_TIM_BITMAP_MASK(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_TIM_BITMAP_LLROOT_RXD_EN   vxge_mBIT(32)
#define	VXGE_HW_TIM_BITMAP_LLROOT_TXD_EN   vxge_mBIT(33)
#define	VXGE_HW_TIM_RING_ASSN_INT_NUM(val)   vxge_vBIT(val, 6, 2)
#define	VXGE_HW_TIM_REMAP_TX_EN   vxge_mBIT(5)
#define	VXGE_HW_TIM_REMAP_RX_EN   vxge_mBIT(6)
#define	VXGE_HW_TIM_REMAP_OFFLOAD_EN   vxge_mBIT(7)
#define	VXGE_HW_TIM_REMAP_TO_VPATH_NUM(val)   vxge_vBIT(val, 11, 5)
#define	VXGE_HW_TIM_VPATH_MAP_BMAP_ROOT(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_TIM_PCI_CFG_ADD_PAD   vxge_mBIT(7)
#define	VXGE_HW_TIM_PCI_CFG_NO_SNOOP   vxge_mBIT(15)
#define	VXGE_HW_TIM_PCI_CFG_RELAXED   vxge_mBIT(23)
#define	VXGE_HW_TIM_PCI_CFG_CTL_STR   vxge_mBIT(31)
#define	VXGE_HW_SGRP_ASSIGN_SGRP_ASSIGN(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_SGRP_AOA_AND_RESULT_PET_SGRP_AOA_AND_RESULT(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_RPE_PCI_CFG_PAD_LRO_DATA_ENABLE   vxge_mBIT(7)
#define	VXGE_HW_RPE_PCI_CFG_PAD_LRO_HDR_ENABLE   vxge_mBIT(8)
#define	VXGE_HW_RPE_PCI_CFG_PAD_LRO_CQE_ENABLE   vxge_mBIT(9)
#define	VXGE_HW_RPE_PCI_CFG_PAD_NONLL_CQE_ENABLE   vxge_mBIT(10)
#define	VXGE_HW_RPE_PCI_CFG_PAD_BASE_LL_CQE_ENABLE   vxge_mBIT(11)
#define	VXGE_HW_RPE_PCI_CFG_PAD_LL_CQE_IDATA_ENABLE   vxge_mBIT(12)
#define	VXGE_HW_RPE_PCI_CFG_PAD_CQRQ_IR_ENABLE   vxge_mBIT(13)
#define	VXGE_HW_RPE_PCI_CFG_PAD_CQSQ_IR_ENABLE   vxge_mBIT(14)
#define	VXGE_HW_RPE_PCI_CFG_PAD_CQRR_IR_ENABLE   vxge_mBIT(15)
#define	VXGE_HW_RPE_PCI_CFG_NOSNOOP_DATA   vxge_mBIT(18)
#define	VXGE_HW_RPE_PCI_CFG_NOSNOOP_NONLL_CQE   vxge_mBIT(19)
#define	VXGE_HW_RPE_PCI_CFG_NOSNOOP_LL_CQE   vxge_mBIT(20)
#define	VXGE_HW_RPE_PCI_CFG_NOSNOOP_CQRQ_IR   vxge_mBIT(21)
#define	VXGE_HW_RPE_PCI_CFG_NOSNOOP_CQSQ_IR   vxge_mBIT(22)
#define	VXGE_HW_RPE_PCI_CFG_NOSNOOP_CQRR_IR   vxge_mBIT(23)
#define	VXGE_HW_RPE_PCI_CFG_RELAXED_DATA   vxge_mBIT(26)
#define	VXGE_HW_RPE_PCI_CFG_RELAXED_NONLL_CQE   vxge_mBIT(27)
#define	VXGE_HW_RPE_PCI_CFG_RELAXED_LL_CQE   vxge_mBIT(28)
#define	VXGE_HW_RPE_PCI_CFG_RELAXED_CQRQ_IR   vxge_mBIT(29)
#define	VXGE_HW_RPE_PCI_CFG_RELAXED_CQSQ_IR   vxge_mBIT(30)
#define	VXGE_HW_RPE_PCI_CFG_RELAXED_CQRR_IR   vxge_mBIT(31)
#define	VXGE_HW_RPE_LRO_CFG_SUPPRESS_LRO_ETH_TRLR   vxge_mBIT(7)
#define	VXGE_HW_RPE_LRO_CFG_ALLOW_LRO_SNAP_SNAPJUMBO_MRG   vxge_mBIT(11)
#define	VXGE_HW_RPE_LRO_CFG_ALLOW_LRO_LLC_LLCJUMBO_MRG   vxge_mBIT(15)
#define	VXGE_HW_RPE_LRO_CFG_INCL_ACK_CNT_IN_CQE   vxge_mBIT(23)
#define	VXGE_HW_PE_MR2VP_ACK_BLK_LIMIT_BLK_LIMIT(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_PE_MR2VP_RIRR_LIRR_BLK_LIMIT_RIRR_BLK_LIMIT(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_PE_MR2VP_RIRR_LIRR_BLK_LIMIT_LIRR_BLK_LIMIT(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_TXPE_PCI_NCE_CFG_NCE_THRESH(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_TXPE_PCI_NCE_CFG_PAD_TOWI_ENABLE   vxge_mBIT(55)
#define	VXGE_HW_TXPE_PCI_NCE_CFG_NOSNOOP_TOWI   vxge_mBIT(63)
#define	VXGE_HW_MSG_QPAD_EN_CFG_UMQ_BWR_READ   vxge_mBIT(3)
#define	VXGE_HW_MSG_QPAD_EN_CFG_DMQ_BWR_READ   vxge_mBIT(7)
#define	VXGE_HW_MSG_QPAD_EN_CFG_MXP_GENDMA_READ   vxge_mBIT(11)
#define	VXGE_HW_MSG_QPAD_EN_CFG_UXP_GENDMA_READ   vxge_mBIT(15)
#define	VXGE_HW_MSG_QPAD_EN_CFG_UMQ_MSG_WRITE   vxge_mBIT(19)
#define	VXGE_HW_MSG_QPAD_EN_CFG_UMQDMQ_IR_WRITE   vxge_mBIT(23)
#define	VXGE_HW_MSG_QPAD_EN_CFG_MXP_GENDMA_WRITE   vxge_mBIT(27)
#define	VXGE_HW_MSG_QPAD_EN_CFG_UXP_GENDMA_WRITE   vxge_mBIT(31)
#define	VXGE_HW_MSG_PCI_CFG_GENDMA_NO_SNOOP   vxge_mBIT(3)
#define	VXGE_HW_MSG_PCI_CFG_UMQDMQ_IR_NO_SNOOP   vxge_mBIT(7)
#define	VXGE_HW_MSG_PCI_CFG_UMQ_NO_SNOOP   vxge_mBIT(11)
#define	VXGE_HW_MSG_PCI_CFG_DMQ_NO_SNOOP   vxge_mBIT(15)
#define	VXGE_HW_UMQDMQ_IR_INIT_HOST_WRITE_ADD(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_DMQ_IR_INT_IMMED_ENABLE   vxge_mBIT(6)
#define	VXGE_HW_DMQ_IR_INT_EVENT_ENABLE   vxge_mBIT(7)
#define	VXGE_HW_DMQ_IR_INT_NUMBER(val)   vxge_vBIT(val, 9, 7)
#define	VXGE_HW_DMQ_IR_INT_BITMAP(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_DMQ_BWR_INIT_ADD_HOST(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_DMQ_BWR_INIT_BYTE_COUNT(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_DMQ_IR_POLICY(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_UMQ_INT_IMMED_ENABLE   vxge_mBIT(6)
#define	VXGE_HW_UMQ_INT_EVENT_ENABLE   vxge_mBIT(7)
#define	VXGE_HW_UMQ_INT_NUMBER(val)   vxge_vBIT(val, 9, 7)
#define	VXGE_HW_UMQ_INT_BITMAP(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_UMQ_MR2VP_BWR_PFCH_INIT_NUMBER(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_UMQ_BWR_PFCH_CTRL_POLL_EN   vxge_mBIT(3)
#define	VXGE_HW_UMQ_MR2VP_BWR_EOL_POLL_LATENCY(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_UMQ_BWR_INIT_ADD_HOST(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_UMQ_BWR_INIT_BYTE_COUNT(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_UMQDMQ_IR_INIT_NOTIFY_PULSE   vxge_mBIT(3)
#define	VXGE_HW_DMQ_INIT_NOTIFY_PULSE   vxge_mBIT(3)
#define	VXGE_HW_UMQ_INIT_NOTIFY_PULSE   vxge_mBIT(3)
#define	VXGE_HW_TPA_CFG_IGNORE_FRAME_ERR   vxge_mBIT(3)
#define	VXGE_HW_TPA_CFG_IPV6_STOP_SEARCHING   vxge_mBIT(7)
#define	VXGE_HW_TPA_CFG_L4_PSHDR_PRESENT   vxge_mBIT(11)
#define	VXGE_HW_TPA_CFG_SUPPORT_MOBILE_IPV6_HDRS   vxge_mBIT(15)
#define	VXGE_HW_TX_VP_RESET_DISCARDED_FRMS_TX_VP_RESET_DISCARDED_FRMS(val)   vxge_vBIT(val, 48, 16)
#define	VXGE_HW_FAU_RPA_VCFG_L4_COMP_CSUM   vxge_mBIT(7)
#define	VXGE_HW_FAU_RPA_VCFG_L3_INCL_CF   vxge_mBIT(11)
#define	VXGE_HW_FAU_RPA_VCFG_L3_COMP_CSUM   vxge_mBIT(15)
#define	VXGE_HW_DBG_STATS_RX_MPA_CRC_FAIL_FRMS(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_DBG_STATS_RX_MPA_MRK_FAIL_FRMS(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_DBG_STATS_RX_MPA_LEN_FAIL_FRMS(val)   vxge_vBIT(val, 32, 16)
#define	VXGE_HW_DBG_STATS_RX_FAU_RX_WOL_FRMS(val)   vxge_vBIT(val, 0, 16)
#define	VXGE_HW_DBG_STATS_RX_FAU_RX_VP_RESET_DISCARDED_FRMS(val)   vxge_vBIT(val, 16, 16)
#define	VXGE_HW_DBG_STATS_RX_FAU_RX_PERMITTED_FRMS(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_FBMC_VP_RDY_QUEUE_SPAV_FM   vxge_mBIT(0)
#define	VXGE_HW_VPATH_PCIPIF_INT_STATUS_SRPCIM_MSG_TO_VPATH_SRPCIM_MSG_TO_VPATH_INT   vxge_mBIT(3)
#define	VXGE_HW_VPATH_PCIPIF_INT_STATUS_VPATH_SPARE_R1_VPATH_SPARE_R1_INT   vxge_mBIT(7)
#define	VXGE_HW_SRPCIM_MSG_TO_VPATH_REG_SWIF_SRPCIM_TO_VPATH_RMSG_INT   vxge_mBIT(3)
#define	VXGE_HW_VPATH_TO_SRPCIM_WMSG_VPATH_TO_SRPCIM_WMSG(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_VPATH_TO_SRPCIM_WMSG_TRIG_VPATH_TO_SRPCIM_WMSG_TRIG   vxge_mBIT(0)
#define	VXGE_HW_VPATH_GENERAL_INT_STATUS_PIC_INT   vxge_mBIT(3)
#define	VXGE_HW_VPATH_GENERAL_INT_STATUS_PCI_INT   vxge_mBIT(7)
#define	VXGE_HW_VPATH_GENERAL_INT_STATUS_WRDMA_INT   vxge_mBIT(15)
#define	VXGE_HW_VPATH_GENERAL_INT_STATUS_XMAC_INT   vxge_mBIT(19)
#define	VXGE_HW_VPATH_GENERAL_INT_MASK_PIC_INT   vxge_mBIT(3)
#define	VXGE_HW_VPATH_GENERAL_INT_MASK_PCI_INT   vxge_mBIT(7)
#define	VXGE_HW_VPATH_GENERAL_INT_MASK_WRDMA_INT   vxge_mBIT(15)
#define	VXGE_HW_VPATH_GENERAL_INT_MASK_XMAC_INT   vxge_mBIT(19)
#define	VXGE_HW_VPATH_PPIF_INT_STATUS_KDFCCTL_ERRORS_KDFCCTL_INT   vxge_mBIT(3)
#define	VXGE_HW_VPATH_PPIF_INT_STATUS_GENERAL_ERRORS_GENERAL_INT   vxge_mBIT(7)
#define	VXGE_HW_VPATH_PPIF_INT_STATUS_PCI_CONFIG_ERRORS_PCI_CONFIG_INT   vxge_mBIT(11)
#define	VXGE_HW_VPATH_PPIF_INT_STATUS_MRPCIM_TO_VPATH_ALARM_MRPCIM_TO_VPATH_ALARM_INT   vxge_mBIT(15)
#define	VXGE_HW_VPATH_PPIF_INT_STATUS_SRPCIM_TO_VPATH_ALARM_SRPCIM_TO_VPATH_ALARM_INT   vxge_mBIT(19)
#define	VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO0_OVRWR   vxge_mBIT(3)
#define	VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO1_OVRWR   vxge_mBIT(7)
#define	VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO2_OVRWR   vxge_mBIT(11)
#define	VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO0_POISON   vxge_mBIT(15)
#define	VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO1_POISON   vxge_mBIT(19)
#define	VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO2_POISON   vxge_mBIT(23)
#define	VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO0_DMA_ERR   vxge_mBIT(31)
#define	VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO1_DMA_ERR   vxge_mBIT(35)
#define	VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO2_DMA_ERR   vxge_mBIT(39)
#define	VXGE_HW_GENERAL_ERRORS_REG_DBLGEN_FIFO0_OVRFLOW   vxge_mBIT(3)
#define	VXGE_HW_GENERAL_ERRORS_REG_DBLGEN_FIFO1_OVRFLOW   vxge_mBIT(7)
#define	VXGE_HW_GENERAL_ERRORS_REG_DBLGEN_FIFO2_OVRFLOW   vxge_mBIT(11)
#define	VXGE_HW_GENERAL_ERRORS_REG_STATSB_PIF_CHAIN_ERR   vxge_mBIT(15)
#define	VXGE_HW_GENERAL_ERRORS_REG_STATSB_DROP_TIMEOUT_REQ   vxge_mBIT(19)
#define	VXGE_HW_GENERAL_ERRORS_REG_TGT_ILLEGAL_ACCESS   vxge_mBIT(27)
#define	VXGE_HW_GENERAL_ERRORS_REG_INI_SERR_DET   vxge_mBIT(31)
#define	VXGE_HW_PCI_CONFIG_ERRORS_REG_PCICONFIG_STATUS_ERR   vxge_mBIT(3)
#define	VXGE_HW_PCI_CONFIG_ERRORS_REG_PCICONFIG_UNCOR_ERR   vxge_mBIT(7)
#define	VXGE_HW_PCI_CONFIG_ERRORS_REG_PCICONFIG_COR_ERR   vxge_mBIT(11)
#define	VXGE_HW_MRPCIM_TO_VPATH_ALARM_REG_PPIF_MRPCIM_TO_VPATH_ALARM   vxge_mBIT(3)
#define	VXGE_HW_SRPCIM_TO_VPATH_ALARM_REG_PPIF_SRPCIM_TO_VPATH_ALARM(val)   vxge_vBIT(val, 0, 17)
#define	VXGE_HW_KDFCCTL_STATUS_KDFCCTL_FIFO0_PRES(val)   vxge_vBIT(val, 0, 8)
#define	VXGE_HW_KDFCCTL_STATUS_KDFCCTL_FIFO1_PRES(val)   vxge_vBIT(val, 8, 8)
#define	VXGE_HW_KDFCCTL_STATUS_KDFCCTL_FIFO2_PRES(val)   vxge_vBIT(val, 16, 8)
#define	VXGE_HW_KDFCCTL_STATUS_KDFCCTL_FIFO0_OVRWR(val)   vxge_vBIT(val, 24, 8)
#define	VXGE_HW_KDFCCTL_STATUS_KDFCCTL_FIFO1_OVRWR(val)   vxge_vBIT(val, 32, 8)
#define	VXGE_HW_KDFCCTL_STATUS_KDFCCTL_FIFO2_OVRWR(val)   vxge_vBIT(val, 40, 8)
#define	VXGE_HW_RSTHDLR_STATUS_RSTHDLR_CURRENT_RESET   vxge_mBIT(3)
#define	VXGE_HW_RSTHDLR_STATUS_RSTHDLR_CURRENT_VPIN(val)   vxge_vBIT(val, 6, 2)
#define	VXGE_HW_FIFO0_STATUS_DBLGEN_FIFO0_RDIDX(val)   vxge_vBIT(val, 0, 12)
#define	VXGE_HW_FIFO1_STATUS_DBLGEN_FIFO1_RDIDX(val)   vxge_vBIT(val, 0, 12)
#define	VXGE_HW_FIFO2_STATUS_DBLGEN_FIFO2_RDIDX(val)   vxge_vBIT(val, 0, 12)
#define	VXGE_HW_TGT_ILLEGAL_ACCESS_SWIF_REGION(val)   vxge_vBIT(val, 1, 7)
#define	VXGE_HW_VPATH_GENERAL_CFG1_TC_VALUE(val)   vxge_vBIT(val, 1, 3)
#define	VXGE_HW_VPATH_GENERAL_CFG1_DATA_BYTE_SWAPEN   vxge_mBIT(7)
#define	VXGE_HW_VPATH_GENERAL_CFG1_DATA_FLIPEN   vxge_mBIT(11)
#define	VXGE_HW_VPATH_GENERAL_CFG1_CTL_BYTE_SWAPEN   vxge_mBIT(15)
#define	VXGE_HW_VPATH_GENERAL_CFG1_CTL_FLIPEN   vxge_mBIT(23)
#define	VXGE_HW_VPATH_GENERAL_CFG1_MSIX_ADDR_SWAPEN   vxge_mBIT(51)
#define	VXGE_HW_VPATH_GENERAL_CFG1_MSIX_ADDR_FLIPEN   vxge_mBIT(55)
#define	VXGE_HW_VPATH_GENERAL_CFG1_MSIX_DATA_SWAPEN   vxge_mBIT(59)
#define	VXGE_HW_VPATH_GENERAL_CFG1_MSIX_DATA_FLIPEN   vxge_mBIT(63)
#define	VXGE_HW_VPATH_GENERAL_CFG2_SIZE_QUANTUM(val)   vxge_vBIT(val, 1, 3)
#define	VXGE_HW_VPATH_GENERAL_CFG3_IGNORE_VPATH_RST_FOR_INTA   vxge_mBIT(3)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_SWAPEN_FIFO0   vxge_mBIT(1)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_SWAPEN_FIFO1   vxge_mBIT(2)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_SWAPEN_FIFO2   vxge_mBIT(3)
#define	VXGE_HW_KDFCCTL_CFG0_BIT_FLIPEN_FIFO0   vxge_mBIT(5)
#define	VXGE_HW_KDFCCTL_CFG0_BIT_FLIPEN_FIFO1   vxge_mBIT(6)
#define	VXGE_HW_KDFCCTL_CFG0_BIT_FLIPEN_FIFO2   vxge_mBIT(7)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE0_FIFO0   vxge_mBIT(9)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE0_FIFO1   vxge_mBIT(10)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE0_FIFO2   vxge_mBIT(11)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE1_FIFO0   vxge_mBIT(13)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE1_FIFO1   vxge_mBIT(14)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE1_FIFO2   vxge_mBIT(15)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE2_FIFO0   vxge_mBIT(17)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE2_FIFO1   vxge_mBIT(18)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE2_FIFO2   vxge_mBIT(19)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE3_FIFO0   vxge_mBIT(21)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE3_FIFO1   vxge_mBIT(22)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE3_FIFO2   vxge_mBIT(23)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE4_FIFO0   vxge_mBIT(25)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE4_FIFO1   vxge_mBIT(26)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE4_FIFO2   vxge_mBIT(27)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE5_FIFO0   vxge_mBIT(29)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE5_FIFO1   vxge_mBIT(30)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE5_FIFO2   vxge_mBIT(31)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE6_FIFO0   vxge_mBIT(33)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE6_FIFO1   vxge_mBIT(34)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE6_FIFO2   vxge_mBIT(35)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE7_FIFO0   vxge_mBIT(37)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE7_FIFO1   vxge_mBIT(38)
#define	VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE7_FIFO2   vxge_mBIT(39)
#define	VXGE_HW_STATS_CFG_START_HOST_ADDR(val)   vxge_vBIT(val, 0, 57)
#define	VXGE_HW_INTERRUPT_CFG0_MSIX_FOR_RXTI(val)   vxge_vBIT(val, 1, 7)
#define	VXGE_HW_INTERRUPT_CFG0_GROUP0_MSIX_FOR_TXTI(val)   vxge_vBIT(val, 9, 7)
#define	VXGE_HW_INTERRUPT_CFG0_GROUP1_MSIX_FOR_TXTI(val)   vxge_vBIT(val, 17, 7)
#define	VXGE_HW_INTERRUPT_CFG0_GROUP2_MSIX_FOR_TXTI(val)   vxge_vBIT(val, 25, 7)
#define	VXGE_HW_INTERRUPT_CFG0_GROUP3_MSIX_FOR_TXTI(val)   vxge_vBIT(val, 33, 7)
#define	VXGE_HW_INTERRUPT_CFG2_ALARM_MAP_TO_MSG(val)   vxge_vBIT(val, 1, 7)
#define	VXGE_HW_ONE_SHOT_VECT0_EN_ONE_SHOT_VECT0_EN   vxge_mBIT(3)
#define	VXGE_HW_ONE_SHOT_VECT1_EN_ONE_SHOT_VECT1_EN   vxge_mBIT(3)
#define	VXGE_HW_ONE_SHOT_VECT2_EN_ONE_SHOT_VECT2_EN   vxge_mBIT(3)
#define	VXGE_HW_ONE_SHOT_VECT3_EN_ONE_SHOT_VECT3_EN   vxge_mBIT(3)
#define	VXGE_HW_PCI_CONFIG_ACCESS_CFG1_ADDRESS(val)   vxge_vBIT(val, 0, 12)
#define	VXGE_HW_PCI_CONFIG_ACCESS_CFG1_SEL_FUNC0   vxge_mBIT(15)
#define	VXGE_HW_PCI_CONFIG_ACCESS_CFG2_REQ   vxge_mBIT(0)
#define	VXGE_HW_PCI_CONFIG_ACCESS_STATUS_ACCESS_ERR   vxge_mBIT(0)
#define	VXGE_HW_PCI_CONFIG_ACCESS_STATUS_DATA(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_VPATH_DEBUG_STATS0_INI_NUM_MWR_SENT(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_VPATH_DEBUG_STATS1_INI_NUM_MRD_SENT(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_VPATH_DEBUG_STATS2_INI_NUM_CPL_RCVD(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_VPATH_DEBUG_STATS3_INI_NUM_MWR_BYTE_SENT(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_VPATH_DEBUG_STATS4_INI_NUM_CPL_BYTE_RCVD(val)   vxge_vBIT(val, 0, 64)
#define	VXGE_HW_VPATH_DEBUG_STATS5_WRCRDTARB_XOFF(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_VPATH_DEBUG_STATS6_RDCRDTARB_XOFF(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_VPATH_GENSTATS_COUNT01_PPIF_VPATH_GENSTATS_COUNT1(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_VPATH_GENSTATS_COUNT01_PPIF_VPATH_GENSTATS_COUNT0(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_VPATH_GENSTATS_COUNT23_PPIF_VPATH_GENSTATS_COUNT3(val)   vxge_vBIT(val, 0, 32)
#define	VXGE_HW_VPATH_GENSTATS_COUNT23_PPIF_VPATH_GENSTATS_COUNT2(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_VPATH_GENSTATS_COUNT4_PPIF_VPATH_GENSTATS_COUNT4(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_VPATH_GENSTATS_COUNT5_PPIF_VPATH_GENSTATS_COUNT5(val)   vxge_vBIT(val, 32, 32)
#define	VXGE_HW_EEPROM_SIZE   (0x01 << 11)
#define	VXGE_HW_PCI_EXP_LNKCAP_LNK_SPEED   0xf
#define	VXGE_HW_PCI_EXP_LNKCAP_LNK_WIDTH   0x3f0
#define	VXGE_HW_PCI_EXP_LNKCAP_LW_RES   0x0
Functions
	FILE_LICENCE (GPL2_ONLY)
Variables
struct vxge_hw_legacy_reg	packed

---

Define Documentation

#define vxge_mBIT

(

loc

)

(0x8000000000000000ULL >> (loc))

Definition at line 24 of file vxge_reg.h.

Referenced by __vxge_hw_device_host_info_get(), __vxge_hw_vp_initialize(), __vxge_hw_vpath_initialize(), vxge_hw_device_hw_info_get(), vxge_hw_vpath_close(), vxge_hw_vpath_strip_fcs_check(), vxge_open_vpaths(), and vxge_probe().

#define vxge_vBIT	(	val,
		loc,
		sz		)	(((u64)(val)) << (64-(loc)-(sz)))

Definition at line 29 of file vxge_reg.h.

#define vxge_vBIT32	(	val,
		loc,
		sz		)	(((u32)(val)) << (32-(loc)-(sz)))

Definition at line 30 of file vxge_reg.h.

#define vxge_bVALn	(	bits,
		loc,
		n		)	((((u64)bits) >> (64-(loc+n))) & ((0x1ULL << n) - 1))

Definition at line 35 of file vxge_reg.h.

Referenced by __vxge_hw_pio_mem_write64(), __vxge_hw_vpath_pci_read(), __vxge_hw_vpath_reset(), vxge_hw_device_mask_all(), vxge_hw_device_unmask_all(), vxge_hw_vpath_enable(), and vxge_hw_vpath_intr_enable().

#define VXGE_HW_TITAN_ASIC_ID_GET_INITIAL_DEVICE_ID

(

bits

)

vxge_bVALn(bits, 0, 16)

Definition at line 38 of file vxge_reg.h.

#define VXGE_HW_TITAN_ASIC_ID_GET_INITIAL_MAJOR_REVISION

(

bits

)

vxge_bVALn(bits, 48, 8)

Definition at line 40 of file vxge_reg.h.

#define VXGE_HW_TITAN_ASIC_ID_GET_INITIAL_MINOR_REVISION

(

bits

)

vxge_bVALn(bits, 56, 8)

Definition at line 42 of file vxge_reg.h.

#define VXGE_HW_VPATH_TO_FUNC_MAP_CFG1_GET_VPATH_TO_FUNC_MAP_CFG1

(

bits

)

vxge_bVALn(bits, 3, 5)

Definition at line 45 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_func_id_get().

#define VXGE_HW_HOST_TYPE_ASSIGNMENTS_GET_HOST_TYPE_ASSIGNMENTS

(

bits

)

vxge_bVALn(bits, 5, 3)

Definition at line 47 of file vxge_reg.h.

Referenced by __vxge_hw_device_host_info_get(), and vxge_hw_device_hw_info_get().

#define VXGE_HW_PF_SW_RESET_COMMAND   0xA5

Definition at line 49 of file vxge_reg.h.

#define VXGE_HW_TITAN_PCICFGMGMT_REG_SPACES   17

Definition at line 51 of file vxge_reg.h.

#define VXGE_HW_TITAN_SRPCIM_REG_SPACES   17

Definition at line 52 of file vxge_reg.h.

Referenced by __vxge_hw_device_reg_addr_get().

#define VXGE_HW_TITAN_VPMGMT_REG_SPACES   17

Definition at line 53 of file vxge_reg.h.

Referenced by __vxge_hw_device_reg_addr_get().

#define VXGE_HW_TITAN_VPATH_REG_SPACES   17

Definition at line 54 of file vxge_reg.h.

Referenced by __vxge_hw_device_reg_addr_get().

#define VXGE_HW_PRIV_FN_ACTION   8

Definition at line 57 of file vxge_reg.h.

#define VXGE_HW_PRIV_VP_ACTION   5

Definition at line 58 of file vxge_reg.h.

#define VXGE_HW_PRIV_FN_MEMO   13

Definition at line 59 of file vxge_reg.h.

#define VXGE_HW_EN_DIS_UDP_RTH   10

Definition at line 60 of file vxge_reg.h.

#define VXGE_HW_BW_CONTROL   12

Definition at line 61 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_FW_MEMO_ACTION_PRIV_NWIF   17

Definition at line 62 of file vxge_reg.h.

#define VXGE_HW_FW_API_FUNC_MODE   11

Definition at line 64 of file vxge_reg.h.

#define VXGE_HW_FW_API_GET_FUNC_MODE   29

Definition at line 65 of file vxge_reg.h.

Referenced by vxge_hw_get_func_mode().

#define VXGE_HW_FW_API_FUNC_MODE_COMMIT   21

Definition at line 66 of file vxge_reg.h.

#define VXGE_HW_GET_FUNC_MODE_VAL

(

val

)

(val & 0xFF)

Definition at line 67 of file vxge_reg.h.

Referenced by vxge_hw_get_func_mode().

#define VXGE_HW_BYTES_PER_U64   8

Definition at line 69 of file vxge_reg.h.

#define VXGE_HW_FW_UPGRADE_MEMO   13

Definition at line 70 of file vxge_reg.h.

#define VXGE_HW_FW_UPGRADE_ACTION   16

Definition at line 71 of file vxge_reg.h.

#define VXGE_HW_FW_UPGRADE_OFFSET_START   2

Definition at line 72 of file vxge_reg.h.

#define VXGE_HW_FW_UPGRADE_OFFSET_SEND   3

Definition at line 73 of file vxge_reg.h.

#define VXGE_HW_FW_UPGRADE_OFFSET_COMMIT   4

Definition at line 74 of file vxge_reg.h.

#define VXGE_HW_FW_UPGRADE_OFFSET_READ   5

Definition at line 75 of file vxge_reg.h.

#define VXGE_HW_FW_UPGRADE_BLK_SIZE   16

Definition at line 77 of file vxge_reg.h.

#define VXGE_HW_UPGRADE_GET_RET_ERR_CODE

(

val

)

(val & 0xff)

Definition at line 78 of file vxge_reg.h.

#define VXGE_HW_UPGRADE_GET_SEC_ERR_CODE

(

val

)

((val >> 8) & 0xff)

Definition at line 79 of file vxge_reg.h.

#define VXGE_HW_ASIC_MODE_RESERVED   0

Definition at line 81 of file vxge_reg.h.

#define VXGE_HW_ASIC_MODE_NO_IOV   1

Definition at line 82 of file vxge_reg.h.

#define VXGE_HW_ASIC_MODE_SR_IOV   2

Definition at line 83 of file vxge_reg.h.

#define VXGE_HW_ASIC_MODE_MR_IOV   3

Definition at line 84 of file vxge_reg.h.

#define VXGE_HW_TXMAC_GEN_CFG1_TMAC_PERMA_STOP_EN   vxge_mBIT(3)

Definition at line 86 of file vxge_reg.h.

#define VXGE_HW_TXMAC_GEN_CFG1_BLOCK_BCAST_TO_WIRE   vxge_mBIT(19)

Definition at line 87 of file vxge_reg.h.

#define VXGE_HW_TXMAC_GEN_CFG1_BLOCK_BCAST_TO_SWITCH   vxge_mBIT(23)

Definition at line 88 of file vxge_reg.h.

#define VXGE_HW_TXMAC_GEN_CFG1_HOST_APPEND_FCS   vxge_mBIT(31)

Definition at line 89 of file vxge_reg.h.

#define VXGE_HW_VPATH_IS_FIRST_GET_VPATH_IS_FIRST

(

bits

)

vxge_bVALn(bits, 3, 1)

Definition at line 91 of file vxge_reg.h.

#define VXGE_HW_TIM_VPATH_ASSIGNMENT_GET_BMAP_ROOT

(

bits

)

vxge_bVALn(bits, 0, 32)

Definition at line 93 of file vxge_reg.h.

#define VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_GET_MAX_PYLD_LEN

(

bits

)

vxge_bVALn(bits, 50, 14)

Definition at line 96 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_mgmt_read().

#define VXGE_HW_XMAC_VSPORT_CHOICES_VP_GET_VSPORT_VECTOR

(

bits

)

vxge_bVALn(bits, 0, 17)

Definition at line 99 of file vxge_reg.h.

#define VXGE_HW_XMAC_VPATH_TO_VSPORT_VPMGMT_CLONE_GET_VSPORT_NUMBER

(

bits

)

vxge_bVALn(bits, 3, 5)

Definition at line 102 of file vxge_reg.h.

#define VXGE_HW_KDFC_DRBL_TRIPLET_TOTAL_GET_KDFC_MAX_SIZE

(

bits

)

vxge_bVALn(bits, 17, 15)

Definition at line 105 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_kdfc_configure().

#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_MODE_LEGACY_MODE   0

Definition at line 108 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_MODE_NON_OFFLOAD_ONLY   1

Definition at line 109 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_kdfc_configure().

#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_MODE_MULTI_OP_MODE   2

Definition at line 110 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_MODE_MESSAGES_ONLY   0

Definition at line 112 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_MODE_MULTI_OP_MODE   1

Definition at line 113 of file vxge_reg.h.

#define VXGE_HW_TOC_GET_KDFC_INITIAL_OFFSET

(

val

)

(val&~VXGE_HW_TOC_KDFC_INITIAL_BIR(7))

Definition at line 115 of file vxge_reg.h.

Referenced by __vxge_hw_device_reg_addr_get().

#define VXGE_HW_TOC_GET_KDFC_INITIAL_BIR

(

val

)

vxge_bVALn(val, 61, 3)

Definition at line 117 of file vxge_reg.h.

Referenced by __vxge_hw_device_reg_addr_get().

#define VXGE_HW_TOC_GET_USDC_INITIAL_OFFSET

(

val

)

(val&~VXGE_HW_TOC_USDC_INITIAL_BIR(7))

Definition at line 119 of file vxge_reg.h.

#define VXGE_HW_TOC_GET_USDC_INITIAL_BIR

(

val

)

vxge_bVALn(val, 61, 3)

Definition at line 121 of file vxge_reg.h.

#define VXGE_HW_TOC_KDFC_VPATH_STRIDE_GET_TOC_KDFC_VPATH_STRIDE

(

bits

)

bits

Definition at line 124 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_kdfc_configure().

#define VXGE_HW_TOC_KDFC_FIFO_STRIDE_GET_TOC_KDFC_FIFO_STRIDE

(

bits

)

bits

Definition at line 125 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_OFFSET_GET_KDFC_RCTR0

(

bits

)

vxge_bVALn(bits, 1, 15)

Definition at line 127 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_OFFSET_GET_KDFC_RCTR1

(

bits

)

vxge_bVALn(bits, 17, 15)

Definition at line 129 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_OFFSET_GET_KDFC_RCTR2

(

bits

)

vxge_bVALn(bits, 33, 15)

Definition at line 131 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_OFFSET_KDFC_VAPTH_NUM

(

val

)

vxge_vBIT(val, 42, 5)

Definition at line 134 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_OFFSET_KDFC_FIFO_NUM

(

val

)

vxge_vBIT(val, 47, 2)

Definition at line 135 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_OFFSET_KDFC_FIFO_OFFSET

(

val

)

vxge_vBIT(val, 49, 15)

Definition at line 136 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG4_RING_MODE_ONE_BUFFER   0

Definition at line 139 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_prc_configure().

#define VXGE_HW_PRC_CFG4_RING_MODE_THREE_BUFFER   1

Definition at line 140 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG4_RING_MODE_FIVE_BUFFER   2

Definition at line 141 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG7_SCATTER_MODE_A   0

Definition at line 143 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG7_SCATTER_MODE_B   2

Definition at line 144 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG7_SCATTER_MODE_C   1

Definition at line 145 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_CTRL_WE_READ   0

Definition at line 147 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_CTRL_WE_WRITE   1

Definition at line 148 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_DA   0

Definition at line 150 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_VID   1

Definition at line 151 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_ETYPE   2

Definition at line 152 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_PN   3

Definition at line 153 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_RANGE_PN   4

Definition at line 154 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_RTH_GEN_CFG   5

Definition at line 155 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_RTH_SOLO_IT   6

Definition at line 156 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_RTH_JHASH_CFG   7

Definition at line 157 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_RTH_MASK   8

Definition at line 158 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_RTH_KEY   9

Definition at line 159 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_QOS   10

Definition at line 160 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_DS   11

Definition at line 161 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_RTH_MULTI_IT   12

Definition at line 162 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_CTRL_DATA_STRUCT_SEL_FW_VERSION   13

Definition at line 163 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_DATA0_GET_DA_MAC_ADDR

(

bits

)

vxge_bVALn(bits, 0, 48)

Definition at line 165 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_DATA0_DA_MAC_ADDR

(

val

)

vxge_vBIT(val, 0, 48)

Definition at line 167 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_DATA1_GET_DA_MAC_ADDR_MASK

(

bits

)

vxge_bVALn(bits, 0, 48)

Definition at line 169 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_DATA1_DA_MAC_ADDR_MASK

(

val

)

vxge_vBIT(val, 0, 48)

Definition at line 171 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_DATA1_DA_MAC_ADDR_ADD_PRIVILEGED_MODE   vxge_mBIT(54)

Definition at line 172 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_DATA1_GET_DA_MAC_ADDR_ADD_VPATH

(

bits

)

vxge_bVALn(bits, 55, 5)

Definition at line 174 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_DATA1_DA_MAC_ADDR_ADD_VPATH

(

val

)

vxge_vBIT(val, 55, 5)

Definition at line 176 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_DATA1_GET_DA_MAC_ADDR_ADD_MODE

(

bits

)

vxge_bVALn(bits, 62, 2)

Definition at line 178 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_STEER_DATA1_DA_MAC_ADDR_MODE

(

val

)

vxge_vBIT(val, 62, 2)

Definition at line 180 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_ADD_ENTRY   0

Definition at line 182 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_DELETE_ENTRY   1

Definition at line 183 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_LIST_FIRST_ENTRY   2

Definition at line 184 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_addr_get().

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_LIST_NEXT_ENTRY   3

Definition at line 185 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_addr_get().

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_ENTRY   0

Definition at line 186 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_fw_ver_get().

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_WRITE_ENTRY   1

Definition at line 187 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_MEMO_ENTRY   3

Definition at line 188 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_card_info_get().

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_LED_CONTROL   4

Definition at line 189 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_ALL_CLEAR   172

Definition at line 190 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DA   0

Definition at line 192 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_addr_get().

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_VID   1

Definition at line 193 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_ETYPE   2

Definition at line 194 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_PN   3

Definition at line 195 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_RTH_GEN_CFG   5

Definition at line 196 of file vxge_reg.h.

#define VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_SOLO_IT   6

Definition at line 197 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_RTH_JHASH_CFG   7

Definition at line 198 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MASK   8

Definition at line 199 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_RTH_KEY   9

Definition at line 200 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_QOS   10

Definition at line 201 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DS   11

Definition at line 202 of file vxge_reg.h.

#define VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MULTI_IT   12

Definition at line 203 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO   13

Definition at line 204 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_card_info_get(), __vxge_hw_vpath_fw_ver_get(), and vxge_hw_set_fw_api().

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_DA_MAC_ADDR

(

bits

)

vxge_bVALn(bits, 0, 48)

Definition at line 206 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_addr_get().

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_DA_MAC_ADDR

(

val

)

vxge_vBIT(val, 0, 48)

Definition at line 208 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_SEND_TO_NW   vxge_mBIT(51)

Definition at line 209 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_VLAN_ID

(

bits

)

vxge_bVALn(bits, 0, 12)

Definition at line 211 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_VLAN_ID

(

val

)

vxge_vBIT(val, 0, 12)

Definition at line 212 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_ETYPE

(

bits

)

vxge_bVALn(bits, 0, 11)

Definition at line 214 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_ETYPE

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 215 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_PN_SRC_DEST_SEL

(

bits

)

vxge_bVALn(bits, 3, 1)

Definition at line 217 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_PN_SRC_DEST_SEL   vxge_mBIT(3)

Definition at line 219 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_PN_TCP_UDP_SEL

(

bits

)

vxge_bVALn(bits, 7, 1)

Definition at line 220 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_PN_TCP_UDP_SEL   vxge_mBIT(7)

Definition at line 222 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_PN_PORT_NUM

(

bits

)

vxge_bVALn(bits, 8, 16)

Definition at line 223 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_PN_PORT_NUM

(

val

)

vxge_vBIT(val, 8, 16)

Definition at line 225 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_RTH_EN

(

bits

)

vxge_bVALn(bits, 3, 1)

Definition at line 227 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_EN   vxge_mBIT(3)

Definition at line 229 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_BUCKET_SIZE

(

bits

)

vxge_bVALn(bits, 4, 4)

Definition at line 230 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_BUCKET_SIZE

(

val

)

vxge_vBIT(val, 4, 4)

Definition at line 232 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_ALG_SEL

(

bits

)

vxge_bVALn(bits, 10, 2)

Definition at line 234 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_ALG_SEL

(

val

)

vxge_vBIT(val, 10, 2)

Definition at line 236 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_ALG_SEL_JENKINS   0

Definition at line 238 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_ALG_SEL_MS_RSS   1

Definition at line 239 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_ALG_SEL_CRC32C   2

Definition at line 240 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_RTH_TCP_IPV4_EN

(

bits

)

vxge_bVALn(bits, 15, 1)

Definition at line 241 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_TCP_IPV4_EN   vxge_mBIT(15)

Definition at line 243 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_RTH_IPV4_EN

(

bits

)

vxge_bVALn(bits, 19, 1)

Definition at line 244 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_IPV4_EN   vxge_mBIT(19)

Definition at line 246 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_RTH_TCP_IPV6_EN

(

bits

)

vxge_bVALn(bits, 23, 1)

Definition at line 247 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_TCP_IPV6_EN   vxge_mBIT(23)

Definition at line 249 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_RTH_IPV6_EN

(

bits

)

vxge_bVALn(bits, 27, 1)

Definition at line 250 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_IPV6_EN   vxge_mBIT(27)

Definition at line 252 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_RTH_TCP_IPV6_EX_EN

(

bits

)

vxge_bVALn(bits, 31, 1)

Definition at line 253 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_TCP_IPV6_EX_EN   vxge_mBIT(31)

Definition at line 255 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_RTH_IPV6_EX_EN

(

bits

)

vxge_bVALn(bits, 35, 1)

Definition at line 256 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_IPV6_EX_EN   vxge_mBIT(35)

Definition at line 258 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_ACTIVE_TABLE

(

bits

)

vxge_bVALn(bits, 39, 1)

Definition at line 259 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_ACTIVE_TABLE   vxge_mBIT(39)

Definition at line 261 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_GEN_REPL_ENTRY_EN

(

bits

)

vxge_bVALn(bits, 43, 1)

Definition at line 262 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_GEN_REPL_ENTRY_EN   vxge_mBIT(43)

Definition at line 264 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_SOLO_IT_ENTRY_EN

(

bits

)

vxge_bVALn(bits, 3, 1)

Definition at line 266 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_SOLO_IT_ENTRY_EN   vxge_mBIT(3)

Definition at line 268 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_SOLO_IT_BUCKET_DATA

(

bits

)

vxge_bVALn(bits, 9, 7)

Definition at line 269 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_SOLO_IT_BUCKET_DATA

(

val

)

vxge_vBIT(val, 9, 7)

Definition at line 271 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_ITEM0_BUCKET_NUM

(

bits

)

vxge_bVALn(bits, 0, 8)

Definition at line 274 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_ITEM0_BUCKET_NUM

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 276 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_ITEM0_ENTRY_EN

(

bits

)

vxge_bVALn(bits, 8, 1)

Definition at line 278 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_ITEM0_ENTRY_EN   vxge_mBIT(8)

Definition at line 280 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_ITEM0_BUCKET_DATA

(

bits

)

vxge_bVALn(bits, 9, 7)

Definition at line 281 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_ITEM0_BUCKET_DATA

(

val

)

vxge_vBIT(val, 9, 7)

Definition at line 283 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_ITEM1_BUCKET_NUM

(

bits

)

vxge_bVALn(bits, 16, 8)

Definition at line 285 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_ITEM1_BUCKET_NUM

(

val

)

vxge_vBIT(val, 16, 8)

Definition at line 287 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_ITEM1_ENTRY_EN

(

bits

)

vxge_bVALn(bits, 24, 1)

Definition at line 289 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_ITEM1_ENTRY_EN   vxge_mBIT(24)

Definition at line 291 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_ITEM1_BUCKET_DATA

(

bits

)

vxge_bVALn(bits, 25, 7)

Definition at line 292 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_ITEM1_BUCKET_DATA

(

val

)

vxge_vBIT(val, 25, 7)

Definition at line 294 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM0_BUCKET_NUM

(

bits

)

vxge_bVALn(bits, 0, 8)

Definition at line 296 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM0_BUCKET_NUM

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 298 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM0_ENTRY_EN

(

bits

)

vxge_bVALn(bits, 8, 1)

Definition at line 300 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM0_ENTRY_EN   vxge_mBIT(8)

Definition at line 302 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM0_BUCKET_DATA

(

bits

)

vxge_bVALn(bits, 9, 7)

Definition at line 303 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM0_BUCKET_DATA

(

val

)

vxge_vBIT(val, 9, 7)

Definition at line 305 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM1_BUCKET_NUM

(

bits

)

vxge_bVALn(bits, 16, 8)

Definition at line 307 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM1_BUCKET_NUM

(

val

)

vxge_vBIT(val, 16, 8)

Definition at line 309 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM1_ENTRY_EN

(

bits

)

vxge_bVALn(bits, 24, 1)

Definition at line 311 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM1_ENTRY_EN   vxge_mBIT(24)

Definition at line 313 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM1_BUCKET_DATA

(

bits

)

vxge_bVALn(bits, 25, 7)

Definition at line 314 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM1_BUCKET_DATA

(

val

)

vxge_vBIT(val, 25, 7)

Definition at line 316 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_JHASH_CFG_GOLDEN_RATIO

(

bits

)

vxge_bVALn(bits, 0, 32)

Definition at line 319 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_JHASH_CFG_GOLDEN_RATIO

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 321 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_JHASH_CFG_INIT_VALUE

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 323 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_JHASH_CFG_INIT_VALUE

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 325 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_MASK_IPV6_SA_MASK

(

bits

)

vxge_bVALn(bits, 0, 16)

Definition at line 328 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_MASK_IPV6_SA_MASK

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 330 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_MASK_IPV6_DA_MASK

(

bits

)

vxge_bVALn(bits, 16, 16)

Definition at line 332 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_MASK_IPV6_DA_MASK

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 334 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_MASK_IPV4_SA_MASK

(

bits

)

vxge_bVALn(bits, 32, 4)

Definition at line 336 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_MASK_IPV4_SA_MASK

(

val

)

vxge_vBIT(val, 32, 4)

Definition at line 338 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_MASK_IPV4_DA_MASK

(

bits

)

vxge_bVALn(bits, 36, 4)

Definition at line 340 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_MASK_IPV4_DA_MASK

(

val

)

vxge_vBIT(val, 36, 4)

Definition at line 342 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_MASK_L4SP_MASK

(

bits

)

vxge_bVALn(bits, 40, 2)

Definition at line 344 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_MASK_L4SP_MASK

(

val

)

vxge_vBIT(val, 40, 2)

Definition at line 346 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_MASK_L4DP_MASK

(

bits

)

vxge_bVALn(bits, 42, 2)

Definition at line 348 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_MASK_L4DP_MASK

(

val

)

vxge_vBIT(val, 42, 2)

Definition at line 350 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_RTH_KEY_KEY

(

bits

)

vxge_bVALn(bits, 0, 64)

Definition at line 353 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_RTH_KEY_KEY   vxge_vBIT(val, 0, 64)

Definition at line 355 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_QOS_ENTRY_EN

(

bits

)

vxge_bVALn(bits, 3, 1)

Definition at line 357 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_QOS_ENTRY_EN   vxge_mBIT(3)

Definition at line 359 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_DS_ENTRY_EN

(

bits

)

vxge_bVALn(bits, 3, 1)

Definition at line 361 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_DS_ENTRY_EN   vxge_mBIT(3)

Definition at line 363 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_DA_MAC_ADDR_MASK

(

bits

)

vxge_bVALn(bits, 0, 48)

Definition at line 365 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_addr_get().

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_DA_MAC_ADDR_MASK

(

val

)

vxge_vBIT(val, 0, 48)

Definition at line 367 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_DA_MAC_ADDR_MODE

(

val

)

vxge_vBIT(val, 62, 2)

Definition at line 369 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM4_BUCKET_NUM

(

bits

)

vxge_bVALn(bits, 0, 8)

Definition at line 372 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM4_BUCKET_NUM

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 374 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM4_ENTRY_EN

(

bits

)

vxge_bVALn(bits, 8, 1)

Definition at line 376 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM4_ENTRY_EN   vxge_mBIT(8)

Definition at line 378 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM4_BUCKET_DATA

(

bits

)

vxge_bVALn(bits, 9, 7)

Definition at line 379 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM4_BUCKET_DATA

(

val

)

vxge_vBIT(val, 9, 7)

Definition at line 381 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM5_BUCKET_NUM

(

bits

)

vxge_bVALn(bits, 16, 8)

Definition at line 383 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM5_BUCKET_NUM

(

val

)

vxge_vBIT(val, 16, 8)

Definition at line 385 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM5_ENTRY_EN

(

bits

)

vxge_bVALn(bits, 24, 1)

Definition at line 387 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM5_ENTRY_EN   vxge_mBIT(24)

Definition at line 389 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM5_BUCKET_DATA

(

bits

)

vxge_bVALn(bits, 25, 7)

Definition at line 390 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM5_BUCKET_DATA

(

val

)

vxge_vBIT(val, 25, 7)

Definition at line 392 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM6_BUCKET_NUM

(

bits

)

vxge_bVALn(bits, 32, 8)

Definition at line 394 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM6_BUCKET_NUM

(

val

)

vxge_vBIT(val, 32, 8)

Definition at line 396 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM6_ENTRY_EN

(

bits

)

vxge_bVALn(bits, 40, 1)

Definition at line 398 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM6_ENTRY_EN   vxge_mBIT(40)

Definition at line 400 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM6_BUCKET_DATA

(

bits

)

vxge_bVALn(bits, 41, 7)

Definition at line 401 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM6_BUCKET_DATA

(

val

)

vxge_vBIT(val, 41, 7)

Definition at line 403 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM7_BUCKET_NUM

(

bits

)

vxge_bVALn(bits, 48, 8)

Definition at line 405 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM7_BUCKET_NUM

(

val

)

vxge_vBIT(val, 48, 8)

Definition at line 407 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM7_ENTRY_EN

(

bits

)

vxge_bVALn(bits, 56, 1)

Definition at line 409 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM7_ENTRY_EN   vxge_mBIT(56)

Definition at line 411 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RTH_ITEM7_BUCKET_DATA

(

bits

)

vxge_bVALn(bits, 57, 7)

Definition at line 412 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_RTH_ITEM7_BUCKET_DATA

(

val

)

vxge_vBIT(val, 57, 7)

Definition at line 414 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PART_NUMBER   0

Definition at line 417 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_card_info_get().

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_SERIAL_NUMBER   1

Definition at line 418 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_card_info_get().

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_VERSION   2

Definition at line 419 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PCI_MODE   3

Definition at line 420 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_DESC_0   4

Definition at line 421 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_card_info_get().

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_DESC_1   5

Definition at line 422 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_DESC_2   6

Definition at line 423 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_DESC_3   7

Definition at line 424 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_card_info_get().

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORTS   8

Definition at line 425 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORT0_PMD_TYPE   10

Definition at line 427 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORT0_PMD_VENDOR   11

Definition at line 428 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORT0_PMD_PARTNO   13

Definition at line 429 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORT0_PMD_SERNO   14

Definition at line 430 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORT1_PMD_TYPE   20

Definition at line 432 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORT1_PMD_VENDOR   21

Definition at line 433 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORT1_PMD_PARTNO   23

Definition at line 434 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PORT1_PMD_SERNO   24

Definition at line 435 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_LED_CONTROL_ON   1

Definition at line 437 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_LED_CONTROL_OFF   0

Definition at line 438 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_DAY

(

bits

)

vxge_bVALn(bits, 0, 8)

Definition at line 440 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_fw_ver_get().

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_FW_VER_DAY

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 442 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_MONTH

(

bits

)

vxge_bVALn(bits, 8, 8)

Definition at line 443 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_fw_ver_get().

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_FW_VER_MONTH

(

val

)

vxge_vBIT(val, 8, 8)

Definition at line 445 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_YEAR

(

bits

)

vxge_bVALn(bits, 16, 16)

Definition at line 446 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_fw_ver_get().

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_FW_VER_YEAR

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 448 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_MAJOR

(

bits

)

vxge_bVALn(bits, 32, 8)

Definition at line 451 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_fw_ver_get().

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_FW_VER_MAJOR   vxge_vBIT(val, 32, 8)

Definition at line 453 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_MINOR

(

bits

)

vxge_bVALn(bits, 40, 8)

Definition at line 454 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_fw_ver_get().

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_FW_VER_MINOR   vxge_vBIT(val, 40, 8)

Definition at line 456 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_BUILD

(

bits

)

vxge_bVALn(bits, 48, 16)

Definition at line 457 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_fw_ver_get().

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_GET_ACTION

(

bits

)

vxge_bVALn(bits, 0, 8)

Definition at line 459 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_FW_VER_BUILD   vxge_vBIT(val, 48, 16)

Definition at line 461 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_DAY

(

bits

)

vxge_bVALn(bits, 0, 8)

Definition at line 462 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_fw_ver_get().

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_FLASH_VER_DAY

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 464 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_MONTH

(

bits

)

vxge_bVALn(bits, 8, 8)

Definition at line 465 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_fw_ver_get().

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_FLASH_VER_MONTH

(

val

)

vxge_vBIT(val, 8, 8)

Definition at line 467 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_YEAR

(

bits

)

vxge_bVALn(bits, 16, 16)

Definition at line 468 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_fw_ver_get().

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_FLASH_VER_YEAR

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 470 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_MAJOR

(

bits

)

vxge_bVALn(bits, 32, 8)

Definition at line 473 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_fw_ver_get().

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_FLASH_VER_MAJOR   vxge_vBIT(val, 32, 8)

Definition at line 475 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_MINOR

(

bits

)

vxge_bVALn(bits, 40, 8)

Definition at line 476 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_fw_ver_get().

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_FLASH_VER_MINOR   vxge_vBIT(val, 40, 8)

Definition at line 478 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_BUILD

(

bits

)

vxge_bVALn(bits, 48, 16)

Definition at line 479 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_fw_ver_get().

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_FLASH_VER_BUILD   vxge_vBIT(val, 48, 16)

Definition at line 481 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_SET_NWIF_CMD

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 484 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_API_VER

(

bits

)

vxge_bVALn(bits, 0, 8)

Definition at line 488 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_TX_PRIORITY

(

bits

)

vxge_bVALn(bits, 21, 3)

Definition at line 490 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_TX_MIN_BW

(

bits

)

vxge_bVALn(bits, 24, 8)

Definition at line 492 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_TX_MAX_BW

(

bits

)

vxge_bVALn(bits, 32, 8)

Definition at line 494 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RX_PRIORITY

(

bits

)

vxge_bVALn(bits, 45, 3)

Definition at line 496 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RX_MIN_BW

(

bits

)

vxge_bVALn(bits, 48, 8)

Definition at line 498 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_RX_MAX_BW

(

bits

)

vxge_bVALn(bits, 56, 8)

Definition at line 500 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_SET_VPATH_OR_FUNC

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 503 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_SET_TX_PRIORITY

(

val

)

vxge_vBIT(val, 21, 3)

Definition at line 505 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_SET_TX_MIN_BW

(

val

)

vxge_vBIT(val, 24, 8)

Definition at line 507 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_SET_TX_MAX_BW

(

val

)

vxge_vBIT(val, 32, 8)

Definition at line 509 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_SET_RX_PRIORITY

(

val

)

vxge_vBIT(val, 45, 3)

Definition at line 511 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_SET_RX_MIN_BW

(

val

)

vxge_vBIT(val, 48, 8)

Definition at line 513 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_SET_RX_MAX_BW

(

val

)

vxge_vBIT(val, 56, 8)

Definition at line 515 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_TO_VPATH_ALARM_REG_GET_PPIF_SRPCIM_TO_VPATH_ALARM

(

bits

)

vxge_bVALn(bits, 0, 18)

Definition at line 518 of file vxge_reg.h.

#define VXGE_HW_RX_MULTI_CAST_STATS_GET_FRAME_DISCARD

(

bits

)

vxge_bVALn(bits, 48, 16)

Definition at line 521 of file vxge_reg.h.

#define VXGE_HW_RX_FRM_TRANSFERRED_GET_RX_FRM_TRANSFERRED

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 523 of file vxge_reg.h.

#define VXGE_HW_RXD_RETURNED_GET_RXD_RETURNED

(

bits

)

vxge_bVALn(bits, 48, 16)

Definition at line 525 of file vxge_reg.h.

#define VXGE_HW_VPATH_DEBUG_STATS0_GET_INI_NUM_MWR_SENT

(

bits

)

vxge_bVALn(bits, 0, 32)

Definition at line 526 of file vxge_reg.h.

#define VXGE_HW_VPATH_DEBUG_STATS1_GET_INI_NUM_MRD_SENT

(

bits

)

vxge_bVALn(bits, 0, 32)

Definition at line 528 of file vxge_reg.h.

#define VXGE_HW_VPATH_DEBUG_STATS2_GET_INI_NUM_CPL_RCVD

(

bits

)

vxge_bVALn(bits, 0, 32)

Definition at line 530 of file vxge_reg.h.

#define VXGE_HW_VPATH_DEBUG_STATS3_GET_INI_NUM_MWR_BYTE_SENT

(

bits

)

(bits)

Definition at line 532 of file vxge_reg.h.

#define VXGE_HW_VPATH_DEBUG_STATS4_GET_INI_NUM_CPL_BYTE_RCVD

(

bits

)

(bits)

Definition at line 533 of file vxge_reg.h.

#define VXGE_HW_VPATH_DEBUG_STATS5_GET_WRCRDTARB_XOFF

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 534 of file vxge_reg.h.

#define VXGE_HW_VPATH_DEBUG_STATS6_GET_RDCRDTARB_XOFF

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 536 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENSTATS_COUNT01_GET_PPIF_VPATH_GENSTATS_COUNT1

(

bits

)

vxge_bVALn(bits, 0, 32)

Definition at line 538 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENSTATS_COUNT01_GET_PPIF_VPATH_GENSTATS_COUNT0

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 540 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENSTATS_COUNT23_GET_PPIF_VPATH_GENSTATS_COUNT3

(

bits

)

vxge_bVALn(bits, 0, 32)

Definition at line 542 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENSTATS_COUNT23_GET_PPIF_VPATH_GENSTATS_COUNT2

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 544 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENSTATS_COUNT4_GET_PPIF_VPATH_GENSTATS_COUNT4

(

bits

)

vxge_bVALn(bits, 0, 32)

Definition at line 546 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENSTATS_COUNT5_GET_PPIF_VPATH_GENSTATS_COUNT5

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 548 of file vxge_reg.h.

#define VXGE_HW_TX_VP_RESET_DISCARDED_FRMS_GET_TX_VP_RESET_DISCARDED_FRMS

(

bits

)

vxge_bVALn(bits, 48, 16)

Definition at line 551 of file vxge_reg.h.

#define VXGE_HW_DBG_STATS_GET_RX_MPA_CRC_FAIL_FRMS

(

bits

)

vxge_bVALn(bits, 0, 16)

Definition at line 552 of file vxge_reg.h.

#define VXGE_HW_DBG_STATS_GET_RX_MPA_MRK_FAIL_FRMS

(

bits

)

vxge_bVALn(bits, 16, 16)

Definition at line 553 of file vxge_reg.h.

#define VXGE_HW_DBG_STATS_GET_RX_MPA_LEN_FAIL_FRMS

(

bits

)

vxge_bVALn(bits, 32, 16)

Definition at line 555 of file vxge_reg.h.

#define VXGE_HW_DBG_STATS_GET_RX_FAU_RX_WOL_FRMS

(

bits

)

vxge_bVALn(bits, 0, 16)

Definition at line 557 of file vxge_reg.h.

#define VXGE_HW_DBG_STATS_GET_RX_FAU_RX_VP_RESET_DISCARDED_FRMS

(

bits

)

vxge_bVALn(bits, 16, 16)

Definition at line 558 of file vxge_reg.h.

#define VXGE_HW_DBG_STATS_GET_RX_FAU_RX_PERMITTED_FRMS

(

bits

)

vxge_bVALn(bits, 32, 16)

Definition at line 560 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_DEBUG_STATS0_GET_INI_WR_DROP

(

bits

)

vxge_bVALn(bits, 0, 32)

Definition at line 563 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_DEBUG_STATS0_GET_INI_RD_DROP

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 565 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_DEBUG_STATS1_GET_VPLANE_WRCRDTARB_PH_CRDT_DEPLETED

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 568 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_DEBUG_STATS2_GET_VPLANE_WRCRDTARB_PD_CRDT_DEPLETED

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 570 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_DEBUG_STATS3_GET_VPLANE_RDCRDTARB_NPH_CRDT_DEPLETED

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 572 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_DEBUG_STATS4_GET_INI_WR_VPIN_DROP

(

bits

)

vxge_bVALn(bits, 0, 32)

Definition at line 574 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_DEBUG_STATS4_GET_INI_RD_VPIN_DROP

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 576 of file vxge_reg.h.

#define VXGE_HW_GENSTATS_COUNT01_GET_GENSTATS_COUNT1

(

bits

)

vxge_bVALn(bits, 0, 32)

Definition at line 578 of file vxge_reg.h.

#define VXGE_HW_GENSTATS_COUNT01_GET_GENSTATS_COUNT0

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 580 of file vxge_reg.h.

#define VXGE_HW_GENSTATS_COUNT23_GET_GENSTATS_COUNT3

(

bits

)

vxge_bVALn(bits, 0, 32)

Definition at line 582 of file vxge_reg.h.

#define VXGE_HW_GENSTATS_COUNT23_GET_GENSTATS_COUNT2

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 584 of file vxge_reg.h.

#define VXGE_HW_GENSTATS_COUNT4_GET_GENSTATS_COUNT4

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 586 of file vxge_reg.h.

#define VXGE_HW_GENSTATS_COUNT5_GET_GENSTATS_COUNT5

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 588 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS0_GET_RSTDROP_MSG

(

bits

)

vxge_bVALn(bits, 0, 32)

Definition at line 591 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS0_GET_RSTDROP_CPL

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 592 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS1_GET_RSTDROP_CLIENT0

(

bits

)

vxge_bVALn(bits, 0, 32)

Definition at line 593 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS1_GET_RSTDROP_CLIENT1

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 594 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS2_GET_RSTDROP_CLIENT2

(

bits

)

vxge_bVALn(bits, 0, 32)

Definition at line 595 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS3_GET_VPLANE_DEPL_PH

(

bits

)

vxge_bVALn(bits, 0, 16)

Definition at line 596 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS3_GET_VPLANE_DEPL_NPH

(

bits

)

vxge_bVALn(bits, 16, 16)

Definition at line 597 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS3_GET_VPLANE_DEPL_CPLH

(

bits

)

vxge_bVALn(bits, 32, 16)

Definition at line 598 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS4_GET_VPLANE_DEPL_PD

(

bits

)

vxge_bVALn(bits, 0, 16)

Definition at line 599 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS4_GET_VPLANE_DEPL_NPD

(

bits

)

vxge_bVALn(bits, 16, 16)

Definition at line 600 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS4_GET_VPLANE_DEPL_CPLD

(

bits

)

vxge_bVALn(bits, 32, 16)

Definition at line 601 of file vxge_reg.h.

#define VXGE_HW_DBG_STATS_TPA_TX_PATH_GET_TX_PERMITTED_FRMS

(

bits

)

vxge_bVALn(bits, 32, 32)

Definition at line 603 of file vxge_reg.h.

#define VXGE_HW_DBG_STAT_TX_ANY_FRMS_GET_PORT0_TX_ANY_FRMS

(

bits

)

vxge_bVALn(bits, 0, 8)

Definition at line 606 of file vxge_reg.h.

#define VXGE_HW_DBG_STAT_TX_ANY_FRMS_GET_PORT1_TX_ANY_FRMS

(

bits

)

vxge_bVALn(bits, 8, 8)

Definition at line 608 of file vxge_reg.h.

#define VXGE_HW_DBG_STAT_TX_ANY_FRMS_GET_PORT2_TX_ANY_FRMS

(

bits

)

vxge_bVALn(bits, 16, 8)

Definition at line 610 of file vxge_reg.h.

#define VXGE_HW_DBG_STAT_RX_ANY_FRMS_GET_PORT0_RX_ANY_FRMS

(

bits

)

vxge_bVALn(bits, 0, 8)

Definition at line 613 of file vxge_reg.h.

#define VXGE_HW_DBG_STAT_RX_ANY_FRMS_GET_PORT1_RX_ANY_FRMS

(

bits

)

vxge_bVALn(bits, 8, 8)

Definition at line 615 of file vxge_reg.h.

#define VXGE_HW_DBG_STAT_RX_ANY_FRMS_GET_PORT2_RX_ANY_FRMS

(

bits

)

vxge_bVALn(bits, 16, 8)

Definition at line 617 of file vxge_reg.h.

#define VXGE_HW_CONFIG_PRIV_H

Definition at line 620 of file vxge_reg.h.

#define VXGE_HW_SWAPPER_INITIAL_VALUE   0x0123456789abcdefULL

Definition at line 622 of file vxge_reg.h.

Referenced by __vxge_hw_legacy_swapper_set().

#define VXGE_HW_SWAPPER_BYTE_SWAPPED   0xefcdab8967452301ULL

Definition at line 623 of file vxge_reg.h.

Referenced by __vxge_hw_legacy_swapper_set().

#define VXGE_HW_SWAPPER_BIT_FLIPPED   0x80c4a2e691d5b3f7ULL

Definition at line 624 of file vxge_reg.h.

Referenced by __vxge_hw_legacy_swapper_set().

#define VXGE_HW_SWAPPER_BYTE_SWAPPED_BIT_FLIPPED   0xf7b3d591e6a2c480ULL

Definition at line 625 of file vxge_reg.h.

Referenced by __vxge_hw_legacy_swapper_set().

#define VXGE_HW_SWAPPER_READ_BYTE_SWAP_ENABLE   0xFFFFFFFFFFFFFFFFULL

Definition at line 627 of file vxge_reg.h.

Referenced by __vxge_hw_legacy_swapper_set().

#define VXGE_HW_SWAPPER_READ_BYTE_SWAP_DISABLE   0x0000000000000000ULL

Definition at line 628 of file vxge_reg.h.

#define VXGE_HW_SWAPPER_READ_BIT_FLAP_ENABLE   0xFFFFFFFFFFFFFFFFULL

Definition at line 630 of file vxge_reg.h.

Referenced by __vxge_hw_legacy_swapper_set().

#define VXGE_HW_SWAPPER_READ_BIT_FLAP_DISABLE   0x0000000000000000ULL

Definition at line 631 of file vxge_reg.h.

#define VXGE_HW_SWAPPER_WRITE_BYTE_SWAP_ENABLE   0xFFFFFFFFFFFFFFFFULL

Definition at line 633 of file vxge_reg.h.

Referenced by __vxge_hw_kdfc_swapper_set(), and __vxge_hw_legacy_swapper_set().

#define VXGE_HW_SWAPPER_WRITE_BYTE_SWAP_DISABLE   0x0000000000000000ULL

Definition at line 634 of file vxge_reg.h.

#define VXGE_HW_SWAPPER_WRITE_BIT_FLAP_ENABLE   0xFFFFFFFFFFFFFFFFULL

Definition at line 636 of file vxge_reg.h.

Referenced by __vxge_hw_legacy_swapper_set().

#define VXGE_HW_SWAPPER_WRITE_BIT_FLAP_DISABLE   0x0000000000000000ULL

Definition at line 637 of file vxge_reg.h.

#define VXGE_HW_TOC_SWAPPER_FB_INITIAL_VAL

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 649 of file vxge_reg.h.

#define VXGE_HW_PIFM_RD_SWAP_EN_PIFM_RD_SWAP_EN

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 651 of file vxge_reg.h.

#define VXGE_HW_PIFM_RD_FLIP_EN_PIFM_RD_FLIP_EN

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 653 of file vxge_reg.h.

#define VXGE_HW_PIFM_WR_SWAP_EN_PIFM_WR_SWAP_EN

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 655 of file vxge_reg.h.

#define VXGE_HW_PIFM_WR_FLIP_EN_PIFM_WR_FLIP_EN

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 657 of file vxge_reg.h.

#define VXGE_HW_TOC_FIRST_POINTER_INITIAL_VAL

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 659 of file vxge_reg.h.

#define VXGE_HW_HOST_ACCESS_EN_HOST_ACCESS_EN

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 661 of file vxge_reg.h.

#define VXGE_HW_TOC_COMMON_POINTER_INITIAL_VAL

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 670 of file vxge_reg.h.

#define VXGE_HW_TOC_MEMREPAIR_POINTER_INITIAL_VAL

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 672 of file vxge_reg.h.

#define VXGE_HW_TOC_PCICFGMGMT_POINTER_INITIAL_VAL

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 674 of file vxge_reg.h.

#define VXGE_HW_TOC_MRPCIM_POINTER_INITIAL_VAL

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 678 of file vxge_reg.h.

#define VXGE_HW_TOC_SRPCIM_POINTER_INITIAL_VAL

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 680 of file vxge_reg.h.

#define VXGE_HW_TOC_VPMGMT_POINTER_INITIAL_VAL

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 684 of file vxge_reg.h.

#define VXGE_HW_TOC_VPATH_POINTER_INITIAL_VAL

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 688 of file vxge_reg.h.

#define VXGE_HW_TOC_KDFC_INITIAL_OFFSET

(

val

)

vxge_vBIT(val, 0, 61)

Definition at line 692 of file vxge_reg.h.

#define VXGE_HW_TOC_KDFC_INITIAL_BIR

(

val

)

vxge_vBIT(val, 61, 3)

Definition at line 693 of file vxge_reg.h.

#define VXGE_HW_TOC_USDC_INITIAL_OFFSET

(

val

)

vxge_vBIT(val, 0, 61)

Definition at line 695 of file vxge_reg.h.

#define VXGE_HW_TOC_USDC_INITIAL_BIR

(

val

)

vxge_vBIT(val, 61, 3)

Definition at line 696 of file vxge_reg.h.

#define VXGE_HW_TOC_KDFC_VPATH_STRIDE_INITIAL_TOC_KDFC_VPATH_STRIDE

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 698 of file vxge_reg.h.

#define VXGE_HW_TOC_KDFC_FIFO_STRIDE_INITIAL_TOC_KDFC_FIFO_STRIDE

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 701 of file vxge_reg.h.

#define VXGE_HW_PRC_STATUS1_PRC_VP_QUIESCENT

(

n

)

vxge_mBIT(n)

Definition at line 711 of file vxge_reg.h.

#define VXGE_HW_RXDCM_RESET_IN_PROGRESS_PRC_VP

(

n

)

vxge_mBIT(n)

Definition at line 713 of file vxge_reg.h.

#define VXGE_HW_REPLICQ_FLUSH_IN_PROGRESS_NOA_VP

(

n

)

vxge_mBIT(n)

Definition at line 715 of file vxge_reg.h.

#define VXGE_HW_RXPE_CMDS_RESET_IN_PROGRESS_NOA_VP

(

n

)

vxge_mBIT(n)

Definition at line 717 of file vxge_reg.h.

#define VXGE_HW_MXP_CMDS_RESET_IN_PROGRESS_NOA_VP

(

n

)

vxge_mBIT(n)

Definition at line 719 of file vxge_reg.h.

#define VXGE_HW_NOFFLOAD_RESET_IN_PROGRESS_PRC_VP

(

n

)

vxge_mBIT(n)

Definition at line 721 of file vxge_reg.h.

#define VXGE_HW_RD_REQ_IN_PROGRESS_VP

(

n

)

vxge_mBIT(n)

Definition at line 723 of file vxge_reg.h.

#define VXGE_HW_RD_REQ_OUTSTANDING_VP

(

n

)

vxge_mBIT(n)

Definition at line 725 of file vxge_reg.h.

#define VXGE_HW_KDFC_RESET_IN_PROGRESS_NOA_VP

(

n

)

vxge_mBIT(n)

Definition at line 727 of file vxge_reg.h.

#define VXGE_HW_ONE_CFG_VP_RDY

(

n

)

vxge_mBIT(n)

Definition at line 731 of file vxge_reg.h.

#define VXGE_HW_ONE_COMMON_PET_VPATH_RESET_IN_PROGRESS

(

n

)

vxge_mBIT(n)

Definition at line 733 of file vxge_reg.h.

#define VXGE_HW_TIM_INT_EN_TIM_VP

(

n

)

vxge_mBIT(n)

Definition at line 737 of file vxge_reg.h.

#define VXGE_HW_TIM_SET_INT_EN_VP

(

n

)

vxge_mBIT(n)

Definition at line 739 of file vxge_reg.h.

#define VXGE_HW_TIM_CLR_INT_EN_VP

(

n

)

vxge_mBIT(n)

Definition at line 741 of file vxge_reg.h.

Referenced by vxge_hw_vpath_intr_disable().

#define VXGE_HW_TIM_MASK_INT_DURING_RESET_VPATH

(

n

)

vxge_mBIT(n)

Definition at line 743 of file vxge_reg.h.

#define VXGE_HW_TIM_RESET_IN_PROGRESS_TIM_VPATH

(

n

)

vxge_mBIT(n)

Definition at line 745 of file vxge_reg.h.

#define VXGE_HW_TIM_OUTSTANDING_BMAP_TIM_VPATH

(

n

)

vxge_mBIT(n)

Definition at line 747 of file vxge_reg.h.

#define VXGE_HW_MSG_RESET_IN_PROGRESS_MSG_COMPOSITE

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 751 of file vxge_reg.h.

#define VXGE_HW_MSG_MXP_MR_READY_MP_BOOTED

(

n

)

vxge_mBIT(n)

Definition at line 753 of file vxge_reg.h.

#define VXGE_HW_MSG_UXP_MR_READY_UP_BOOTED

(

n

)

vxge_mBIT(n)

Definition at line 755 of file vxge_reg.h.

#define VXGE_HW_MSG_DMQ_NONI_RTL_PREFETCH_BYPASS_ENABLE

(

n

)

vxge_mBIT(n)

Definition at line 757 of file vxge_reg.h.

#define VXGE_HW_MSG_UMQ_RTL_BWR_PREFETCH_DISABLE

(

n

)

vxge_mBIT(n)

Definition at line 759 of file vxge_reg.h.

#define VXGE_HW_CMN_RSTHDLR_CFG0_SW_RESET_VPATH

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 763 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_reset().

#define VXGE_HW_CMN_RSTHDLR_CFG1_CLR_VPATH_RESET

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 765 of file vxge_reg.h.

Referenced by vxge_hw_vpath_enable().

#define VXGE_HW_CMN_RSTHDLR_CFG2_SW_RESET_FIFO0

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 767 of file vxge_reg.h.

#define VXGE_HW_CMN_RSTHDLR_CFG3_SW_RESET_FIFO1

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 769 of file vxge_reg.h.

#define VXGE_HW_CMN_RSTHDLR_CFG4_SW_RESET_FIFO2

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 771 of file vxge_reg.h.

#define VXGE_HW_CMN_RSTHDLR_CFG8_INCR_VPATH_INST_NUM

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 775 of file vxge_reg.h.

#define VXGE_HW_STATS_CFG0_STATS_ENABLE

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 777 of file vxge_reg.h.

#define VXGE_HW_CLEAR_MSIX_MASK_VECT_CLEAR_MSIX_MASK_VECT

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 781 of file vxge_reg.h.

#define VXGE_HW_SET_MSIX_MASK_VECT_SET_MSIX_MASK_VECT

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 784 of file vxge_reg.h.

#define VXGE_HW_CLEAR_MSIX_MASK_ALL_VECT_CLEAR_MSIX_MASK_ALL_VECT

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 786 of file vxge_reg.h.

#define VXGE_HW_SET_MSIX_MASK_ALL_VECT_SET_MSIX_MASK_ALL_VECT

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 789 of file vxge_reg.h.

#define VXGE_HW_MASK_VECTOR_MASK_VECTOR

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 792 of file vxge_reg.h.

#define VXGE_HW_MSIX_PENDING_VECTOR_MSIX_PENDING_VECTOR

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 794 of file vxge_reg.h.

#define VXGE_HW_CLR_MSIX_ONE_SHOT_VEC_CLR_MSIX_ONE_SHOT_VEC

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 797 of file vxge_reg.h.

#define VXGE_HW_TITAN_ASIC_ID_INITIAL_DEVICE_ID

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 800 of file vxge_reg.h.

#define VXGE_HW_TITAN_ASIC_ID_INITIAL_MAJOR_REVISION

(

val

)

vxge_vBIT(val, 48, 8)

Definition at line 801 of file vxge_reg.h.

#define VXGE_HW_TITAN_ASIC_ID_INITIAL_MINOR_REVISION

(

val

)

vxge_vBIT(val, 56, 8)

Definition at line 802 of file vxge_reg.h.

#define VXGE_HW_TITAN_GENERAL_INT_STATUS_MRPCIM_ALARM_INT   vxge_mBIT(0)

Definition at line 804 of file vxge_reg.h.

#define VXGE_HW_TITAN_GENERAL_INT_STATUS_SRPCIM_ALARM_INT   vxge_mBIT(1)

Definition at line 805 of file vxge_reg.h.

#define VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_ALARM_INT   vxge_mBIT(2)

Definition at line 806 of file vxge_reg.h.

Referenced by vxge_hw_device_begin_irq().

#define VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT

(

val

)

vxge_vBIT(val, 3, 17)

Definition at line 807 of file vxge_reg.h.

Referenced by vxge_hw_device_begin_irq().

#define VXGE_HW_TITAN_MASK_ALL_INT_ALARM   vxge_mBIT(7)

Definition at line 812 of file vxge_reg.h.

Referenced by vxge_hw_device_mask_all().

#define VXGE_HW_TITAN_MASK_ALL_INT_TRAFFIC   vxge_mBIT(15)

Definition at line 813 of file vxge_reg.h.

Referenced by vxge_hw_device_mask_all(), and vxge_hw_device_unmask_all().

#define VXGE_HW_TIM_INT_STATUS0_TIM_INT_STATUS0

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 817 of file vxge_reg.h.

#define VXGE_HW_TIM_INT_MASK0_TIM_INT_MASK0

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 819 of file vxge_reg.h.

#define VXGE_HW_TIM_INT_STATUS1_TIM_INT_STATUS1

(

val

)

vxge_vBIT(val, 0, 4)

Definition at line 821 of file vxge_reg.h.

#define VXGE_HW_TIM_INT_MASK1_TIM_INT_MASK1

(

val

)

vxge_vBIT(val, 0, 4)

Definition at line 823 of file vxge_reg.h.

#define VXGE_HW_RTI_INT_STATUS_RTI_INT_STATUS

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 825 of file vxge_reg.h.

#define VXGE_HW_RTI_INT_MASK_RTI_INT_MASK

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 827 of file vxge_reg.h.

#define VXGE_HW_ADAPTER_STATUS_RTDMA_RTDMA_READY   vxge_mBIT(0)

Definition at line 829 of file vxge_reg.h.

#define VXGE_HW_ADAPTER_STATUS_WRDMA_WRDMA_READY   vxge_mBIT(1)

Definition at line 830 of file vxge_reg.h.

#define VXGE_HW_ADAPTER_STATUS_KDFC_KDFC_READY   vxge_mBIT(2)

Definition at line 831 of file vxge_reg.h.

#define VXGE_HW_ADAPTER_STATUS_TPA_TMAC_BUF_EMPTY   vxge_mBIT(3)

Definition at line 832 of file vxge_reg.h.

#define VXGE_HW_ADAPTER_STATUS_RDCTL_PIC_QUIESCENT   vxge_mBIT(4)

Definition at line 833 of file vxge_reg.h.

#define VXGE_HW_ADAPTER_STATUS_XGMAC_NETWORK_FAULT   vxge_mBIT(5)

Definition at line 834 of file vxge_reg.h.

#define VXGE_HW_ADAPTER_STATUS_ROCRC_OFFLOAD_QUIESCENT   vxge_mBIT(6)

Definition at line 835 of file vxge_reg.h.

#define VXGE_HW_ADAPTER_STATUS_G3IF_FB_G3IF_FB_GDDR3_READY   vxge_mBIT(7)

Definition at line 836 of file vxge_reg.h.

#define VXGE_HW_ADAPTER_STATUS_G3IF_CM_G3IF_CM_GDDR3_READY   vxge_mBIT(8)

Definition at line 837 of file vxge_reg.h.

#define VXGE_HW_ADAPTER_STATUS_RIC_RIC_RUNNING   vxge_mBIT(9)

Definition at line 838 of file vxge_reg.h.

#define VXGE_HW_ADAPTER_STATUS_CMG_C_PLL_IN_LOCK   vxge_mBIT(10)

Definition at line 839 of file vxge_reg.h.

#define VXGE_HW_ADAPTER_STATUS_XGMAC_X_PLL_IN_LOCK   vxge_mBIT(11)

Definition at line 840 of file vxge_reg.h.

#define VXGE_HW_ADAPTER_STATUS_FBIF_M_PLL_IN_LOCK   vxge_mBIT(12)

Definition at line 841 of file vxge_reg.h.

#define VXGE_HW_ADAPTER_STATUS_PCC_PCC_IDLE

(

val

)

vxge_vBIT(val, 24, 8)

Definition at line 842 of file vxge_reg.h.

#define VXGE_HW_ADAPTER_STATUS_ROCRC_RC_PRC_QUIESCENT

(

val

)

vxge_vBIT(val, 44, 8)

Definition at line 843 of file vxge_reg.h.

#define VXGE_HW_GEN_CTRL_SPI_MRPCIM_WR_DIS   vxge_mBIT(0)

Definition at line 845 of file vxge_reg.h.

#define VXGE_HW_GEN_CTRL_SPI_MRPCIM_RD_DIS   vxge_mBIT(1)

Definition at line 846 of file vxge_reg.h.

#define VXGE_HW_GEN_CTRL_SPI_SRPCIM_WR_DIS   vxge_mBIT(2)

Definition at line 847 of file vxge_reg.h.

#define VXGE_HW_GEN_CTRL_SPI_SRPCIM_RD_DIS   vxge_mBIT(3)

Definition at line 848 of file vxge_reg.h.

#define VXGE_HW_GEN_CTRL_SPI_DEBUG_DIS   vxge_mBIT(4)

Definition at line 849 of file vxge_reg.h.

#define VXGE_HW_GEN_CTRL_SPI_APP_LTSSM_TIMER_DIS   vxge_mBIT(5)

Definition at line 850 of file vxge_reg.h.

#define VXGE_HW_GEN_CTRL_SPI_NOT_USED

(

val

)

vxge_vBIT(val, 6, 4)

Definition at line 851 of file vxge_reg.h.

#define VXGE_HW_ADAPTER_READY_ADAPTER_READY   vxge_mBIT(63)

Definition at line 855 of file vxge_reg.h.

#define VXGE_HW_OUTSTANDING_READ_OUTSTANDING_READ

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 857 of file vxge_reg.h.

#define VXGE_HW_VPATH_RST_IN_PROG_VPATH_RST_IN_PROG

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 859 of file vxge_reg.h.

Referenced by __vxge_hw_device_vpath_reset_in_prog_check(), and __vxge_hw_vpath_reset_check().

#define VXGE_HW_VPATH_REG_MODIFIED_VPATH_REG_MODIFIED

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 861 of file vxge_reg.h.

#define VXGE_HW_CP_RESET_IN_PROGRESS_CP_VPATH

(

n

)

vxge_mBIT(n)

Definition at line 865 of file vxge_reg.h.

#define VXGE_HW_XGMAC_READY_XMACJ_READY

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 869 of file vxge_reg.h.

#define VXGE_HW_FBIF_READY_FAU_READY

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 873 of file vxge_reg.h.

#define VXGE_HW_VPLANE_ASSIGNMENTS_VPLANE_ASSIGNMENTS

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 877 of file vxge_reg.h.

#define VXGE_HW_VPATH_ASSIGNMENTS_VPATH_ASSIGNMENTS

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 879 of file vxge_reg.h.

#define VXGE_HW_RESOURCE_ASSIGNMENTS_RESOURCE_ASSIGNMENTS

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 881 of file vxge_reg.h.

#define VXGE_HW_HOST_TYPE_ASSIGNMENTS_HOST_TYPE_ASSIGNMENTS

(

val

)

vxge_vBIT(val, 5, 3)

Definition at line 884 of file vxge_reg.h.

#define VXGE_HW_MAX_RESOURCE_ASSIGNMENTS_PCI_MAX_VPLANE

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 889 of file vxge_reg.h.

#define VXGE_HW_MAX_RESOURCE_ASSIGNMENTS_PCI_MAX_VPATHS

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 891 of file vxge_reg.h.

#define VXGE_HW_PF_VPATH_ASSIGNMENTS_PF_VPATH_ASSIGNMENTS

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 894 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_ICMP_EN

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 899 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_TCPSYN_EN

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 901 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_ZL4PYLD_EN

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 903 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_L4PRTCL_TCP_EN

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 905 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_L4PRTCL_UDP_EN

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 907 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_L4PRTCL_FLEX_EN

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 909 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_IPFRAG_EN

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 911 of file vxge_reg.h.

#define VXGE_HW_RESOURCE_NO_PFN_OR_VF   BIT(3)

Definition at line 923 of file vxge_reg.h.

#define VXGE_HW_BARGRP_PF_OR_VF_BAR0_MASK_BARGRP_PF_OR_VF_BAR0_MASK

(

val

)

vxge_vBIT(val, 2, 6)

Definition at line 925 of file vxge_reg.h.

#define VXGE_HW_BARGRP_PF_OR_VF_BAR1_MASK_BARGRP_PF_OR_VF_BAR1_MASK

(

val

)

vxge_vBIT(val, 2, 6)

Definition at line 928 of file vxge_reg.h.

#define VXGE_HW_BARGRP_PF_OR_VF_BAR2_MASK_BARGRP_PF_OR_VF_BAR2_MASK

(

val

)

vxge_vBIT(val, 2, 6)

Definition at line 931 of file vxge_reg.h.

#define VXGE_HW_MSIXGRP_NO_TABLE_SIZE

(

val

)

vxge_vBIT(val, 5, 11)

Definition at line 934 of file vxge_reg.h.

#define VXGE_HW_G3FBCT_INT_STATUS_ERR_G3IF_INT   vxge_mBIT(0)

Definition at line 940 of file vxge_reg.h.

#define VXGE_HW_G3FBCT_ERR_REG_G3IF_SM_ERR   vxge_mBIT(4)

Definition at line 943 of file vxge_reg.h.

#define VXGE_HW_G3FBCT_ERR_REG_G3IF_GDDR3_DECC   vxge_mBIT(5)

Definition at line 944 of file vxge_reg.h.

#define VXGE_HW_G3FBCT_ERR_REG_G3IF_GDDR3_U_DECC   vxge_mBIT(6)

Definition at line 945 of file vxge_reg.h.

#define VXGE_HW_G3FBCT_ERR_REG_G3IF_CTRL_FIFO_DECC   vxge_mBIT(7)

Definition at line 946 of file vxge_reg.h.

#define VXGE_HW_G3FBCT_ERR_REG_G3IF_GDDR3_SECC   vxge_mBIT(29)

Definition at line 947 of file vxge_reg.h.

#define VXGE_HW_G3FBCT_ERR_REG_G3IF_GDDR3_U_SECC   vxge_mBIT(30)

Definition at line 948 of file vxge_reg.h.

#define VXGE_HW_G3FBCT_ERR_REG_G3IF_CTRL_FIFO_SECC   vxge_mBIT(31)

Definition at line 949 of file vxge_reg.h.

#define VXGE_HW_WRDMA_INT_STATUS_RC_ALARM_RC_INT   vxge_mBIT(0)

Definition at line 956 of file vxge_reg.h.

#define VXGE_HW_WRDMA_INT_STATUS_RXDRM_SM_ERR_RXDRM_INT   vxge_mBIT(1)

Definition at line 957 of file vxge_reg.h.

#define VXGE_HW_WRDMA_INT_STATUS_RXDCM_SM_ERR_RXDCM_SM_INT   vxge_mBIT(2)

Definition at line 958 of file vxge_reg.h.

#define VXGE_HW_WRDMA_INT_STATUS_RXDWM_SM_ERR_RXDWM_INT   vxge_mBIT(3)

Definition at line 959 of file vxge_reg.h.

#define VXGE_HW_WRDMA_INT_STATUS_RDA_ERR_RDA_INT   vxge_mBIT(6)

Definition at line 960 of file vxge_reg.h.

#define VXGE_HW_WRDMA_INT_STATUS_RDA_ECC_DB_RDA_ECC_DB_INT   vxge_mBIT(8)

Definition at line 961 of file vxge_reg.h.

#define VXGE_HW_WRDMA_INT_STATUS_RDA_ECC_SG_RDA_ECC_SG_INT   vxge_mBIT(9)

Definition at line 962 of file vxge_reg.h.

#define VXGE_HW_WRDMA_INT_STATUS_FRF_ALARM_FRF_INT   vxge_mBIT(12)

Definition at line 963 of file vxge_reg.h.

#define VXGE_HW_WRDMA_INT_STATUS_ROCRC_ALARM_ROCRC_INT   vxge_mBIT(13)

Definition at line 964 of file vxge_reg.h.

#define VXGE_HW_WRDMA_INT_STATUS_WDE0_ALARM_WDE0_INT   vxge_mBIT(14)

Definition at line 965 of file vxge_reg.h.

#define VXGE_HW_WRDMA_INT_STATUS_WDE1_ALARM_WDE1_INT   vxge_mBIT(15)

Definition at line 966 of file vxge_reg.h.

#define VXGE_HW_WRDMA_INT_STATUS_WDE2_ALARM_WDE2_INT   vxge_mBIT(16)

Definition at line 967 of file vxge_reg.h.

#define VXGE_HW_WRDMA_INT_STATUS_WDE3_ALARM_WDE3_INT   vxge_mBIT(17)

Definition at line 968 of file vxge_reg.h.

#define VXGE_HW_RC_ALARM_REG_FTC_SM_ERR   vxge_mBIT(0)

Definition at line 971 of file vxge_reg.h.

#define VXGE_HW_RC_ALARM_REG_FTC_SM_PHASE_ERR   vxge_mBIT(1)

Definition at line 972 of file vxge_reg.h.

#define VXGE_HW_RC_ALARM_REG_BTDWM_SM_ERR   vxge_mBIT(2)

Definition at line 973 of file vxge_reg.h.

#define VXGE_HW_RC_ALARM_REG_BTC_SM_ERR   vxge_mBIT(3)

Definition at line 974 of file vxge_reg.h.

#define VXGE_HW_RC_ALARM_REG_BTDCM_SM_ERR   vxge_mBIT(4)

Definition at line 975 of file vxge_reg.h.

#define VXGE_HW_RC_ALARM_REG_BTDRM_SM_ERR   vxge_mBIT(5)

Definition at line 976 of file vxge_reg.h.

#define VXGE_HW_RC_ALARM_REG_RMM_RXD_RC_ECC_DB_ERR   vxge_mBIT(6)

Definition at line 977 of file vxge_reg.h.

#define VXGE_HW_RC_ALARM_REG_RMM_RXD_RC_ECC_SG_ERR   vxge_mBIT(7)

Definition at line 978 of file vxge_reg.h.

#define VXGE_HW_RC_ALARM_REG_RHS_RXD_RHS_ECC_DB_ERR   vxge_mBIT(8)

Definition at line 979 of file vxge_reg.h.

#define VXGE_HW_RC_ALARM_REG_RHS_RXD_RHS_ECC_SG_ERR   vxge_mBIT(9)

Definition at line 980 of file vxge_reg.h.

#define VXGE_HW_RC_ALARM_REG_RMM_SM_ERR   vxge_mBIT(10)

Definition at line 981 of file vxge_reg.h.

#define VXGE_HW_RC_ALARM_REG_BTC_VPATH_MISMATCH_ERR   vxge_mBIT(12)

Definition at line 982 of file vxge_reg.h.

#define VXGE_HW_RXDRM_SM_ERR_REG_PRC_VP

(

n

)

vxge_mBIT(n)

Definition at line 986 of file vxge_reg.h.

#define VXGE_HW_RXDCM_SM_ERR_REG_PRC_VP

(

n

)

vxge_mBIT(n)

Definition at line 990 of file vxge_reg.h.

#define VXGE_HW_RXDWM_SM_ERR_REG_PRC_VP

(

n

)

vxge_mBIT(n)

Definition at line 994 of file vxge_reg.h.

#define VXGE_HW_RDA_ERR_REG_RDA_SM0_ERR_ALARM   vxge_mBIT(0)

Definition at line 998 of file vxge_reg.h.

#define VXGE_HW_RDA_ERR_REG_RDA_MISC_ERR   vxge_mBIT(1)

Definition at line 999 of file vxge_reg.h.

#define VXGE_HW_RDA_ERR_REG_RDA_PCIX_ERR   vxge_mBIT(2)

Definition at line 1000 of file vxge_reg.h.

#define VXGE_HW_RDA_ERR_REG_RDA_RXD_ECC_DB_ERR   vxge_mBIT(3)

Definition at line 1001 of file vxge_reg.h.

#define VXGE_HW_RDA_ERR_REG_RDA_FRM_ECC_DB_ERR   vxge_mBIT(4)

Definition at line 1002 of file vxge_reg.h.

#define VXGE_HW_RDA_ERR_REG_RDA_UQM_ECC_DB_ERR   vxge_mBIT(5)

Definition at line 1003 of file vxge_reg.h.

#define VXGE_HW_RDA_ERR_REG_RDA_IMM_ECC_DB_ERR   vxge_mBIT(6)

Definition at line 1004 of file vxge_reg.h.

#define VXGE_HW_RDA_ERR_REG_RDA_TIM_ECC_DB_ERR   vxge_mBIT(7)

Definition at line 1005 of file vxge_reg.h.

#define VXGE_HW_RDA_ECC_DB_REG_RDA_RXD_ERR

(

n

)

vxge_mBIT(n)

Definition at line 1009 of file vxge_reg.h.

#define VXGE_HW_RDA_ECC_SG_REG_RDA_RXD_ERR

(

n

)

vxge_mBIT(n)

Definition at line 1013 of file vxge_reg.h.

#define VXGE_HW_RQA_ERR_REG_RQA_SM_ERR_ALARM   vxge_mBIT(0)

Definition at line 1017 of file vxge_reg.h.

#define VXGE_HW_FRF_ALARM_REG_PRC_VP_FRF_SM_ERR

(

n

)

vxge_mBIT(n)

Definition at line 1021 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_QCQ_QCC_BYP_ECC_DB   vxge_mBIT(0)

Definition at line 1025 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_QCQ_QCC_BYP_ECC_SG   vxge_mBIT(1)

Definition at line 1026 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_NOA_NMA_SM_ERR   vxge_mBIT(2)

Definition at line 1027 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_NOA_IMMM_ECC_DB   vxge_mBIT(3)

Definition at line 1028 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_NOA_IMMM_ECC_SG   vxge_mBIT(4)

Definition at line 1029 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_UDQ_UMQM_ECC_DB   vxge_mBIT(5)

Definition at line 1030 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_UDQ_UMQM_ECC_SG   vxge_mBIT(6)

Definition at line 1031 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_NOA_RCBM_ECC_DB   vxge_mBIT(11)

Definition at line 1032 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_NOA_RCBM_ECC_SG   vxge_mBIT(12)

Definition at line 1033 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_QCQ_MULTI_EGB_RSVD_ERR   vxge_mBIT(13)

Definition at line 1034 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_QCQ_MULTI_EGB_OWN_ERR   vxge_mBIT(14)

Definition at line 1035 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_QCQ_MULTI_BYP_OWN_ERR   vxge_mBIT(15)

Definition at line 1036 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_QCQ_OWN_NOT_ASSIGNED_ERR   vxge_mBIT(16)

Definition at line 1037 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_QCQ_OWN_RSVD_SYNC_ERR   vxge_mBIT(17)

Definition at line 1038 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_QCQ_LOST_EGB_ERR   vxge_mBIT(18)

Definition at line 1039 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_RCQ_BYPQ0_OVERFLOW   vxge_mBIT(19)

Definition at line 1040 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_RCQ_BYPQ1_OVERFLOW   vxge_mBIT(20)

Definition at line 1041 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_RCQ_BYPQ2_OVERFLOW   vxge_mBIT(21)

Definition at line 1042 of file vxge_reg.h.

#define VXGE_HW_ROCRC_ALARM_REG_NOA_WCT_CMD_FIFO_ERR   vxge_mBIT(22)

Definition at line 1043 of file vxge_reg.h.

#define VXGE_HW_WDE0_ALARM_REG_WDE0_DCC_SM_ERR   vxge_mBIT(0)

Definition at line 1047 of file vxge_reg.h.

#define VXGE_HW_WDE0_ALARM_REG_WDE0_PRM_SM_ERR   vxge_mBIT(1)

Definition at line 1048 of file vxge_reg.h.

#define VXGE_HW_WDE0_ALARM_REG_WDE0_CP_SM_ERR   vxge_mBIT(2)

Definition at line 1049 of file vxge_reg.h.

#define VXGE_HW_WDE0_ALARM_REG_WDE0_CP_CMD_ERR   vxge_mBIT(3)

Definition at line 1050 of file vxge_reg.h.

#define VXGE_HW_WDE0_ALARM_REG_WDE0_PCR_SM_ERR   vxge_mBIT(4)

Definition at line 1051 of file vxge_reg.h.

#define VXGE_HW_WDE1_ALARM_REG_WDE1_DCC_SM_ERR   vxge_mBIT(0)

Definition at line 1055 of file vxge_reg.h.

#define VXGE_HW_WDE1_ALARM_REG_WDE1_PRM_SM_ERR   vxge_mBIT(1)

Definition at line 1056 of file vxge_reg.h.

#define VXGE_HW_WDE1_ALARM_REG_WDE1_CP_SM_ERR   vxge_mBIT(2)

Definition at line 1057 of file vxge_reg.h.

#define VXGE_HW_WDE1_ALARM_REG_WDE1_CP_CMD_ERR   vxge_mBIT(3)

Definition at line 1058 of file vxge_reg.h.

#define VXGE_HW_WDE1_ALARM_REG_WDE1_PCR_SM_ERR   vxge_mBIT(4)

Definition at line 1059 of file vxge_reg.h.

#define VXGE_HW_WDE2_ALARM_REG_WDE2_DCC_SM_ERR   vxge_mBIT(0)

Definition at line 1063 of file vxge_reg.h.

#define VXGE_HW_WDE2_ALARM_REG_WDE2_PRM_SM_ERR   vxge_mBIT(1)

Definition at line 1064 of file vxge_reg.h.

#define VXGE_HW_WDE2_ALARM_REG_WDE2_CP_SM_ERR   vxge_mBIT(2)

Definition at line 1065 of file vxge_reg.h.

#define VXGE_HW_WDE2_ALARM_REG_WDE2_CP_CMD_ERR   vxge_mBIT(3)

Definition at line 1066 of file vxge_reg.h.

#define VXGE_HW_WDE2_ALARM_REG_WDE2_PCR_SM_ERR   vxge_mBIT(4)

Definition at line 1067 of file vxge_reg.h.

#define VXGE_HW_WDE3_ALARM_REG_WDE3_DCC_SM_ERR   vxge_mBIT(0)

Definition at line 1071 of file vxge_reg.h.

#define VXGE_HW_WDE3_ALARM_REG_WDE3_PRM_SM_ERR   vxge_mBIT(1)

Definition at line 1072 of file vxge_reg.h.

#define VXGE_HW_WDE3_ALARM_REG_WDE3_CP_SM_ERR   vxge_mBIT(2)

Definition at line 1073 of file vxge_reg.h.

#define VXGE_HW_WDE3_ALARM_REG_WDE3_CP_CMD_ERR   vxge_mBIT(3)

Definition at line 1074 of file vxge_reg.h.

#define VXGE_HW_WDE3_ALARM_REG_WDE3_PCR_SM_ERR   vxge_mBIT(4)

Definition at line 1075 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_0

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1082 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_1

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1083 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_2

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1084 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_3

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1085 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_4

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1086 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_5

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1087 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_6

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1088 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_7

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1089 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_1_RX_W_PRIORITY_SS_8

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1091 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_1_RX_W_PRIORITY_SS_9

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1092 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_1_RX_W_PRIORITY_SS_10

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1093 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_1_RX_W_PRIORITY_SS_11

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1095 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_1_RX_W_PRIORITY_SS_12

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1097 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_1_RX_W_PRIORITY_SS_13

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1099 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_1_RX_W_PRIORITY_SS_14

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1101 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_1_RX_W_PRIORITY_SS_15

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1103 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_2_RX_W_PRIORITY_SS_16

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1106 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_2_RX_W_PRIORITY_SS_17

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1107 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_2_RX_W_PRIORITY_SS_18

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1109 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_2_RX_W_PRIORITY_SS_19

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1111 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_2_RX_W_PRIORITY_SS_20

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1113 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_2_RX_W_PRIORITY_SS_21

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1115 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_2_RX_W_PRIORITY_SS_22

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1117 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_2_RX_W_PRIORITY_SS_23

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1119 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_3_RX_W_PRIORITY_SS_24

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1122 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_3_RX_W_PRIORITY_SS_25

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1123 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_3_RX_W_PRIORITY_SS_26

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1125 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_3_RX_W_PRIORITY_SS_27

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1127 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_3_RX_W_PRIORITY_SS_28

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1129 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_3_RX_W_PRIORITY_SS_29

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1131 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_3_RX_W_PRIORITY_SS_30

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1133 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_3_RX_W_PRIORITY_SS_31

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1135 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_4_RX_W_PRIORITY_SS_32

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1138 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_4_RX_W_PRIORITY_SS_33

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1139 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_4_RX_W_PRIORITY_SS_34

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1141 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_4_RX_W_PRIORITY_SS_35

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1143 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_4_RX_W_PRIORITY_SS_36

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1145 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_4_RX_W_PRIORITY_SS_37

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1147 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_4_RX_W_PRIORITY_SS_38

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1149 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_4_RX_W_PRIORITY_SS_39

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1151 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_5_RX_W_PRIORITY_SS_40

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1154 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_5_RX_W_PRIORITY_SS_41

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1155 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_5_RX_W_PRIORITY_SS_42

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1157 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_5_RX_W_PRIORITY_SS_43

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1159 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_5_RX_W_PRIORITY_SS_44

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1161 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_5_RX_W_PRIORITY_SS_45

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1163 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_5_RX_W_PRIORITY_SS_46

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1165 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_5_RX_W_PRIORITY_SS_47

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1167 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_6_RX_W_PRIORITY_SS_48

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1170 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_6_RX_W_PRIORITY_SS_49

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1171 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_6_RX_W_PRIORITY_SS_50

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1173 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_6_RX_W_PRIORITY_SS_51

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1175 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_6_RX_W_PRIORITY_SS_52

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1177 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_6_RX_W_PRIORITY_SS_53

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1179 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_6_RX_W_PRIORITY_SS_54

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1181 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_6_RX_W_PRIORITY_SS_55

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1183 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_7_RX_W_PRIORITY_SS_56

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1186 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_7_RX_W_PRIORITY_SS_57

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1187 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_7_RX_W_PRIORITY_SS_58

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1189 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_7_RX_W_PRIORITY_SS_59

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1191 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_7_RX_W_PRIORITY_SS_60

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1193 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_7_RX_W_PRIORITY_SS_61

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1195 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_7_RX_W_PRIORITY_SS_62

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1197 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_7_RX_W_PRIORITY_SS_63

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1199 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_8_RX_W_PRIORITY_SS_64

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1202 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_8_RX_W_PRIORITY_SS_65

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1203 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_8_RX_W_PRIORITY_SS_66

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1205 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_8_RX_W_PRIORITY_SS_67

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1207 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_8_RX_W_PRIORITY_SS_68

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1209 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_8_RX_W_PRIORITY_SS_69

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1211 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_8_RX_W_PRIORITY_SS_70

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1213 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_8_RX_W_PRIORITY_SS_71

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1215 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_9_RX_W_PRIORITY_SS_72

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1218 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_9_RX_W_PRIORITY_SS_73

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1219 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_9_RX_W_PRIORITY_SS_74

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1221 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_9_RX_W_PRIORITY_SS_75

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1223 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_9_RX_W_PRIORITY_SS_76

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1225 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_9_RX_W_PRIORITY_SS_77

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1227 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_9_RX_W_PRIORITY_SS_78

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1229 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_9_RX_W_PRIORITY_SS_79

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1231 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_10_RX_W_PRIORITY_SS_80

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1234 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_10_RX_W_PRIORITY_SS_81

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1236 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_10_RX_W_PRIORITY_SS_82

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1238 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_10_RX_W_PRIORITY_SS_83

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1240 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_10_RX_W_PRIORITY_SS_84

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1242 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_10_RX_W_PRIORITY_SS_85

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1244 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_10_RX_W_PRIORITY_SS_86

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1246 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_10_RX_W_PRIORITY_SS_87

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1248 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_11_RX_W_PRIORITY_SS_88

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1251 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_11_RX_W_PRIORITY_SS_89

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1253 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_11_RX_W_PRIORITY_SS_90

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1255 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_11_RX_W_PRIORITY_SS_91

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1257 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_11_RX_W_PRIORITY_SS_92

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1259 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_11_RX_W_PRIORITY_SS_93

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1261 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_11_RX_W_PRIORITY_SS_94

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1263 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_11_RX_W_PRIORITY_SS_95

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1265 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_12_RX_W_PRIORITY_SS_96

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1268 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_12_RX_W_PRIORITY_SS_97

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1270 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_12_RX_W_PRIORITY_SS_98

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1272 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_12_RX_W_PRIORITY_SS_99

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1274 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_12_RX_W_PRIORITY_SS_100

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1276 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_12_RX_W_PRIORITY_SS_101

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1278 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_12_RX_W_PRIORITY_SS_102

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1280 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_12_RX_W_PRIORITY_SS_103

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1282 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_13_RX_W_PRIORITY_SS_104

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1285 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_13_RX_W_PRIORITY_SS_105

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1287 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_13_RX_W_PRIORITY_SS_106

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1289 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_13_RX_W_PRIORITY_SS_107

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1291 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_13_RX_W_PRIORITY_SS_108

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1293 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_13_RX_W_PRIORITY_SS_109

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1295 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_13_RX_W_PRIORITY_SS_110

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1297 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_13_RX_W_PRIORITY_SS_111

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1299 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_14_RX_W_PRIORITY_SS_112

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1302 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_14_RX_W_PRIORITY_SS_113

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1304 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_14_RX_W_PRIORITY_SS_114

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1306 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_14_RX_W_PRIORITY_SS_115

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1308 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_14_RX_W_PRIORITY_SS_116

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1310 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_14_RX_W_PRIORITY_SS_117

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1312 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_14_RX_W_PRIORITY_SS_118

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1314 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_14_RX_W_PRIORITY_SS_119

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1316 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_15_RX_W_PRIORITY_SS_120

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1319 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_15_RX_W_PRIORITY_SS_121

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1321 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_15_RX_W_PRIORITY_SS_122

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1323 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_15_RX_W_PRIORITY_SS_123

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1325 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_15_RX_W_PRIORITY_SS_124

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1327 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_15_RX_W_PRIORITY_SS_125

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1329 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_15_RX_W_PRIORITY_SS_126

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1331 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_15_RX_W_PRIORITY_SS_127

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1333 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_16_RX_W_PRIORITY_SS_128

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1336 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_16_RX_W_PRIORITY_SS_129

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1338 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_16_RX_W_PRIORITY_SS_130

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1340 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_16_RX_W_PRIORITY_SS_131

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1342 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_16_RX_W_PRIORITY_SS_132

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1344 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_16_RX_W_PRIORITY_SS_133

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1346 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_16_RX_W_PRIORITY_SS_134

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1348 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_16_RX_W_PRIORITY_SS_135

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1350 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_17_RX_W_PRIORITY_SS_136

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1353 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_17_RX_W_PRIORITY_SS_137

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1355 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_17_RX_W_PRIORITY_SS_138

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1357 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_17_RX_W_PRIORITY_SS_139

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1359 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_17_RX_W_PRIORITY_SS_140

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1361 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_17_RX_W_PRIORITY_SS_141

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1363 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_17_RX_W_PRIORITY_SS_142

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1365 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_17_RX_W_PRIORITY_SS_143

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1367 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_18_RX_W_PRIORITY_SS_144

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1370 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_18_RX_W_PRIORITY_SS_145

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1372 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_18_RX_W_PRIORITY_SS_146

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1374 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_18_RX_W_PRIORITY_SS_147

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1376 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_18_RX_W_PRIORITY_SS_148

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1378 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_18_RX_W_PRIORITY_SS_149

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1380 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_18_RX_W_PRIORITY_SS_150

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1382 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_18_RX_W_PRIORITY_SS_151

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1384 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_19_RX_W_PRIORITY_SS_152

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1387 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_19_RX_W_PRIORITY_SS_153

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1389 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_19_RX_W_PRIORITY_SS_154

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1391 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_19_RX_W_PRIORITY_SS_155

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1393 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_19_RX_W_PRIORITY_SS_156

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1395 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_19_RX_W_PRIORITY_SS_157

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1397 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_19_RX_W_PRIORITY_SS_158

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1399 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_19_RX_W_PRIORITY_SS_159

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1401 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_20_RX_W_PRIORITY_SS_160

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1404 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_20_RX_W_PRIORITY_SS_161

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1406 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_20_RX_W_PRIORITY_SS_162

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1408 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_20_RX_W_PRIORITY_SS_163

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1410 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_20_RX_W_PRIORITY_SS_164

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1412 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_20_RX_W_PRIORITY_SS_165

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1414 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_20_RX_W_PRIORITY_SS_166

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1416 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_20_RX_W_PRIORITY_SS_167

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1418 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_21_RX_W_PRIORITY_SS_168

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1421 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_21_RX_W_PRIORITY_SS_169

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1423 of file vxge_reg.h.

#define VXGE_HW_RX_W_ROUND_ROBIN_21_RX_W_PRIORITY_SS_170

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1425 of file vxge_reg.h.

#define VXGE_HW_WRR_RING_SERVICE_STATES   171

Definition at line 1428 of file vxge_reg.h.

#define VXGE_HW_WRR_RING_COUNT   22

Definition at line 1429 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_0

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1432 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_1

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1433 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_2

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1434 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_3

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1435 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_4

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1436 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_5

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1437 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_6

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1438 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_7

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1439 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_8

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1441 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_9

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1442 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_10

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1443 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_11

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1444 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_12

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1445 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_13

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1446 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_14

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1447 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_15

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1448 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_PRIORITY_2_RX_Q_NUMBER_16

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1450 of file vxge_reg.h.

#define VXGE_HW_REPLICATION_QUEUE_PRIORITY_REPLICATION_QUEUE_PRIORITY

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1454 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_SELECT_NUMBER

(

n

)

vxge_mBIT(n)

Definition at line 1457 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_SELECT_ENABLE_CODE   vxge_mBIT(15)

Definition at line 1458 of file vxge_reg.h.

#define VXGE_HW_RX_QUEUE_SELECT_ENABLE_HIERARCHICAL_PRTY   vxge_mBIT(23)

Definition at line 1459 of file vxge_reg.h.

#define VXGE_HW_RQA_VPBP_CTRL_WR_XON_DIS   vxge_mBIT(15)

Definition at line 1461 of file vxge_reg.h.

#define VXGE_HW_RQA_VPBP_CTRL_ROCRC_DIS   vxge_mBIT(23)

Definition at line 1462 of file vxge_reg.h.

#define VXGE_HW_RQA_VPBP_CTRL_TXPE_DIS   vxge_mBIT(31)

Definition at line 1463 of file vxge_reg.h.

#define VXGE_HW_RX_MULTI_CAST_CTRL_TIME_OUT_DIS   vxge_mBIT(0)

Definition at line 1465 of file vxge_reg.h.

#define VXGE_HW_RX_MULTI_CAST_CTRL_FRM_DROP_DIS   vxge_mBIT(1)

Definition at line 1466 of file vxge_reg.h.

#define VXGE_HW_RX_MULTI_CAST_CTRL_NO_RXD_TIME_OUT_CNT

(

val

)

vxge_vBIT(val, 2, 30)

Definition at line 1467 of file vxge_reg.h.

#define VXGE_HW_RX_MULTI_CAST_CTRL_TIME_OUT_CNT

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 1469 of file vxge_reg.h.

#define VXGE_HW_WDE_PRM_CTRL_SPAV_THRESHOLD

(

val

)

vxge_vBIT(val, 2, 10)

Definition at line 1471 of file vxge_reg.h.

#define VXGE_HW_WDE_PRM_CTRL_SPLIT_THRESHOLD

(

val

)

vxge_vBIT(val, 18, 14)

Definition at line 1472 of file vxge_reg.h.

#define VXGE_HW_WDE_PRM_CTRL_SPLIT_ON_1ST_ROW   vxge_mBIT(32)

Definition at line 1473 of file vxge_reg.h.

#define VXGE_HW_WDE_PRM_CTRL_SPLIT_ON_ROW_BNDRY   vxge_mBIT(33)

Definition at line 1474 of file vxge_reg.h.

#define VXGE_HW_WDE_PRM_CTRL_FB_ROW_SIZE

(

val

)

vxge_vBIT(val, 46, 2)

Definition at line 1475 of file vxge_reg.h.

#define VXGE_HW_NOA_CTRL_FRM_PRTY_QUOTA

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1477 of file vxge_reg.h.

#define VXGE_HW_NOA_CTRL_NON_FRM_PRTY_QUOTA

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1478 of file vxge_reg.h.

#define VXGE_HW_NOA_CTRL_IGNORE_KDFC_IF_STATUS   vxge_mBIT(16)

Definition at line 1479 of file vxge_reg.h.

#define VXGE_HW_NOA_CTRL_MAX_JOB_CNT_FOR_WDE0

(

val

)

vxge_vBIT(val, 37, 4)

Definition at line 1480 of file vxge_reg.h.

#define VXGE_HW_NOA_CTRL_MAX_JOB_CNT_FOR_WDE1

(

val

)

vxge_vBIT(val, 45, 4)

Definition at line 1481 of file vxge_reg.h.

#define VXGE_HW_NOA_CTRL_MAX_JOB_CNT_FOR_WDE2

(

val

)

vxge_vBIT(val, 53, 4)

Definition at line 1482 of file vxge_reg.h.

#define VXGE_HW_NOA_CTRL_MAX_JOB_CNT_FOR_WDE3

(

val

)

vxge_vBIT(val, 60, 4)

Definition at line 1483 of file vxge_reg.h.

#define VXGE_HW_PHASE_CFG_QCC_WR_PHASE_EN   vxge_mBIT(0)

Definition at line 1485 of file vxge_reg.h.

#define VXGE_HW_PHASE_CFG_QCC_RD_PHASE_EN   vxge_mBIT(3)

Definition at line 1486 of file vxge_reg.h.

#define VXGE_HW_PHASE_CFG_IMMM_WR_PHASE_EN   vxge_mBIT(7)

Definition at line 1487 of file vxge_reg.h.

#define VXGE_HW_PHASE_CFG_IMMM_RD_PHASE_EN   vxge_mBIT(11)

Definition at line 1488 of file vxge_reg.h.

#define VXGE_HW_PHASE_CFG_UMQM_WR_PHASE_EN   vxge_mBIT(15)

Definition at line 1489 of file vxge_reg.h.

#define VXGE_HW_PHASE_CFG_UMQM_RD_PHASE_EN   vxge_mBIT(19)

Definition at line 1490 of file vxge_reg.h.

#define VXGE_HW_PHASE_CFG_RCBM_WR_PHASE_EN   vxge_mBIT(23)

Definition at line 1491 of file vxge_reg.h.

#define VXGE_HW_PHASE_CFG_RCBM_RD_PHASE_EN   vxge_mBIT(27)

Definition at line 1492 of file vxge_reg.h.

#define VXGE_HW_PHASE_CFG_RXD_RC_WR_PHASE_EN   vxge_mBIT(31)

Definition at line 1493 of file vxge_reg.h.

#define VXGE_HW_PHASE_CFG_RXD_RC_RD_PHASE_EN   vxge_mBIT(35)

Definition at line 1494 of file vxge_reg.h.

#define VXGE_HW_PHASE_CFG_RXD_RHS_WR_PHASE_EN   vxge_mBIT(39)

Definition at line 1495 of file vxge_reg.h.

#define VXGE_HW_PHASE_CFG_RXD_RHS_RD_PHASE_EN   vxge_mBIT(43)

Definition at line 1496 of file vxge_reg.h.

#define VXGE_HW_RCQ_BYPQ_CFG_OVERFLOW_THRESHOLD

(

val

)

vxge_vBIT(val, 10, 22)

Definition at line 1498 of file vxge_reg.h.

#define VXGE_HW_RCQ_BYPQ_CFG_BYP_ON_THRESHOLD

(

val

)

vxge_vBIT(val, 39, 9)

Definition at line 1499 of file vxge_reg.h.

#define VXGE_HW_RCQ_BYPQ_CFG_BYP_OFF_THRESHOLD

(

val

)

vxge_vBIT(val, 55, 9)

Definition at line 1500 of file vxge_reg.h.

#define VXGE_HW_DOORBELL_INT_STATUS_KDFC_ERR_REG_TXDMA_KDFC_INT   vxge_mBIT(7)

Definition at line 1504 of file vxge_reg.h.

#define VXGE_HW_DOORBELL_INT_STATUS_USDC_ERR_REG_TXDMA_USDC_INT   vxge_mBIT(15)

Definition at line 1505 of file vxge_reg.h.

#define VXGE_HW_KDFC_ERR_REG_KDFC_KDFC_ECC_SG_ERR   vxge_mBIT(7)

Definition at line 1508 of file vxge_reg.h.

#define VXGE_HW_KDFC_ERR_REG_KDFC_KDFC_ECC_DB_ERR   vxge_mBIT(15)

Definition at line 1509 of file vxge_reg.h.

#define VXGE_HW_KDFC_ERR_REG_KDFC_KDFC_SM_ERR_ALARM   vxge_mBIT(23)

Definition at line 1510 of file vxge_reg.h.

#define VXGE_HW_KDFC_ERR_REG_KDFC_KDFC_MISC_ERR_1   vxge_mBIT(32)

Definition at line 1511 of file vxge_reg.h.

#define VXGE_HW_KDFC_ERR_REG_KDFC_KDFC_PCIX_ERR   vxge_mBIT(39)

Definition at line 1512 of file vxge_reg.h.

#define VXGE_HW_KDFC_ERR_REG_ALARM_KDFC_KDFC_ECC_SG_ERR   vxge_mBIT(7)

Definition at line 1515 of file vxge_reg.h.

#define VXGE_HW_KDFC_ERR_REG_ALARM_KDFC_KDFC_ECC_DB_ERR   vxge_mBIT(15)

Definition at line 1516 of file vxge_reg.h.

#define VXGE_HW_KDFC_ERR_REG_ALARM_KDFC_KDFC_SM_ERR_ALARM   vxge_mBIT(23)

Definition at line 1517 of file vxge_reg.h.

#define VXGE_HW_KDFC_ERR_REG_ALARM_KDFC_KDFC_MISC_ERR_1   vxge_mBIT(32)

Definition at line 1518 of file vxge_reg.h.

#define VXGE_HW_KDFC_ERR_REG_ALARM_KDFC_KDFC_PCIX_ERR   vxge_mBIT(39)

Definition at line 1519 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_0_ENABLE   vxge_mBIT(0)

Definition at line 1522 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_0_NUMBER_0

(

val

)

vxge_vBIT(val, 5, 3)

Definition at line 1523 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_0_LENGTH_0

(

val

)

vxge_vBIT(val, 17, 15)

Definition at line 1524 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_0_NUMBER_1

(

val

)

vxge_vBIT(val, 37, 3)

Definition at line 1525 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_0_LENGTH_1

(

val

)

vxge_vBIT(val, 49, 15)

Definition at line 1526 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_1_NUMBER_2

(

val

)

vxge_vBIT(val, 5, 3)

Definition at line 1528 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_1_LENGTH_2

(

val

)

vxge_vBIT(val, 17, 15)

Definition at line 1529 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_1_NUMBER_3

(

val

)

vxge_vBIT(val, 37, 3)

Definition at line 1530 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_1_LENGTH_3

(

val

)

vxge_vBIT(val, 49, 15)

Definition at line 1531 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_2_NUMBER_4

(

val

)

vxge_vBIT(val, 5, 3)

Definition at line 1533 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_2_LENGTH_4

(

val

)

vxge_vBIT(val, 17, 15)

Definition at line 1534 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_2_NUMBER_5

(

val

)

vxge_vBIT(val, 37, 3)

Definition at line 1535 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_2_LENGTH_5

(

val

)

vxge_vBIT(val, 49, 15)

Definition at line 1536 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_3_NUMBER_6

(

val

)

vxge_vBIT(val, 5, 3)

Definition at line 1538 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_3_LENGTH_6

(

val

)

vxge_vBIT(val, 17, 15)

Definition at line 1539 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_3_NUMBER_7

(

val

)

vxge_vBIT(val, 37, 3)

Definition at line 1540 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_3_LENGTH_7

(

val

)

vxge_vBIT(val, 49, 15)

Definition at line 1541 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_4_LENGTH_8

(

val

)

vxge_vBIT(val, 17, 15)

Definition at line 1543 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_4_LENGTH_9

(

val

)

vxge_vBIT(val, 49, 15)

Definition at line 1544 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_5_LENGTH_10

(

val

)

vxge_vBIT(val, 17, 15)

Definition at line 1546 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_5_LENGTH_11

(

val

)

vxge_vBIT(val, 49, 15)

Definition at line 1547 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_6_LENGTH_12

(

val

)

vxge_vBIT(val, 17, 15)

Definition at line 1549 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_6_LENGTH_13

(

val

)

vxge_vBIT(val, 49, 15)

Definition at line 1550 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_7_LENGTH_14

(

val

)

vxge_vBIT(val, 17, 15)

Definition at line 1552 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_7_LENGTH_15

(

val

)

vxge_vBIT(val, 49, 15)

Definition at line 1553 of file vxge_reg.h.

#define VXGE_HW_KDFC_VP_PARTITION_8_LENGTH_16

(

val

)

vxge_vBIT(val, 17, 15)

Definition at line 1555 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_0

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1557 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_1

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1558 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_2

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1559 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_3

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1560 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_4

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1561 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_5

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1562 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_6

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1563 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_7

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1564 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_20_NUMBER_0

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1569 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_20_NUMBER_1

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1570 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_20_NUMBER_2

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1571 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_20_NUMBER_3

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1572 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_20_NUMBER_4

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1573 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_20_NUMBER_5

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1574 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_20_NUMBER_6

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1575 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_20_NUMBER_7

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1576 of file vxge_reg.h.

#define VXGE_HW_WRR_FIFO_COUNT   20

Definition at line 1578 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_40_NUMBER_0

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1583 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_40_NUMBER_1

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 1584 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_40_NUMBER_2

(

val

)

vxge_vBIT(val, 19, 5)

Definition at line 1585 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_40_NUMBER_3

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1586 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_40_NUMBER_4

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 1587 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_40_NUMBER_5

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 1588 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_40_NUMBER_6

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 1589 of file vxge_reg.h.

#define VXGE_HW_KDFC_W_ROUND_ROBIN_40_NUMBER_7

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 1590 of file vxge_reg.h.

#define VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_0

(

val

)

vxge_vBIT(val, 6, 2)

Definition at line 1595 of file vxge_reg.h.

#define VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_1

(

val

)

vxge_vBIT(val, 14, 2)

Definition at line 1596 of file vxge_reg.h.

#define VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_2

(

val

)

vxge_vBIT(val, 22, 2)

Definition at line 1597 of file vxge_reg.h.

#define VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_3

(

val

)

vxge_vBIT(val, 30, 2)

Definition at line 1598 of file vxge_reg.h.

#define VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_4

(

val

)

vxge_vBIT(val, 38, 2)

Definition at line 1599 of file vxge_reg.h.

#define VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_5

(

val

)

vxge_vBIT(val, 46, 2)

Definition at line 1600 of file vxge_reg.h.

#define VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_6

(

val

)

vxge_vBIT(val, 54, 2)

Definition at line 1601 of file vxge_reg.h.

#define VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_7

(

val

)

vxge_vBIT(val, 62, 2)

Definition at line 1602 of file vxge_reg.h.

#define VXGE_HW_KDFC_ENTRY_TYPE_SEL_1_NUMBER_8

(

val

)

vxge_vBIT(val, 6, 2)

Definition at line 1604 of file vxge_reg.h.

#define VXGE_HW_KDFC_FIFO_0_CTRL_WRR_NUMBER

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1606 of file vxge_reg.h.

#define VXGE_HW_WEIGHTED_RR_SERVICE_STATES   176

Definition at line 1607 of file vxge_reg.h.

#define VXGE_HW_WRR_FIFO_SERVICE_STATES   153

Definition at line 1608 of file vxge_reg.h.

#define VXGE_HW_KDFC_FIFO_17_CTRL_WRR_NUMBER

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 1613 of file vxge_reg.h.

#define VXGE_HW_RXMAC_INT_STATUS_RXMAC_GEN_ERR_RXMAC_GEN_INT   vxge_mBIT(3)

Definition at line 1618 of file vxge_reg.h.

#define VXGE_HW_RXMAC_INT_STATUS_RXMAC_ECC_ERR_RXMAC_ECC_INT   vxge_mBIT(7)

Definition at line 1619 of file vxge_reg.h.

#define VXGE_HW_RXMAC_INT_STATUS_RXMAC_VARIOUS_ERR_RXMAC_VARIOUS_INT   vxge_mBIT(11)

Definition at line 1620 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RMAC_PORT0_RMAC_RTS_PART_SG_ERR

(

val

)

vxge_vBIT(val, 0, 4)

Definition at line 1629 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RMAC_PORT0_RMAC_RTS_PART_DB_ERR

(

val

)

vxge_vBIT(val, 4, 4)

Definition at line 1631 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RMAC_PORT1_RMAC_RTS_PART_SG_ERR

(

val

)

vxge_vBIT(val, 8, 4)

Definition at line 1633 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RMAC_PORT1_RMAC_RTS_PART_DB_ERR

(

val

)

vxge_vBIT(val, 12, 4)

Definition at line 1635 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RMAC_PORT2_RMAC_RTS_PART_SG_ERR

(

val

)

vxge_vBIT(val, 16, 4)

Definition at line 1637 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RMAC_PORT2_RMAC_RTS_PART_DB_ERR

(

val

)

vxge_vBIT(val, 20, 4)

Definition at line 1639 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_DA_LKP_PRT0_SG_ERR

(

val

)

vxge_vBIT(val, 24, 2)

Definition at line 1641 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_DA_LKP_PRT0_DB_ERR

(

val

)

vxge_vBIT(val, 26, 2)

Definition at line 1643 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_DA_LKP_PRT1_SG_ERR

(

val

)

vxge_vBIT(val, 28, 2)

Definition at line 1645 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_DA_LKP_PRT1_DB_ERR

(

val

)

vxge_vBIT(val, 30, 2)

Definition at line 1647 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_VID_LKP_SG_ERR   vxge_mBIT(32)

Definition at line 1649 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_VID_LKP_DB_ERR   vxge_mBIT(33)

Definition at line 1650 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_PN_LKP_PRT0_SG_ERR   vxge_mBIT(34)

Definition at line 1651 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_PN_LKP_PRT0_DB_ERR   vxge_mBIT(35)

Definition at line 1652 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_PN_LKP_PRT1_SG_ERR   vxge_mBIT(36)

Definition at line 1653 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_PN_LKP_PRT1_DB_ERR   vxge_mBIT(37)

Definition at line 1654 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_PN_LKP_PRT2_SG_ERR   vxge_mBIT(38)

Definition at line 1655 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_PN_LKP_PRT2_DB_ERR   vxge_mBIT(39)

Definition at line 1656 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_RTH_MASK_SG_ERR

(

val

)

vxge_vBIT(val, 40, 7)

Definition at line 1657 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_RTH_MASK_DB_ERR

(

val

)

vxge_vBIT(val, 47, 7)

Definition at line 1659 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_RTH_LKP_SG_ERR

(

val

)

vxge_vBIT(val, 54, 3)

Definition at line 1661 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_RTH_LKP_DB_ERR

(

val

)

vxge_vBIT(val, 57, 3)

Definition at line 1663 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_DS_LKP_SG_ERR   vxge_mBIT(60)

Definition at line 1665 of file vxge_reg.h.

#define VXGE_HW_RXMAC_ECC_ERR_REG_RTSJ_RMAC_DS_LKP_DB_ERR   vxge_mBIT(61)

Definition at line 1667 of file vxge_reg.h.

#define VXGE_HW_RXMAC_VARIOUS_ERR_REG_RMAC_RMAC_PORT0_FSM_ERR   vxge_mBIT(0)

Definition at line 1672 of file vxge_reg.h.

#define VXGE_HW_RXMAC_VARIOUS_ERR_REG_RMAC_RMAC_PORT1_FSM_ERR   vxge_mBIT(1)

Definition at line 1673 of file vxge_reg.h.

#define VXGE_HW_RXMAC_VARIOUS_ERR_REG_RMAC_RMAC_PORT2_FSM_ERR   vxge_mBIT(2)

Definition at line 1674 of file vxge_reg.h.

#define VXGE_HW_RXMAC_VARIOUS_ERR_REG_RMACJ_RMACJ_FSM_ERR   vxge_mBIT(3)

Definition at line 1675 of file vxge_reg.h.

#define VXGE_HW_RXMAC_GEN_CFG_SCALE_RMAC_UTIL   vxge_mBIT(11)

Definition at line 1679 of file vxge_reg.h.

#define VXGE_HW_RXMAC_AUTHORIZE_ALL_ADDR_VP

(

n

)

vxge_mBIT(n)

Definition at line 1681 of file vxge_reg.h.

#define VXGE_HW_RXMAC_AUTHORIZE_ALL_VID_VP

(

n

)

vxge_mBIT(n)

Definition at line 1683 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_CRATE_THR0

(

val

)

vxge_vBIT(val, 0, 4)

Definition at line 1687 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_CRATE_THR1

(

val

)

vxge_vBIT(val, 4, 4)

Definition at line 1688 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_CRATE_THR2

(

val

)

vxge_vBIT(val, 8, 4)

Definition at line 1689 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_CRATE_THR3

(

val

)

vxge_vBIT(val, 12, 4)

Definition at line 1690 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_FRATE_THR0

(

val

)

vxge_vBIT(val, 16, 4)

Definition at line 1691 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_FRATE_THR1

(

val

)

vxge_vBIT(val, 20, 4)

Definition at line 1692 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_FRATE_THR2

(

val

)

vxge_vBIT(val, 24, 4)

Definition at line 1693 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_FRATE_THR3

(

val

)

vxge_vBIT(val, 28, 4)

Definition at line 1694 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_RATE_REPL_QUEUE_TRICKLE_EN   vxge_mBIT(35)

Definition at line 1695 of file vxge_reg.h.

#define VXGE_HW_RXMAC_CFG0_PORT_RMAC_EN   vxge_mBIT(3)

Definition at line 1699 of file vxge_reg.h.

#define VXGE_HW_RXMAC_CFG0_PORT_STRIP_FCS   vxge_mBIT(7)

Definition at line 1700 of file vxge_reg.h.

#define VXGE_HW_RXMAC_CFG0_PORT_DISCARD_PFRM   vxge_mBIT(11)

Definition at line 1701 of file vxge_reg.h.

#define VXGE_HW_RXMAC_CFG0_PORT_IGNORE_FCS_ERR   vxge_mBIT(15)

Definition at line 1702 of file vxge_reg.h.

#define VXGE_HW_RXMAC_CFG0_PORT_IGNORE_LONG_ERR   vxge_mBIT(19)

Definition at line 1703 of file vxge_reg.h.

#define VXGE_HW_RXMAC_CFG0_PORT_IGNORE_USIZED_ERR   vxge_mBIT(23)

Definition at line 1704 of file vxge_reg.h.

#define VXGE_HW_RXMAC_CFG0_PORT_IGNORE_LEN_MISMATCH   vxge_mBIT(27)

Definition at line 1705 of file vxge_reg.h.

#define VXGE_HW_RXMAC_CFG0_PORT_MAX_PYLD_LEN

(

val

)

vxge_vBIT(val, 50, 14)

Definition at line 1706 of file vxge_reg.h.

#define VXGE_HW_RXMAC_CFG2_PORT_PROM_EN   vxge_mBIT(3)

Definition at line 1710 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_GEN_EN   vxge_mBIT(3)

Definition at line 1712 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_RCV_EN   vxge_mBIT(7)

Definition at line 1713 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_ACCEL_SEND

(

val

)

vxge_vBIT(val, 9, 3)

Definition at line 1714 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_DUAL_THR   vxge_mBIT(15)

Definition at line 1715 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_HIGH_PTIME

(

val

)

vxge_vBIT(val, 20, 16)

Definition at line 1716 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_IGNORE_PF_FCS_ERR   vxge_mBIT(39)

Definition at line 1717 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_IGNORE_PF_LEN_ERR   vxge_mBIT(43)

Definition at line 1718 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_LIMITER_EN   vxge_mBIT(47)

Definition at line 1719 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_MAX_LIMIT

(

val

)

vxge_vBIT(val, 48, 8)

Definition at line 1720 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_PERMIT_RATEMGMT_CTRL   vxge_mBIT(59)

Definition at line 1721 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_CFG0_PORT_RED_EN_VP

(

n

)

vxge_mBIT(n)

Definition at line 1725 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_CFG1_PORT_FINE_EN   vxge_mBIT(3)

Definition at line 1727 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_CFG1_PORT_RED_EN_REPL_QUEUE   vxge_mBIT(11)

Definition at line 1728 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_CFG2_PORT_TRICKLE_EN_VP

(

n

)

vxge_mBIT(n)

Definition at line 1730 of file vxge_reg.h.

#define VXGE_HW_RXMAC_LINK_UTIL_PORT_RMAC_RMAC_UTILIZATION

(

val

)

vxge_vBIT(val, 1, 7)

Definition at line 1732 of file vxge_reg.h.

#define VXGE_HW_RXMAC_LINK_UTIL_PORT_RMAC_UTIL_CFG

(

val

)

vxge_vBIT(val, 8, 4)

Definition at line 1734 of file vxge_reg.h.

#define VXGE_HW_RXMAC_LINK_UTIL_PORT_RMAC_RMAC_FRAC_UTIL

(

val

)

vxge_vBIT(val, 12, 4)

Definition at line 1735 of file vxge_reg.h.

#define VXGE_HW_RXMAC_LINK_UTIL_PORT_RMAC_PKT_WEIGHT

(

val

)

vxge_vBIT(val, 16, 4)

Definition at line 1737 of file vxge_reg.h.

#define VXGE_HW_RXMAC_LINK_UTIL_PORT_RMAC_RMAC_SCALE_FACTOR   vxge_mBIT(23)

Definition at line 1738 of file vxge_reg.h.

#define VXGE_HW_RXMAC_STATUS_PORT_RMAC_RX_FRM_RCVD   vxge_mBIT(3)

Definition at line 1742 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_IGNORE_FRAME_ERR   vxge_mBIT(3)

Definition at line 1746 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_SUPPORT_SNAP_AB_N   vxge_mBIT(7)

Definition at line 1747 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_SEARCH_FOR_HAO   vxge_mBIT(18)

Definition at line 1748 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_SUPPORT_MOBILE_IPV6_HDRS   vxge_mBIT(19)

Definition at line 1749 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_IPV6_STOP_SEARCHING   vxge_mBIT(23)

Definition at line 1750 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_NO_PS_IF_UNKNOWN   vxge_mBIT(27)

Definition at line 1751 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_SEARCH_FOR_ETYPE   vxge_mBIT(35)

Definition at line 1752 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_TOSS_ANY_FRM_IF_L3_CSUM_ERR   vxge_mBIT(39)

Definition at line 1753 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_TOSS_OFFLD_FRM_IF_L3_CSUM_ERR   vxge_mBIT(43)

Definition at line 1754 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_TOSS_ANY_FRM_IF_L4_CSUM_ERR   vxge_mBIT(47)

Definition at line 1755 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_TOSS_OFFLD_FRM_IF_L4_CSUM_ERR   vxge_mBIT(51)

Definition at line 1756 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_TOSS_ANY_FRM_IF_RPA_ERR   vxge_mBIT(55)

Definition at line 1757 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_TOSS_OFFLD_FRM_IF_RPA_ERR   vxge_mBIT(59)

Definition at line 1758 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_JUMBO_SNAP_EN   vxge_mBIT(63)

Definition at line 1759 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG1_REPL_IPV4_TCP_INCL_PH   vxge_mBIT(3)

Definition at line 1761 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG1_REPL_IPV6_TCP_INCL_PH   vxge_mBIT(7)

Definition at line 1762 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG1_REPL_IPV4_UDP_INCL_PH   vxge_mBIT(11)

Definition at line 1763 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG1_REPL_IPV6_UDP_INCL_PH   vxge_mBIT(15)

Definition at line 1764 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG1_REPL_L4_INCL_CF   vxge_mBIT(19)

Definition at line 1765 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG1_REPL_STRIP_VLAN_TAG   vxge_mBIT(23)

Definition at line 1766 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_RTS_DP_SP_PRIORITY   vxge_mBIT(3)

Definition at line 1770 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_FLEX_L4PRTCL_VALUE

(

val

)

vxge_vBIT(val, 24, 8)

Definition at line 1771 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_ICMP_TRASH   vxge_mBIT(35)

Definition at line 1772 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_TCPSYN_TRASH   vxge_mBIT(39)

Definition at line 1773 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_ZL4PYLD_TRASH   vxge_mBIT(43)

Definition at line 1774 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_L4PRTCL_TCP_TRASH   vxge_mBIT(47)

Definition at line 1775 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_L4PRTCL_UDP_TRASH   vxge_mBIT(51)

Definition at line 1776 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_L4PRTCL_FLEX_TRASH   vxge_mBIT(55)

Definition at line 1777 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_IPFRAG_TRASH   vxge_mBIT(59)

Definition at line 1778 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG1_DA_ACTIVE_TABLE   vxge_mBIT(3)

Definition at line 1780 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG1_PN_ACTIVE_TABLE   vxge_mBIT(7)

Definition at line 1781 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_ETYPE

(

val

)

vxge_vBIT(val, 5, 3)

Definition at line 1783 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_ICMP_TCPSYN

(

val

)

vxge_vBIT(val, 9, 3)

Definition at line 1784 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_L4PN

(

val

)

vxge_vBIT(val, 13, 3)

Definition at line 1785 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_RANGE_L4PN

(

val

)

vxge_vBIT(val, 17, 3)

Definition at line 1786 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_RTH_IT

(

val

)

vxge_vBIT(val, 21, 3)

Definition at line 1787 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_DS

(

val

)

vxge_vBIT(val, 25, 3)

Definition at line 1788 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_QOS

(

val

)

vxge_vBIT(val, 29, 3)

Definition at line 1789 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_ZL4PYLD

(

val

)

vxge_vBIT(val, 33, 3)

Definition at line 1790 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_L4PRTCL

(

val

)

vxge_vBIT(val, 37, 3)

Definition at line 1791 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_DA_PAUSE_CFG_VPATH_VECTOR

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 1793 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_DA_SLOW_PROTO_CFG_VPATH_VECTOR

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 1795 of file vxge_reg.h.

#define VXGE_HW_DBG_STAT_RX_ANY_FRMS_PORT0_RX_ANY_FRMS

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 1802 of file vxge_reg.h.

#define VXGE_HW_DBG_STAT_RX_ANY_FRMS_PORT1_RX_ANY_FRMS

(

val

)

vxge_vBIT(val, 8, 8)

Definition at line 1803 of file vxge_reg.h.

#define VXGE_HW_DBG_STAT_RX_ANY_FRMS_PORT2_RX_ANY_FRMS

(

val

)

vxge_vBIT(val, 16, 8)

Definition at line 1804 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_RATE_VP_CRATE_THR0

(

val

)

vxge_vBIT(val, 0, 4)

Definition at line 1809 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_RATE_VP_CRATE_THR1

(

val

)

vxge_vBIT(val, 4, 4)

Definition at line 1810 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_RATE_VP_CRATE_THR2

(

val

)

vxge_vBIT(val, 8, 4)

Definition at line 1811 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_RATE_VP_CRATE_THR3

(

val

)

vxge_vBIT(val, 12, 4)

Definition at line 1812 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_RATE_VP_FRATE_THR0

(

val

)

vxge_vBIT(val, 16, 4)

Definition at line 1813 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_RATE_VP_FRATE_THR1

(

val

)

vxge_vBIT(val, 20, 4)

Definition at line 1814 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_RATE_VP_FRATE_THR2

(

val

)

vxge_vBIT(val, 24, 4)

Definition at line 1815 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RED_RATE_VP_FRATE_THR3

(

val

)

vxge_vBIT(val, 28, 4)

Definition at line 1816 of file vxge_reg.h.

#define VXGE_HW_XGMAC_INT_STATUS_XMAC_GEN_ERR_XMAC_GEN_INT   vxge_mBIT(3)

Definition at line 1820 of file vxge_reg.h.

#define VXGE_HW_XGMAC_INT_STATUS_XMAC_LINK_ERR_PORT0_XMAC_LINK_INT_PORT0   vxge_mBIT(7)

Definition at line 1821 of file vxge_reg.h.

#define VXGE_HW_XGMAC_INT_STATUS_XMAC_LINK_ERR_PORT1_XMAC_LINK_INT_PORT1   vxge_mBIT(11)

Definition at line 1823 of file vxge_reg.h.

#define VXGE_HW_XGMAC_INT_STATUS_XGXS_GEN_ERR_XGXS_GEN_INT   vxge_mBIT(15)

Definition at line 1825 of file vxge_reg.h.

#define VXGE_HW_XGMAC_INT_STATUS_ASIC_NTWK_ERR_ASIC_NTWK_INT   vxge_mBIT(19)

Definition at line 1826 of file vxge_reg.h.

#define VXGE_HW_XGMAC_INT_STATUS_ASIC_GPIO_ERR_ASIC_GPIO_INT   vxge_mBIT(23)

Definition at line 1827 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_LAGC_LAG_PORT0_ACTOR_CHURN_DETECTED   vxge_mBIT(7)

Definition at line 1830 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_LAGC_LAG_PORT0_PARTNER_CHURN_DETECTED   vxge_mBIT(11)

Definition at line 1832 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_LAGC_LAG_PORT0_RECEIVED_LACPDU   vxge_mBIT(15)

Definition at line 1834 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_LAGC_LAG_PORT1_ACTOR_CHURN_DETECTED   vxge_mBIT(19)

Definition at line 1835 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_LAGC_LAG_PORT1_PARTNER_CHURN_DETECTED   vxge_mBIT(23)

Definition at line 1837 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_LAGC_LAG_PORT1_RECEIVED_LACPDU   vxge_mBIT(27)

Definition at line 1839 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_XLCM_LAG_FAILOVER_DETECTED   vxge_mBIT(31)

Definition at line 1840 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE0_SG_ERR

(

val

)

vxge_vBIT(val, 40, 2)

Definition at line 1841 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE0_DB_ERR

(

val

)

vxge_vBIT(val, 42, 2)

Definition at line 1843 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE1_SG_ERR

(

val

)

vxge_vBIT(val, 44, 2)

Definition at line 1845 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE1_DB_ERR

(

val

)

vxge_vBIT(val, 46, 2)

Definition at line 1847 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE2_SG_ERR

(

val

)

vxge_vBIT(val, 48, 2)

Definition at line 1849 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE2_DB_ERR

(

val

)

vxge_vBIT(val, 50, 2)

Definition at line 1851 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE3_SG_ERR

(

val

)

vxge_vBIT(val, 52, 2)

Definition at line 1853 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE3_DB_ERR

(

val

)

vxge_vBIT(val, 54, 2)

Definition at line 1855 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE4_SG_ERR

(

val

)

vxge_vBIT(val, 56, 2)

Definition at line 1857 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_XSTATS_RMAC_STATS_TILE4_DB_ERR

(

val

)

vxge_vBIT(val, 58, 2)

Definition at line 1859 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_ERR_REG_XMACJ_XMAC_FSM_ERR   vxge_mBIT(63)

Definition at line 1861 of file vxge_reg.h.

#define VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMACJ_PORT_DOWN   vxge_mBIT(3)

Definition at line 1865 of file vxge_reg.h.

#define VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMACJ_PORT_UP   vxge_mBIT(7)

Definition at line 1866 of file vxge_reg.h.

#define VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMACJ_PORT_WENT_DOWN   vxge_mBIT(11)

Definition at line 1867 of file vxge_reg.h.

#define VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMACJ_PORT_WENT_UP   vxge_mBIT(15)

Definition at line 1868 of file vxge_reg.h.

#define VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMACJ_PORT_REAFFIRMED_FAULT   vxge_mBIT(19)

Definition at line 1869 of file vxge_reg.h.

#define VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMACJ_PORT_REAFFIRMED_OK   vxge_mBIT(23)

Definition at line 1871 of file vxge_reg.h.

#define VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMACJ_LINK_DOWN   vxge_mBIT(27)

Definition at line 1872 of file vxge_reg.h.

#define VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMACJ_LINK_UP   vxge_mBIT(31)

Definition at line 1873 of file vxge_reg.h.

#define VXGE_HW_XMAC_LINK_ERR_PORT_REG_RATEMGMT_RATE_CHANGE   vxge_mBIT(35)

Definition at line 1874 of file vxge_reg.h.

#define VXGE_HW_XMAC_LINK_ERR_PORT_REG_RATEMGMT_LASI_INV   vxge_mBIT(39)

Definition at line 1875 of file vxge_reg.h.

#define VXGE_HW_XMAC_LINK_ERR_PORT_REG_XMDIO_MDIO_MGR_ACCESS_COMPLETE   vxge_mBIT(47)

Definition at line 1876 of file vxge_reg.h.

#define VXGE_HW_XGXS_GEN_ERR_REG_XGXS_XGXS_FSM_ERR   vxge_mBIT(63)

Definition at line 1884 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_ERR_REG_XMACJ_NTWK_DOWN   vxge_mBIT(3)

Definition at line 1888 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_ERR_REG_XMACJ_NTWK_UP   vxge_mBIT(7)

Definition at line 1889 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_ERR_REG_XMACJ_NTWK_WENT_DOWN   vxge_mBIT(11)

Definition at line 1890 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_ERR_REG_XMACJ_NTWK_WENT_UP   vxge_mBIT(15)

Definition at line 1891 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_ERR_REG_XMACJ_NTWK_REAFFIRMED_FAULT   vxge_mBIT(19)

Definition at line 1892 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_ERR_REG_XMACJ_NTWK_REAFFIRMED_OK   vxge_mBIT(23)

Definition at line 1893 of file vxge_reg.h.

#define VXGE_HW_ASIC_GPIO_ERR_REG_XMACJ_GPIO_INT

(

n

)

vxge_mBIT(n)

Definition at line 1897 of file vxge_reg.h.

#define VXGE_HW_XGMAC_GEN_STATUS_XMACJ_NTWK_OK   vxge_mBIT(3)

Definition at line 1901 of file vxge_reg.h.

#define VXGE_HW_XGMAC_GEN_STATUS_XMACJ_NTWK_DATA_RATE   vxge_mBIT(11)

Definition at line 1902 of file vxge_reg.h.

#define VXGE_HW_XGMAC_GEN_FW_MEMO_STATUS_XMACJ_EVENTS_PENDING

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 1904 of file vxge_reg.h.

#define VXGE_HW_XGMAC_GEN_FW_MEMO_MASK_MASK

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 1907 of file vxge_reg.h.

#define VXGE_HW_XGMAC_GEN_FW_VPATH_TO_VSPORT_STATUS_XMACJ_EVENTS_PENDING

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 1909 of file vxge_reg.h.

#define VXGE_HW_XGMAC_MAIN_CFG_PORT_PORT_EN   vxge_mBIT(3)

Definition at line 1912 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_CFG_RATEMGMT_MAC_RATE_SEL

(

val

)

vxge_vBIT(val, 2, 2)

Definition at line 1916 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_CFG_TX_HEAD_DROP_WHEN_FAULT   vxge_mBIT(7)

Definition at line 1917 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_CFG_FAULT_BEHAVIOUR   vxge_mBIT(27)

Definition at line 1918 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_CFG_PERIOD_NTWK_UP

(

val

)

vxge_vBIT(val, 28, 4)

Definition at line 1919 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_CFG_PERIOD_NTWK_DOWN

(

val

)

vxge_vBIT(val, 32, 4)

Definition at line 1920 of file vxge_reg.h.

#define VXGE_HW_XMAC_TIMESTAMP_EN   vxge_mBIT(3)

Definition at line 1922 of file vxge_reg.h.

#define VXGE_HW_XMAC_TIMESTAMP_USE_LINK_ID

(

val

)

vxge_vBIT(val, 6, 2)

Definition at line 1923 of file vxge_reg.h.

#define VXGE_HW_XMAC_TIMESTAMP_INTERVAL

(

val

)

vxge_vBIT(val, 12, 4)

Definition at line 1924 of file vxge_reg.h.

#define VXGE_HW_XMAC_TIMESTAMP_TIMER_RESTART   vxge_mBIT(19)

Definition at line 1925 of file vxge_reg.h.

#define VXGE_HW_XMAC_TIMESTAMP_XMACJ_ROLLOVER_CNT

(

val

)

vxge_vBIT(val, 32, 16)

Definition at line 1926 of file vxge_reg.h.

#define VXGE_HW_XMAC_STATS_GEN_CFG_PRTAGGR_CUM_TIMER

(

val

)

vxge_vBIT(val, 4, 4)

Definition at line 1928 of file vxge_reg.h.

#define VXGE_HW_XMAC_STATS_GEN_CFG_VPATH_CUM_TIMER

(

val

)

vxge_vBIT(val, 8, 4)

Definition at line 1929 of file vxge_reg.h.

#define VXGE_HW_XMAC_STATS_GEN_CFG_VLAN_HANDLING   vxge_mBIT(15)

Definition at line 1930 of file vxge_reg.h.

#define VXGE_HW_XMAC_STATS_SYS_CMD_OP

(

val

)

vxge_vBIT(val, 5, 3)

Definition at line 1932 of file vxge_reg.h.

#define VXGE_HW_XMAC_STATS_SYS_CMD_STROBE   vxge_mBIT(15)

Definition at line 1933 of file vxge_reg.h.

#define VXGE_HW_XMAC_STATS_SYS_CMD_LOC_SEL

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 1934 of file vxge_reg.h.

#define VXGE_HW_XMAC_STATS_SYS_CMD_OFFSET_SEL

(

val

)

vxge_vBIT(val, 32, 8)

Definition at line 1935 of file vxge_reg.h.

#define VXGE_HW_XMAC_STATS_SYS_DATA_XSMGR_DATA

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 1937 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_CTRL_REQ_TEST_NTWK   vxge_mBIT(3)

Definition at line 1941 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_CTRL_PORT0_REQ_TEST_PORT   vxge_mBIT(11)

Definition at line 1942 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_CTRL_PORT1_REQ_TEST_PORT   vxge_mBIT(15)

Definition at line 1943 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_CFG_SHOW_PORT_INFO_VP

(

n

)

vxge_mBIT(n)

Definition at line 1945 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_CFG_PORT_NUM_VP

(

n

)

vxge_mBIT(n)

Definition at line 1947 of file vxge_reg.h.

#define VXGE_HW_XMAC_CFG_PORT_XGMII_LOOPBACK   vxge_mBIT(3)

Definition at line 1949 of file vxge_reg.h.

#define VXGE_HW_XMAC_CFG_PORT_XGMII_REVERSE_LOOPBACK   vxge_mBIT(7)

Definition at line 1950 of file vxge_reg.h.

#define VXGE_HW_XMAC_CFG_PORT_XGMII_TX_BEHAV   vxge_mBIT(11)

Definition at line 1951 of file vxge_reg.h.

#define VXGE_HW_XMAC_CFG_PORT_XGMII_RX_BEHAV   vxge_mBIT(15)

Definition at line 1952 of file vxge_reg.h.

#define VXGE_HW_XMAC_STATION_ADDR_PORT_MAC_ADDR

(

val

)

vxge_vBIT(val, 0, 48)

Definition at line 1954 of file vxge_reg.h.

#define VXGE_HW_LAG_CFG_EN   vxge_mBIT(3)

Definition at line 1958 of file vxge_reg.h.

#define VXGE_HW_LAG_CFG_MODE

(

val

)

vxge_vBIT(val, 6, 2)

Definition at line 1959 of file vxge_reg.h.

#define VXGE_HW_LAG_CFG_TX_DISCARD_BEHAV   vxge_mBIT(11)

Definition at line 1960 of file vxge_reg.h.

#define VXGE_HW_LAG_CFG_RX_DISCARD_BEHAV   vxge_mBIT(15)

Definition at line 1961 of file vxge_reg.h.

#define VXGE_HW_LAG_CFG_PREF_INDIV_PORT_NUM   vxge_mBIT(19)

Definition at line 1962 of file vxge_reg.h.

#define VXGE_HW_LAG_STATUS_XLCM_WAITING_TO_FAILBACK   vxge_mBIT(3)

Definition at line 1964 of file vxge_reg.h.

#define VXGE_HW_LAG_STATUS_XLCM_TIMER_VAL_COLD_FAILOVER

(

val

)

vxge_vBIT(val, 8, 8)

Definition at line 1965 of file vxge_reg.h.

#define VXGE_HW_LAG_ACTIVE_PASSIVE_CFG_HOT_STANDBY   vxge_mBIT(3)

Definition at line 1968 of file vxge_reg.h.

#define VXGE_HW_LAG_ACTIVE_PASSIVE_CFG_LACP_DECIDES   vxge_mBIT(7)

Definition at line 1969 of file vxge_reg.h.

#define VXGE_HW_LAG_ACTIVE_PASSIVE_CFG_PREF_ACTIVE_PORT_NUM   vxge_mBIT(11)

Definition at line 1970 of file vxge_reg.h.

#define VXGE_HW_LAG_ACTIVE_PASSIVE_CFG_AUTO_FAILBACK   vxge_mBIT(15)

Definition at line 1971 of file vxge_reg.h.

#define VXGE_HW_LAG_ACTIVE_PASSIVE_CFG_FAILBACK_EN   vxge_mBIT(19)

Definition at line 1972 of file vxge_reg.h.

#define VXGE_HW_LAG_ACTIVE_PASSIVE_CFG_COLD_FAILOVER_TIMEOUT

(

val

)

vxge_vBIT(val, 32, 16)

Definition at line 1973 of file vxge_reg.h.

#define VXGE_HW_LAG_LACP_CFG_EN   vxge_mBIT(3)

Definition at line 1978 of file vxge_reg.h.

#define VXGE_HW_LAG_LACP_CFG_LACP_BEGIN   vxge_mBIT(7)

Definition at line 1979 of file vxge_reg.h.

#define VXGE_HW_LAG_LACP_CFG_DISCARD_LACP   vxge_mBIT(11)

Definition at line 1980 of file vxge_reg.h.

#define VXGE_HW_LAG_LACP_CFG_LIBERAL_LEN_CHK   vxge_mBIT(15)

Definition at line 1981 of file vxge_reg.h.

#define VXGE_HW_LAG_TIMER_CFG_1_FAST_PER

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 1983 of file vxge_reg.h.

#define VXGE_HW_LAG_TIMER_CFG_1_SLOW_PER

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 1984 of file vxge_reg.h.

#define VXGE_HW_LAG_TIMER_CFG_1_SHORT_TIMEOUT

(

val

)

vxge_vBIT(val, 32, 16)

Definition at line 1985 of file vxge_reg.h.

#define VXGE_HW_LAG_TIMER_CFG_1_LONG_TIMEOUT

(

val

)

vxge_vBIT(val, 48, 16)

Definition at line 1986 of file vxge_reg.h.

#define VXGE_HW_LAG_TIMER_CFG_2_CHURN_DET

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 1988 of file vxge_reg.h.

#define VXGE_HW_LAG_TIMER_CFG_2_AGGR_WAIT

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 1989 of file vxge_reg.h.

#define VXGE_HW_LAG_TIMER_CFG_2_SHORT_TIMER_SCALE

(

val

)

vxge_vBIT(val, 32, 16)

Definition at line 1990 of file vxge_reg.h.

#define VXGE_HW_LAG_TIMER_CFG_2_LONG_TIMER_SCALE

(

val

)

vxge_vBIT(val, 48, 16)

Definition at line 1991 of file vxge_reg.h.

#define VXGE_HW_LAG_SYS_ID_ADDR

(

val

)

vxge_vBIT(val, 0, 48)

Definition at line 1993 of file vxge_reg.h.

#define VXGE_HW_LAG_SYS_ID_USE_PORT_ADDR   vxge_mBIT(51)

Definition at line 1994 of file vxge_reg.h.

#define VXGE_HW_LAG_SYS_ID_ADDR_SEL   vxge_mBIT(55)

Definition at line 1995 of file vxge_reg.h.

#define VXGE_HW_LAG_SYS_CFG_SYS_PRI

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 1997 of file vxge_reg.h.

#define VXGE_HW_LAG_AGGR_ADDR_CFG_ADDR

(

val

)

vxge_vBIT(val, 0, 48)

Definition at line 2001 of file vxge_reg.h.

#define VXGE_HW_LAG_AGGR_ADDR_CFG_USE_PORT_ADDR   vxge_mBIT(51)

Definition at line 2002 of file vxge_reg.h.

#define VXGE_HW_LAG_AGGR_ADDR_CFG_ADDR_SEL   vxge_mBIT(55)

Definition at line 2003 of file vxge_reg.h.

#define VXGE_HW_LAG_AGGR_ID_CFG_ID

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 2005 of file vxge_reg.h.

#define VXGE_HW_LAG_AGGR_ADMIN_KEY_KEY

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 2007 of file vxge_reg.h.

#define VXGE_HW_LAG_AGGR_ALT_ADMIN_KEY_KEY

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 2009 of file vxge_reg.h.

#define VXGE_HW_LAG_AGGR_ALT_ADMIN_KEY_ALT_AGGR   vxge_mBIT(19)

Definition at line 2010 of file vxge_reg.h.

#define VXGE_HW_LAG_AGGR_OPER_KEY_LAGC_KEY

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 2012 of file vxge_reg.h.

#define VXGE_HW_LAG_AGGR_PARTNER_SYS_ID_LAGC_ADDR

(

val

)

vxge_vBIT(val, 0, 48)

Definition at line 2014 of file vxge_reg.h.

#define VXGE_HW_LAG_AGGR_PARTNER_INFO_LAGC_SYS_PRI

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 2016 of file vxge_reg.h.

#define VXGE_HW_LAG_AGGR_PARTNER_INFO_LAGC_OPER_KEY

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 2017 of file vxge_reg.h.

#define VXGE_HW_LAG_AGGR_STATE_LAGC_TX   vxge_mBIT(3)

Definition at line 2020 of file vxge_reg.h.

#define VXGE_HW_LAG_AGGR_STATE_LAGC_RX   vxge_mBIT(7)

Definition at line 2021 of file vxge_reg.h.

#define VXGE_HW_LAG_AGGR_STATE_LAGC_READY   vxge_mBIT(11)

Definition at line 2022 of file vxge_reg.h.

#define VXGE_HW_LAG_AGGR_STATE_LAGC_INDIVIDUAL   vxge_mBIT(15)

Definition at line 2023 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_CFG_EN   vxge_mBIT(3)

Definition at line 2027 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_CFG_DISCARD_SLOW_PROTO   vxge_mBIT(7)

Definition at line 2028 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_CFG_HOST_CHOSEN_AGGR   vxge_mBIT(11)

Definition at line 2029 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_CFG_DISCARD_UNKNOWN_SLOW_PROTO   vxge_mBIT(15)

Definition at line 2030 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_ADMIN_CFG_PORT_NUM

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 2032 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_ADMIN_CFG_PORT_PRI

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 2033 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_ADMIN_CFG_KEY_10G

(

val

)

vxge_vBIT(val, 32, 16)

Definition at line 2034 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_ADMIN_CFG_KEY_1G

(

val

)

vxge_vBIT(val, 48, 16)

Definition at line 2035 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_ADMIN_STATE_LACP_ACTIVITY   vxge_mBIT(3)

Definition at line 2037 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_ADMIN_STATE_LACP_TIMEOUT   vxge_mBIT(7)

Definition at line 2038 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_ADMIN_STATE_AGGREGATION   vxge_mBIT(11)

Definition at line 2039 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_ADMIN_STATE_SYNCHRONIZATION   vxge_mBIT(15)

Definition at line 2040 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_ADMIN_STATE_COLLECTING   vxge_mBIT(19)

Definition at line 2041 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_ADMIN_STATE_DISTRIBUTING   vxge_mBIT(23)

Definition at line 2042 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_ADMIN_STATE_DEFAULTED   vxge_mBIT(27)

Definition at line 2043 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_ADMIN_STATE_EXPIRED   vxge_mBIT(31)

Definition at line 2044 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_ADMIN_SYS_ID_ADDR

(

val

)

vxge_vBIT(val, 0, 48)

Definition at line 2046 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_ADMIN_CFG_SYS_PRI

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 2048 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_ADMIN_CFG_KEY

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 2049 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_ADMIN_CFG_PORT_NUM

(

val

)

vxge_vBIT(val, 32, 16)

Definition at line 2050 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_ADMIN_CFG_PORT_PRI

(

val

)

vxge_vBIT(val, 48, 16)

Definition at line 2052 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_ADMIN_STATE_LACP_ACTIVITY   vxge_mBIT(3)

Definition at line 2055 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_ADMIN_STATE_LACP_TIMEOUT   vxge_mBIT(7)

Definition at line 2056 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_ADMIN_STATE_AGGREGATION   vxge_mBIT(11)

Definition at line 2057 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_ADMIN_STATE_SYNCHRONIZATION   vxge_mBIT(15)

Definition at line 2058 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_ADMIN_STATE_COLLECTING   vxge_mBIT(19)

Definition at line 2059 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_ADMIN_STATE_DISTRIBUTING   vxge_mBIT(23)

Definition at line 2060 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_ADMIN_STATE_DEFAULTED   vxge_mBIT(27)

Definition at line 2061 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_ADMIN_STATE_EXPIRED   vxge_mBIT(31)

Definition at line 2062 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_TO_AGGR_LAGC_AGGR_ID

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 2064 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_TO_AGGR_LAGC_AGGR_VLD_ID   vxge_mBIT(19)

Definition at line 2065 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_OPER_KEY_LAGC_KEY

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 2067 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_OPER_STATE_LAGC_LACP_ACTIVITY   vxge_mBIT(3)

Definition at line 2069 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_OPER_STATE_LAGC_LACP_TIMEOUT   vxge_mBIT(7)

Definition at line 2070 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_OPER_STATE_LAGC_AGGREGATION   vxge_mBIT(11)

Definition at line 2071 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_OPER_STATE_LAGC_SYNCHRONIZATION   vxge_mBIT(15)

Definition at line 2072 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_OPER_STATE_LAGC_COLLECTING   vxge_mBIT(19)

Definition at line 2073 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_OPER_STATE_LAGC_DISTRIBUTING   vxge_mBIT(23)

Definition at line 2074 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_OPER_STATE_LAGC_DEFAULTED   vxge_mBIT(27)

Definition at line 2075 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_ACTOR_OPER_STATE_LAGC_EXPIRED   vxge_mBIT(31)

Definition at line 2076 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_OPER_SYS_ID_LAGC_ADDR

(

val

)

vxge_vBIT(val, 0, 48)

Definition at line 2078 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_OPER_INFO_LAGC_SYS_PRI

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 2081 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_OPER_INFO_LAGC_KEY

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 2083 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_OPER_INFO_LAGC_PORT_NUM

(

val

)

vxge_vBIT(val, 32, 16)

Definition at line 2085 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_OPER_INFO_LAGC_PORT_PRI

(

val

)

vxge_vBIT(val, 48, 16)

Definition at line 2087 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_OPER_STATE_LAGC_LACP_ACTIVITY   vxge_mBIT(3)

Definition at line 2090 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_OPER_STATE_LAGC_LACP_TIMEOUT   vxge_mBIT(7)

Definition at line 2091 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_OPER_STATE_LAGC_AGGREGATION   vxge_mBIT(11)

Definition at line 2092 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_OPER_STATE_LAGC_SYNCHRONIZATION   vxge_mBIT(15)

Definition at line 2093 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_OPER_STATE_LAGC_COLLECTING   vxge_mBIT(19)

Definition at line 2095 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_OPER_STATE_LAGC_DISTRIBUTING   vxge_mBIT(23)

Definition at line 2096 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_OPER_STATE_LAGC_DEFAULTED   vxge_mBIT(27)

Definition at line 2097 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_PARTNER_OPER_STATE_LAGC_EXPIRED   vxge_mBIT(31)

Definition at line 2098 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_READY   vxge_mBIT(3)

Definition at line 2100 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_SELECTED

(

val

)

vxge_vBIT(val, 6, 2)

Definition at line 2101 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_AGGR_NUM   vxge_mBIT(11)

Definition at line 2102 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_PORT_MOVED   vxge_mBIT(15)

Definition at line 2103 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_PORT_ENABLED   vxge_mBIT(18)

Definition at line 2104 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_PORT_DISABLED   vxge_mBIT(19)

Definition at line 2105 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_NTT   vxge_mBIT(23)

Definition at line 2106 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_ACTOR_CHURN   vxge_mBIT(27)

Definition at line 2107 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_PARTNER_CHURN   vxge_mBIT(31)

Definition at line 2108 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_ACTOR_INFO_LEN_MISMATCH   vxge_mBIT(32)

Definition at line 2109 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_PARTNER_INFO_LEN_MISMATCH   vxge_mBIT(33)

Definition at line 2111 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_COLL_INFO_LEN_MISMATCH   vxge_mBIT(34)

Definition at line 2113 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_TERM_INFO_LEN_MISMATCH   vxge_mBIT(35)

Definition at line 2114 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_RX_FSM_STATE

(

val

)

vxge_vBIT(val, 37, 3)

Definition at line 2115 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_MUX_FSM_STATE

(

val

)

vxge_vBIT(val, 41, 3)

Definition at line 2116 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_MUX_REASON

(

val

)

vxge_vBIT(val, 44, 4)

Definition at line 2118 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_ACTOR_CHURN_STATE   vxge_mBIT(54)

Definition at line 2119 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_PARTNER_CHURN_STATE   vxge_mBIT(55)

Definition at line 2120 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_ACTOR_CHURN_COUNT

(

val

)

vxge_vBIT(val, 56, 4)

Definition at line 2121 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_STATE_VARS_LAGC_PARTNER_CHURN_COUNT

(

val

)

vxge_vBIT(val, 60, 4)

Definition at line 2123 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_TIMER_CNTR_LAGC_CURRENT_WHILE

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 2126 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_TIMER_CNTR_LAGC_PERIODIC_WHILE

(

val

)

vxge_vBIT(val, 8, 8)

Definition at line 2127 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_TIMER_CNTR_LAGC_WAIT_WHILE

(

val

)

vxge_vBIT(val, 16, 8)

Definition at line 2129 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_TIMER_CNTR_LAGC_TX_LACP

(

val

)

vxge_vBIT(val, 24, 8)

Definition at line 2130 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_TIMER_CNTR_LAGC_ACTOR_SYNC_TRANSITION_COUNT

(

val

)

vxge_vBIT(val, 32, 8)

Definition at line 2131 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_TIMER_CNTR_LAGC_PARTNER_SYNC_TRANSITION_COUNT

(

val

)

vxge_vBIT(val, 40, 8)

Definition at line 2133 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_TIMER_CNTR_LAGC_ACTOR_CHANGE_COUNT

(

val

)

vxge_vBIT(val, 48, 8)

Definition at line 2135 of file vxge_reg.h.

#define VXGE_HW_LAG_PORT_TIMER_CNTR_LAGC_PARTNER_CHANGE_COUNT

(

val

)

vxge_vBIT(val, 56, 8)

Definition at line 2137 of file vxge_reg.h.

#define VXGE_HW_RTDMA_INT_STATUS_PDA_ALARM_PDA_INT   vxge_mBIT(1)

Definition at line 2142 of file vxge_reg.h.

#define VXGE_HW_RTDMA_INT_STATUS_PCC_ERROR_PCC_INT   vxge_mBIT(2)

Definition at line 2143 of file vxge_reg.h.

#define VXGE_HW_RTDMA_INT_STATUS_LSO_ERROR_LSO_INT   vxge_mBIT(4)

Definition at line 2144 of file vxge_reg.h.

#define VXGE_HW_RTDMA_INT_STATUS_SM_ERROR_SM_INT   vxge_mBIT(5)

Definition at line 2145 of file vxge_reg.h.

#define VXGE_HW_PDA_ALARM_REG_PDA_HSC_FIFO_ERR   vxge_mBIT(0)

Definition at line 2148 of file vxge_reg.h.

#define VXGE_HW_PDA_ALARM_REG_PDA_SM_ERR   vxge_mBIT(1)

Definition at line 2149 of file vxge_reg.h.

#define VXGE_HW_PCC_ERROR_REG_PCC_PCC_FRM_BUF_SBE

(

n

)

vxge_mBIT(n)

Definition at line 2153 of file vxge_reg.h.

#define VXGE_HW_PCC_ERROR_REG_PCC_PCC_TXDO_SBE

(

n

)

vxge_mBIT(n)

Definition at line 2154 of file vxge_reg.h.

#define VXGE_HW_PCC_ERROR_REG_PCC_PCC_FRM_BUF_DBE

(

n

)

vxge_mBIT(n)

Definition at line 2155 of file vxge_reg.h.

#define VXGE_HW_PCC_ERROR_REG_PCC_PCC_TXDO_DBE

(

n

)

vxge_mBIT(n)

Definition at line 2156 of file vxge_reg.h.

#define VXGE_HW_PCC_ERROR_REG_PCC_PCC_FSM_ERR_ALARM

(

n

)

vxge_mBIT(n)

Definition at line 2157 of file vxge_reg.h.

#define VXGE_HW_PCC_ERROR_REG_PCC_PCC_SERR

(

n

)

vxge_mBIT(n)

Definition at line 2158 of file vxge_reg.h.

#define VXGE_HW_LSO_ERROR_REG_PCC_LSO_ABORT

(

n

)

vxge_mBIT(n)

Definition at line 2162 of file vxge_reg.h.

#define VXGE_HW_LSO_ERROR_REG_PCC_LSO_FSM_ERR_ALARM

(

n

)

vxge_mBIT(n)

Definition at line 2163 of file vxge_reg.h.

#define VXGE_HW_SM_ERROR_REG_SM_FSM_ERR_ALARM   vxge_mBIT(15)

Definition at line 2167 of file vxge_reg.h.

#define VXGE_HW_TXD_OWNERSHIP_CTRL_KEEP_OWNERSHIP   vxge_mBIT(7)

Definition at line 2174 of file vxge_reg.h.

#define VXGE_HW_PCC_CFG_PCC_ENABLE

(

n

)

vxge_mBIT(n)

Definition at line 2176 of file vxge_reg.h.

#define VXGE_HW_PCC_CFG_PCC_ECC_ENABLE_N

(

n

)

vxge_mBIT(n)

Definition at line 2177 of file vxge_reg.h.

#define VXGE_HW_PCC_CONTROL_FE_ENABLE

(

val

)

vxge_vBIT(val, 6, 2)

Definition at line 2179 of file vxge_reg.h.

#define VXGE_HW_PCC_CONTROL_EARLY_ASSIGN_EN   vxge_mBIT(15)

Definition at line 2180 of file vxge_reg.h.

#define VXGE_HW_PCC_CONTROL_UNBLOCK_DB_ERR   vxge_mBIT(31)

Definition at line 2181 of file vxge_reg.h.

#define VXGE_HW_PDA_STATUS1_PDA_WRAP_0_CTR

(

val

)

vxge_vBIT(val, 4, 4)

Definition at line 2183 of file vxge_reg.h.

#define VXGE_HW_PDA_STATUS1_PDA_WRAP_1_CTR

(

val

)

vxge_vBIT(val, 12, 4)

Definition at line 2184 of file vxge_reg.h.

#define VXGE_HW_PDA_STATUS1_PDA_WRAP_2_CTR

(

val

)

vxge_vBIT(val, 20, 4)

Definition at line 2185 of file vxge_reg.h.

#define VXGE_HW_PDA_STATUS1_PDA_WRAP_3_CTR

(

val

)

vxge_vBIT(val, 28, 4)

Definition at line 2186 of file vxge_reg.h.

#define VXGE_HW_PDA_STATUS1_PDA_WRAP_4_CTR

(

val

)

vxge_vBIT(val, 36, 4)

Definition at line 2187 of file vxge_reg.h.

#define VXGE_HW_PDA_STATUS1_PDA_WRAP_5_CTR

(

val

)

vxge_vBIT(val, 44, 4)

Definition at line 2188 of file vxge_reg.h.

#define VXGE_HW_PDA_STATUS1_PDA_WRAP_6_CTR

(

val

)

vxge_vBIT(val, 52, 4)

Definition at line 2189 of file vxge_reg.h.

#define VXGE_HW_PDA_STATUS1_PDA_WRAP_7_CTR

(

val

)

vxge_vBIT(val, 60, 4)

Definition at line 2190 of file vxge_reg.h.

#define VXGE_HW_RTDMA_BW_TIMER_TIMER_CTRL

(

val

)

vxge_vBIT(val, 12, 4)

Definition at line 2192 of file vxge_reg.h.

#define VXGE_HW_G3CMCT_INT_STATUS_ERR_G3IF_INT   vxge_mBIT(0)

Definition at line 2196 of file vxge_reg.h.

#define VXGE_HW_G3CMCT_ERR_REG_G3IF_SM_ERR   vxge_mBIT(4)

Definition at line 2199 of file vxge_reg.h.

#define VXGE_HW_G3CMCT_ERR_REG_G3IF_GDDR3_DECC   vxge_mBIT(5)

Definition at line 2200 of file vxge_reg.h.

#define VXGE_HW_G3CMCT_ERR_REG_G3IF_GDDR3_U_DECC   vxge_mBIT(6)

Definition at line 2201 of file vxge_reg.h.

#define VXGE_HW_G3CMCT_ERR_REG_G3IF_CTRL_FIFO_DECC   vxge_mBIT(7)

Definition at line 2202 of file vxge_reg.h.

#define VXGE_HW_G3CMCT_ERR_REG_G3IF_GDDR3_SECC   vxge_mBIT(29)

Definition at line 2203 of file vxge_reg.h.

#define VXGE_HW_G3CMCT_ERR_REG_G3IF_GDDR3_U_SECC   vxge_mBIT(30)

Definition at line 2204 of file vxge_reg.h.

#define VXGE_HW_G3CMCT_ERR_REG_G3IF_CTRL_FIFO_SECC   vxge_mBIT(31)

Definition at line 2205 of file vxge_reg.h.

#define VXGE_HW_MC_INT_STATUS_MC_ERR_MC_INT   vxge_mBIT(3)

Definition at line 2211 of file vxge_reg.h.

#define VXGE_HW_MC_INT_STATUS_GROCRC_ALARM_ROCRC_INT   vxge_mBIT(7)

Definition at line 2212 of file vxge_reg.h.

#define VXGE_HW_MC_INT_STATUS_FAU_GEN_ERR_FAU_GEN_INT   vxge_mBIT(11)

Definition at line 2213 of file vxge_reg.h.

#define VXGE_HW_MC_INT_STATUS_FAU_ECC_ERR_FAU_ECC_INT   vxge_mBIT(15)

Definition at line 2214 of file vxge_reg.h.

#define VXGE_HW_MC_ERR_REG_MC_XFMD_MEM_ECC_SG_ERR_A   vxge_mBIT(3)

Definition at line 2217 of file vxge_reg.h.

#define VXGE_HW_MC_ERR_REG_MC_XFMD_MEM_ECC_SG_ERR_B   vxge_mBIT(4)

Definition at line 2218 of file vxge_reg.h.

#define VXGE_HW_MC_ERR_REG_MC_G3IF_RD_FIFO_ECC_SG_ERR   vxge_mBIT(5)

Definition at line 2219 of file vxge_reg.h.

#define VXGE_HW_MC_ERR_REG_MC_MIRI_ECC_SG_ERR_0   vxge_mBIT(6)

Definition at line 2220 of file vxge_reg.h.

#define VXGE_HW_MC_ERR_REG_MC_MIRI_ECC_SG_ERR_1   vxge_mBIT(7)

Definition at line 2221 of file vxge_reg.h.

#define VXGE_HW_MC_ERR_REG_MC_XFMD_MEM_ECC_DB_ERR_A   vxge_mBIT(10)

Definition at line 2222 of file vxge_reg.h.

#define VXGE_HW_MC_ERR_REG_MC_XFMD_MEM_ECC_DB_ERR_B   vxge_mBIT(11)

Definition at line 2223 of file vxge_reg.h.

#define VXGE_HW_MC_ERR_REG_MC_G3IF_RD_FIFO_ECC_DB_ERR   vxge_mBIT(12)

Definition at line 2224 of file vxge_reg.h.

#define VXGE_HW_MC_ERR_REG_MC_MIRI_ECC_DB_ERR_0   vxge_mBIT(13)

Definition at line 2225 of file vxge_reg.h.

#define VXGE_HW_MC_ERR_REG_MC_MIRI_ECC_DB_ERR_1   vxge_mBIT(14)

Definition at line 2226 of file vxge_reg.h.

#define VXGE_HW_MC_ERR_REG_MC_SM_ERR   vxge_mBIT(15)

Definition at line 2227 of file vxge_reg.h.

#define VXGE_HW_GROCRC_ALARM_REG_XFMD_WR_FIFO_ERR   vxge_mBIT(3)

Definition at line 2231 of file vxge_reg.h.

#define VXGE_HW_GROCRC_ALARM_REG_WDE2MSR_RD_FIFO_ERR   vxge_mBIT(7)

Definition at line 2232 of file vxge_reg.h.

#define VXGE_HW_RX_THRESH_CFG_REPL_PAUSE_LOW_THR

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 2238 of file vxge_reg.h.

#define VXGE_HW_RX_THRESH_CFG_REPL_PAUSE_HIGH_THR

(

val

)

vxge_vBIT(val, 8, 8)

Definition at line 2239 of file vxge_reg.h.

#define VXGE_HW_RX_THRESH_CFG_REPL_RED_THR_0

(

val

)

vxge_vBIT(val, 16, 8)

Definition at line 2240 of file vxge_reg.h.

#define VXGE_HW_RX_THRESH_CFG_REPL_RED_THR_1

(

val

)

vxge_vBIT(val, 24, 8)

Definition at line 2241 of file vxge_reg.h.

#define VXGE_HW_RX_THRESH_CFG_REPL_RED_THR_2

(

val

)

vxge_vBIT(val, 32, 8)

Definition at line 2242 of file vxge_reg.h.

#define VXGE_HW_RX_THRESH_CFG_REPL_RED_THR_3

(

val

)

vxge_vBIT(val, 40, 8)

Definition at line 2243 of file vxge_reg.h.

#define VXGE_HW_RX_THRESH_CFG_REPL_GLOBAL_WOL_EN   vxge_mBIT(62)

Definition at line 2244 of file vxge_reg.h.

#define VXGE_HW_RX_THRESH_CFG_REPL_EXACT_VP_MATCH_REQ   vxge_mBIT(63)

Definition at line 2245 of file vxge_reg.h.

#define VXGE_HW_FBMC_ECC_CFG_ENABLE

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 2249 of file vxge_reg.h.

#define VXGE_HW_PCIPIF_INT_STATUS_DBECC_ERR_DBECC_ERR_INT   vxge_mBIT(3)

Definition at line 2253 of file vxge_reg.h.

#define VXGE_HW_PCIPIF_INT_STATUS_SBECC_ERR_SBECC_ERR_INT   vxge_mBIT(7)

Definition at line 2254 of file vxge_reg.h.

#define VXGE_HW_PCIPIF_INT_STATUS_GENERAL_ERR_GENERAL_ERR_INT   vxge_mBIT(11)

Definition at line 2255 of file vxge_reg.h.

#define VXGE_HW_PCIPIF_INT_STATUS_SRPCIM_MSG_SRPCIM_MSG_INT   vxge_mBIT(15)

Definition at line 2256 of file vxge_reg.h.

#define VXGE_HW_PCIPIF_INT_STATUS_MRPCIM_SPARE_R1_MRPCIM_SPARE_R1_INT   vxge_mBIT(19)

Definition at line 2257 of file vxge_reg.h.

#define VXGE_HW_DBECC_ERR_REG_PCI_RETRY_BUF_DB_ERR   vxge_mBIT(3)

Definition at line 2261 of file vxge_reg.h.

#define VXGE_HW_DBECC_ERR_REG_PCI_RETRY_SOT_DB_ERR   vxge_mBIT(7)

Definition at line 2262 of file vxge_reg.h.

#define VXGE_HW_DBECC_ERR_REG_PCI_P_HDR_DB_ERR   vxge_mBIT(11)

Definition at line 2263 of file vxge_reg.h.

#define VXGE_HW_DBECC_ERR_REG_PCI_P_DATA_DB_ERR   vxge_mBIT(15)

Definition at line 2264 of file vxge_reg.h.

#define VXGE_HW_DBECC_ERR_REG_PCI_NP_HDR_DB_ERR   vxge_mBIT(19)

Definition at line 2265 of file vxge_reg.h.

#define VXGE_HW_DBECC_ERR_REG_PCI_NP_DATA_DB_ERR   vxge_mBIT(23)

Definition at line 2266 of file vxge_reg.h.

#define VXGE_HW_SBECC_ERR_REG_PCI_RETRY_BUF_SG_ERR   vxge_mBIT(3)

Definition at line 2270 of file vxge_reg.h.

#define VXGE_HW_SBECC_ERR_REG_PCI_RETRY_SOT_SG_ERR   vxge_mBIT(7)

Definition at line 2271 of file vxge_reg.h.

#define VXGE_HW_SBECC_ERR_REG_PCI_P_HDR_SG_ERR   vxge_mBIT(11)

Definition at line 2272 of file vxge_reg.h.

#define VXGE_HW_SBECC_ERR_REG_PCI_P_DATA_SG_ERR   vxge_mBIT(15)

Definition at line 2273 of file vxge_reg.h.

#define VXGE_HW_SBECC_ERR_REG_PCI_NP_HDR_SG_ERR   vxge_mBIT(19)

Definition at line 2274 of file vxge_reg.h.

#define VXGE_HW_SBECC_ERR_REG_PCI_NP_DATA_SG_ERR   vxge_mBIT(23)

Definition at line 2275 of file vxge_reg.h.

#define VXGE_HW_GENERAL_ERR_REG_PCI_DROPPED_ILLEGAL_CFG   vxge_mBIT(3)

Definition at line 2279 of file vxge_reg.h.

#define VXGE_HW_GENERAL_ERR_REG_PCI_ILLEGAL_MEM_MAP_PROG   vxge_mBIT(7)

Definition at line 2280 of file vxge_reg.h.

#define VXGE_HW_GENERAL_ERR_REG_PCI_LINK_RST_FSM_ERR   vxge_mBIT(11)

Definition at line 2281 of file vxge_reg.h.

#define VXGE_HW_GENERAL_ERR_REG_PCI_RX_ILLEGAL_TLP_VPLANE   vxge_mBIT(15)

Definition at line 2282 of file vxge_reg.h.

#define VXGE_HW_GENERAL_ERR_REG_PCI_TRAINING_RESET_DET   vxge_mBIT(19)

Definition at line 2283 of file vxge_reg.h.

#define VXGE_HW_GENERAL_ERR_REG_PCI_PCI_LINK_DOWN_DET   vxge_mBIT(23)

Definition at line 2284 of file vxge_reg.h.

#define VXGE_HW_GENERAL_ERR_REG_PCI_RESET_ACK_DLLP   vxge_mBIT(27)

Definition at line 2285 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE0_RMSG_INT   vxge_mBIT(0)

Definition at line 2289 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE1_RMSG_INT   vxge_mBIT(1)

Definition at line 2291 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE2_RMSG_INT   vxge_mBIT(2)

Definition at line 2293 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE3_RMSG_INT   vxge_mBIT(3)

Definition at line 2295 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE4_RMSG_INT   vxge_mBIT(4)

Definition at line 2297 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE5_RMSG_INT   vxge_mBIT(5)

Definition at line 2299 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE6_RMSG_INT   vxge_mBIT(6)

Definition at line 2301 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE7_RMSG_INT   vxge_mBIT(7)

Definition at line 2303 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE8_RMSG_INT   vxge_mBIT(8)

Definition at line 2305 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE9_RMSG_INT   vxge_mBIT(9)

Definition at line 2307 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE10_RMSG_INT   vxge_mBIT(10)

Definition at line 2309 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE11_RMSG_INT   vxge_mBIT(11)

Definition at line 2311 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE12_RMSG_INT   vxge_mBIT(12)

Definition at line 2313 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE13_RMSG_INT   vxge_mBIT(13)

Definition at line 2315 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE14_RMSG_INT   vxge_mBIT(14)

Definition at line 2317 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE15_RMSG_INT   vxge_mBIT(15)

Definition at line 2319 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_REG_SWIF_SRPCIM_TO_MRPCIM_VPLANE16_RMSG_INT   vxge_mBIT(16)

Definition at line 2321 of file vxge_reg.h.

#define VXGE_HW_GCMG1_INT_STATUS_GSSCC_ERR_GSSCC_INT   vxge_mBIT(0)

Definition at line 2328 of file vxge_reg.h.

#define VXGE_HW_GCMG1_INT_STATUS_GSSC0_ERR0_GSSC0_0_INT   vxge_mBIT(1)

Definition at line 2329 of file vxge_reg.h.

#define VXGE_HW_GCMG1_INT_STATUS_GSSC0_ERR1_GSSC0_1_INT   vxge_mBIT(2)

Definition at line 2330 of file vxge_reg.h.

#define VXGE_HW_GCMG1_INT_STATUS_GSSC1_ERR0_GSSC1_0_INT   vxge_mBIT(3)

Definition at line 2331 of file vxge_reg.h.

#define VXGE_HW_GCMG1_INT_STATUS_GSSC1_ERR1_GSSC1_1_INT   vxge_mBIT(4)

Definition at line 2332 of file vxge_reg.h.

#define VXGE_HW_GCMG1_INT_STATUS_GSSC2_ERR0_GSSC2_0_INT   vxge_mBIT(5)

Definition at line 2333 of file vxge_reg.h.

#define VXGE_HW_GCMG1_INT_STATUS_GSSC2_ERR1_GSSC2_1_INT   vxge_mBIT(6)

Definition at line 2334 of file vxge_reg.h.

#define VXGE_HW_GCMG1_INT_STATUS_UQM_ERR_UQM_INT   vxge_mBIT(7)

Definition at line 2335 of file vxge_reg.h.

#define VXGE_HW_GCMG1_INT_STATUS_GQCC_ERR_GQCC_INT   vxge_mBIT(8)

Definition at line 2336 of file vxge_reg.h.

#define VXGE_HW_PCMG1_INT_STATUS_PSSCC_ERR_PSSCC_INT   vxge_mBIT(0)

Definition at line 2341 of file vxge_reg.h.

#define VXGE_HW_PCMG1_INT_STATUS_PQCC_ERR_PQCC_INT   vxge_mBIT(1)

Definition at line 2342 of file vxge_reg.h.

#define VXGE_HW_PCMG1_INT_STATUS_PQCC_CQM_ERR_PQCC_CQM_INT   vxge_mBIT(2)

Definition at line 2343 of file vxge_reg.h.

#define VXGE_HW_PCMG1_INT_STATUS_PQCC_SQM_ERR_PQCC_SQM_INT   vxge_mBIT(3)

Definition at line 2344 of file vxge_reg.h.

#define VXGE_HW_ONE_INT_STATUS_RXPE_ERR_RXPE_INT   vxge_mBIT(7)

Definition at line 2349 of file vxge_reg.h.

#define VXGE_HW_ONE_INT_STATUS_TXPE_BCC_MEM_SG_ECC_ERR_TXPE_BCC_MEM_SG_ECC_INT   vxge_mBIT(13)

Definition at line 2350 of file vxge_reg.h.

#define VXGE_HW_ONE_INT_STATUS_TXPE_BCC_MEM_DB_ECC_ERR_TXPE_BCC_MEM_DB_ECC_INT   vxge_mBIT(14)

Definition at line 2352 of file vxge_reg.h.

#define VXGE_HW_ONE_INT_STATUS_TXPE_ERR_TXPE_INT   vxge_mBIT(15)

Definition at line 2354 of file vxge_reg.h.

#define VXGE_HW_ONE_INT_STATUS_DLM_ERR_DLM_INT   vxge_mBIT(23)

Definition at line 2355 of file vxge_reg.h.

#define VXGE_HW_ONE_INT_STATUS_PE_ERR_PE_INT   vxge_mBIT(31)

Definition at line 2356 of file vxge_reg.h.

#define VXGE_HW_ONE_INT_STATUS_RPE_ERR_RPE_INT   vxge_mBIT(39)

Definition at line 2357 of file vxge_reg.h.

#define VXGE_HW_ONE_INT_STATUS_RPE_FSM_ERR_RPE_FSM_INT   vxge_mBIT(47)

Definition at line 2358 of file vxge_reg.h.

#define VXGE_HW_ONE_INT_STATUS_OES_ERR_OES_INT   vxge_mBIT(55)

Definition at line 2359 of file vxge_reg.h.

#define VXGE_HW_NOA_WCT_CTRL_VP_INT_NUM   vxge_mBIT(0)

Definition at line 2364 of file vxge_reg.h.

#define VXGE_HW_RC_CFG2_BUFF1_SIZE

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 2366 of file vxge_reg.h.

#define VXGE_HW_RC_CFG2_BUFF2_SIZE

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 2367 of file vxge_reg.h.

#define VXGE_HW_RC_CFG2_BUFF3_SIZE

(

val

)

vxge_vBIT(val, 32, 16)

Definition at line 2368 of file vxge_reg.h.

#define VXGE_HW_RC_CFG2_BUFF4_SIZE

(

val

)

vxge_vBIT(val, 48, 16)

Definition at line 2369 of file vxge_reg.h.

#define VXGE_HW_RC_CFG3_BUFF5_SIZE

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 2371 of file vxge_reg.h.

#define VXGE_HW_RX_MULTI_CAST_CTRL1_ENABLE   vxge_mBIT(7)

Definition at line 2373 of file vxge_reg.h.

#define VXGE_HW_RX_MULTI_CAST_CTRL1_DELAY_COUNT

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 2374 of file vxge_reg.h.

#define VXGE_HW_RXDM_DBG_RD_ADDR

(

val

)

vxge_vBIT(val, 0, 12)

Definition at line 2376 of file vxge_reg.h.

#define VXGE_HW_RXDM_DBG_RD_ENABLE   vxge_mBIT(31)

Definition at line 2377 of file vxge_reg.h.

#define VXGE_HW_RXDM_DBG_RD_DATA_RMC_RXDM_DBG_RD_DATA

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 2379 of file vxge_reg.h.

#define VXGE_HW_RQA_TOP_PRTY_FOR_VH_RQA_TOP_PRTY_FOR_VH

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 2381 of file vxge_reg.h.

#define VXGE_HW_TIM_STATUS_TIM_RESET_IN_PROGRESS   vxge_mBIT(0)

Definition at line 2386 of file vxge_reg.h.

#define VXGE_HW_TIM_ECC_ENABLE_VBLS_N   vxge_mBIT(7)

Definition at line 2388 of file vxge_reg.h.

#define VXGE_HW_TIM_ECC_ENABLE_BMAP_N   vxge_mBIT(15)

Definition at line 2389 of file vxge_reg.h.

#define VXGE_HW_TIM_ECC_ENABLE_BMAP_MSG_N   vxge_mBIT(23)

Definition at line 2390 of file vxge_reg.h.

#define VXGE_HW_TIM_BP_CTRL_RD_XON   vxge_mBIT(7)

Definition at line 2392 of file vxge_reg.h.

#define VXGE_HW_TIM_BP_CTRL_WR_XON   vxge_mBIT(15)

Definition at line 2393 of file vxge_reg.h.

#define VXGE_HW_TIM_BP_CTRL_ROCRC_BYP   vxge_mBIT(23)

Definition at line 2394 of file vxge_reg.h.

#define VXGE_HW_TIM_RESOURCE_ASSIGNMENT_VH_BMAP_ROOT

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 2396 of file vxge_reg.h.

#define VXGE_HW_TIM_BMAP_MAPPING_VP_ERR_TIM_DEST_VPATH

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 2398 of file vxge_reg.h.

#define VXGE_HW_GCMG2_INT_STATUS_GXTMC_ERR_GXTMC_INT   vxge_mBIT(7)

Definition at line 2402 of file vxge_reg.h.

#define VXGE_HW_GCMG2_INT_STATUS_GCP_ERR_GCP_INT   vxge_mBIT(15)

Definition at line 2403 of file vxge_reg.h.

#define VXGE_HW_GCMG2_INT_STATUS_CMC_ERR_CMC_INT   vxge_mBIT(23)

Definition at line 2404 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_MEM_DB_ERR

(

val

)

vxge_vBIT(val, 0, 4)

Definition at line 2407 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_MEM_SG_ERR

(

val

)

vxge_vBIT(val, 4, 4)

Definition at line 2408 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_CMC_RD_DATA_DB_ERR   vxge_mBIT(8)

Definition at line 2409 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_REQ_FIFO_ERR   vxge_mBIT(9)

Definition at line 2410 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_REQ_DATA_FIFO_ERR   vxge_mBIT(10)

Definition at line 2411 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_WR_RSP_FIFO_ERR   vxge_mBIT(11)

Definition at line 2412 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_RD_RSP_FIFO_ERR   vxge_mBIT(12)

Definition at line 2413 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_CMI_WRP_FIFO_ERR   vxge_mBIT(13)

Definition at line 2414 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_CMI_WRP_ERR   vxge_mBIT(14)

Definition at line 2415 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_CMI_RRP_FIFO_ERR   vxge_mBIT(15)

Definition at line 2416 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_CMI_RRP_ERR   vxge_mBIT(16)

Definition at line 2417 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_CMI_DATA_SM_ERR   vxge_mBIT(17)

Definition at line 2418 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_CMI_CMC0_IF_ERR   vxge_mBIT(18)

Definition at line 2419 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_ARB_SM_ERR   vxge_mBIT(19)

Definition at line 2420 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_CFC_SM_ERR   vxge_mBIT(20)

Definition at line 2421 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_DFETCH_CREDIT_OVERFLOW   vxge_mBIT(21)

Definition at line 2422 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_DFETCH_CREDIT_UNDERFLOW   vxge_mBIT(22)

Definition at line 2424 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_DFETCH_SM_ERR   vxge_mBIT(23)

Definition at line 2426 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_RCTRL_CREDIT_OVERFLOW   vxge_mBIT(24)

Definition at line 2427 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_RCTRL_CREDIT_UNDERFLOW   vxge_mBIT(25)

Definition at line 2429 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_RCTRL_SM_ERR   vxge_mBIT(26)

Definition at line 2431 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_WCOMPL_SM_ERR   vxge_mBIT(27)

Definition at line 2432 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_WCOMPL_TAG_ERR   vxge_mBIT(28)

Definition at line 2433 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_WREQ_SM_ERR   vxge_mBIT(29)

Definition at line 2434 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_BDT_CMI_WREQ_FIFO_ERR   vxge_mBIT(30)

Definition at line 2435 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_CP2BDT_RFIFO_POP_ERR   vxge_mBIT(31)

Definition at line 2436 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_XTMC_BDT_CMI_OP_ERR   vxge_mBIT(32)

Definition at line 2437 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_XTMC_BDT_DFETCH_OP_ERR   vxge_mBIT(33)

Definition at line 2438 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_XTMC_BDT_DFIFO_ERR   vxge_mBIT(34)

Definition at line 2439 of file vxge_reg.h.

#define VXGE_HW_GXTMC_ERR_REG_XTMC_CMI_ARB_SM_ERR   vxge_mBIT(35)

Definition at line 2440 of file vxge_reg.h.

#define VXGE_HW_CMC_ERR_REG_CMC_CMC_SM_ERR   vxge_mBIT(0)

Definition at line 2444 of file vxge_reg.h.

#define VXGE_HW_GCP_ERR_REG_CP_H2L2CP_FIFO_ERR   vxge_mBIT(0)

Definition at line 2448 of file vxge_reg.h.

#define VXGE_HW_GCP_ERR_REG_CP_STC2CP_FIFO_ERR   vxge_mBIT(1)

Definition at line 2449 of file vxge_reg.h.

#define VXGE_HW_GCP_ERR_REG_CP_STE2CP_FIFO_ERR   vxge_mBIT(2)

Definition at line 2450 of file vxge_reg.h.

#define VXGE_HW_GCP_ERR_REG_CP_TTE2CP_FIFO_ERR   vxge_mBIT(3)

Definition at line 2451 of file vxge_reg.h.

#define VXGE_HW_PCMG2_INT_STATUS_PXTMC_ERR_PXTMC_INT   vxge_mBIT(7)

Definition at line 2457 of file vxge_reg.h.

#define VXGE_HW_PCMG2_INT_STATUS_CP_EXC_CP_XT_EXC_INT   vxge_mBIT(15)

Definition at line 2458 of file vxge_reg.h.

#define VXGE_HW_PCMG2_INT_STATUS_CP_ERR_CP_ERR_INT   vxge_mBIT(23)

Definition at line 2459 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_XT_PIF_SRAM_DB_ERR

(

val

)

vxge_vBIT(val, 0, 2)

Definition at line 2462 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_MPT_REQ_FIFO_ERR   vxge_mBIT(2)

Definition at line 2463 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_MPT_PRSP_FIFO_ERR   vxge_mBIT(3)

Definition at line 2464 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_MPT_WRSP_FIFO_ERR   vxge_mBIT(4)

Definition at line 2465 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_UPT_REQ_FIFO_ERR   vxge_mBIT(5)

Definition at line 2466 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_UPT_PRSP_FIFO_ERR   vxge_mBIT(6)

Definition at line 2467 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_UPT_WRSP_FIFO_ERR   vxge_mBIT(7)

Definition at line 2468 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CPT_REQ_FIFO_ERR   vxge_mBIT(8)

Definition at line 2469 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CPT_PRSP_FIFO_ERR   vxge_mBIT(9)

Definition at line 2470 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CPT_WRSP_FIFO_ERR   vxge_mBIT(10)

Definition at line 2471 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_REQ_FIFO_ERR   vxge_mBIT(11)

Definition at line 2472 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_REQ_DATA_FIFO_ERR   vxge_mBIT(12)

Definition at line 2473 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_WR_RSP_FIFO_ERR   vxge_mBIT(13)

Definition at line 2474 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_RD_RSP_FIFO_ERR   vxge_mBIT(14)

Definition at line 2475 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_MPT_REQ_SHADOW_ERR   vxge_mBIT(15)

Definition at line 2476 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_MPT_RSP_SHADOW_ERR   vxge_mBIT(16)

Definition at line 2477 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_UPT_REQ_SHADOW_ERR   vxge_mBIT(17)

Definition at line 2478 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_UPT_RSP_SHADOW_ERR   vxge_mBIT(18)

Definition at line 2479 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CPT_REQ_SHADOW_ERR   vxge_mBIT(19)

Definition at line 2480 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CPT_RSP_SHADOW_ERR   vxge_mBIT(20)

Definition at line 2481 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_XIL_SHADOW_ERR   vxge_mBIT(21)

Definition at line 2482 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_ARB_SHADOW_ERR   vxge_mBIT(22)

Definition at line 2483 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_RAM_SHADOW_ERR   vxge_mBIT(23)

Definition at line 2484 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CMW_SHADOW_ERR   vxge_mBIT(24)

Definition at line 2485 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CMR_SHADOW_ERR   vxge_mBIT(25)

Definition at line 2486 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_MPT_REQ_FSM_ERR   vxge_mBIT(26)

Definition at line 2487 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_MPT_RSP_FSM_ERR   vxge_mBIT(27)

Definition at line 2488 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_UPT_REQ_FSM_ERR   vxge_mBIT(28)

Definition at line 2489 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_UPT_RSP_FSM_ERR   vxge_mBIT(29)

Definition at line 2490 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CPT_REQ_FSM_ERR   vxge_mBIT(30)

Definition at line 2491 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CPT_RSP_FSM_ERR   vxge_mBIT(31)

Definition at line 2492 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_XIL_FSM_ERR   vxge_mBIT(32)

Definition at line 2493 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_ARB_FSM_ERR   vxge_mBIT(33)

Definition at line 2494 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CMW_FSM_ERR   vxge_mBIT(34)

Definition at line 2495 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CMR_FSM_ERR   vxge_mBIT(35)

Definition at line 2496 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_MXP_RD_PROT_ERR   vxge_mBIT(36)

Definition at line 2497 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_UXP_RD_PROT_ERR   vxge_mBIT(37)

Definition at line 2498 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CXP_RD_PROT_ERR   vxge_mBIT(38)

Definition at line 2499 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_MXP_WR_PROT_ERR   vxge_mBIT(39)

Definition at line 2500 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_UXP_WR_PROT_ERR   vxge_mBIT(40)

Definition at line 2501 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CXP_WR_PROT_ERR   vxge_mBIT(41)

Definition at line 2502 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_MXP_INV_ADDR_ERR   vxge_mBIT(42)

Definition at line 2503 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_UXP_INV_ADDR_ERR   vxge_mBIT(43)

Definition at line 2504 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CXP_INV_ADDR_ERR   vxge_mBIT(44)

Definition at line 2505 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_MXP_RD_PROT_INFO_ERR   vxge_mBIT(45)

Definition at line 2506 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_UXP_RD_PROT_INFO_ERR   vxge_mBIT(46)

Definition at line 2507 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CXP_RD_PROT_INFO_ERR   vxge_mBIT(47)

Definition at line 2508 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_MXP_WR_PROT_INFO_ERR   vxge_mBIT(48)

Definition at line 2509 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_UXP_WR_PROT_INFO_ERR   vxge_mBIT(49)

Definition at line 2510 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CXP_WR_PROT_INFO_ERR   vxge_mBIT(50)

Definition at line 2511 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_MXP_INV_ADDR_INFO_ERR   vxge_mBIT(51)

Definition at line 2512 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_UXP_INV_ADDR_INFO_ERR   vxge_mBIT(52)

Definition at line 2513 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CXP_INV_ADDR_INFO_ERR   vxge_mBIT(53)

Definition at line 2514 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_XT_PIF_SRAM_SG_ERR

(

val

)

vxge_vBIT(val, 54, 2)

Definition at line 2515 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CP2BDT_DFIFO_PUSH_ERR   vxge_mBIT(56)

Definition at line 2516 of file vxge_reg.h.

#define VXGE_HW_PXTMC_ERR_REG_XTMC_CP2BDT_RFIFO_PUSH_ERR   vxge_mBIT(57)

Definition at line 2517 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_CP_DCACHE_SG_ERR

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 2521 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_CP_ICACHE_SG_ERR

(

val

)

vxge_vBIT(val, 8, 2)

Definition at line 2522 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_CP_DTAG_SG_ERR   vxge_mBIT(10)

Definition at line 2523 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_CP_ITAG_SG_ERR   vxge_mBIT(11)

Definition at line 2524 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_CP_TRACE_SG_ERR   vxge_mBIT(12)

Definition at line 2525 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_DMA2CP_SG_ERR   vxge_mBIT(13)

Definition at line 2526 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_MP2CP_SG_ERR   vxge_mBIT(14)

Definition at line 2527 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_QCC2CP_SG_ERR   vxge_mBIT(15)

Definition at line 2528 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_STC2CP_SG_ERR

(

val

)

vxge_vBIT(val, 16, 2)

Definition at line 2529 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_CP_DCACHE_DB_ERR

(

val

)

vxge_vBIT(val, 24, 8)

Definition at line 2530 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_CP_ICACHE_DB_ERR

(

val

)

vxge_vBIT(val, 32, 2)

Definition at line 2531 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_CP_DTAG_DB_ERR   vxge_mBIT(34)

Definition at line 2532 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_CP_ITAG_DB_ERR   vxge_mBIT(35)

Definition at line 2533 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_CP_TRACE_DB_ERR   vxge_mBIT(36)

Definition at line 2534 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_DMA2CP_DB_ERR   vxge_mBIT(37)

Definition at line 2535 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_MP2CP_DB_ERR   vxge_mBIT(38)

Definition at line 2536 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_QCC2CP_DB_ERR   vxge_mBIT(39)

Definition at line 2537 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_STC2CP_DB_ERR

(

val

)

vxge_vBIT(val, 40, 2)

Definition at line 2538 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_H2L2CP_FIFO_ERR   vxge_mBIT(48)

Definition at line 2539 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_STC2CP_FIFO_ERR   vxge_mBIT(49)

Definition at line 2540 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_STE2CP_FIFO_ERR   vxge_mBIT(50)

Definition at line 2541 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_TTE2CP_FIFO_ERR   vxge_mBIT(51)

Definition at line 2542 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_SWIF2CP_FIFO_ERR   vxge_mBIT(52)

Definition at line 2543 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_CP2DMA_FIFO_ERR   vxge_mBIT(53)

Definition at line 2544 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_DAM2CP_FIFO_ERR   vxge_mBIT(54)

Definition at line 2545 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_MP2CP_FIFO_ERR   vxge_mBIT(55)

Definition at line 2546 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_QCC2CP_FIFO_ERR   vxge_mBIT(56)

Definition at line 2547 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_DMA2CP_FIFO_ERR   vxge_mBIT(57)

Definition at line 2548 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_CP_WAKE_FSM_INTEGRITY_ERR   vxge_mBIT(60)

Definition at line 2549 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_CP_PMON_FSM_INTEGRITY_ERR   vxge_mBIT(61)

Definition at line 2550 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_DMA_RD_SHADOW_ERR   vxge_mBIT(62)

Definition at line 2551 of file vxge_reg.h.

#define VXGE_HW_CP_ERR_REG_CP_PIFT_CREDIT_ERR   vxge_mBIT(63)

Definition at line 2552 of file vxge_reg.h.

#define VXGE_HW_CP_EXC_REG_CP_CP_CAUSE_INFO_INT   vxge_mBIT(47)

Definition at line 2558 of file vxge_reg.h.

#define VXGE_HW_CP_EXC_REG_CP_CP_CAUSE_CRIT_INT   vxge_mBIT(55)

Definition at line 2559 of file vxge_reg.h.

#define VXGE_HW_CP_EXC_REG_CP_CP_SERR   vxge_mBIT(63)

Definition at line 2560 of file vxge_reg.h.

#define VXGE_HW_CP_EXC_CAUSE_CP_CP_CAUSE

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 2564 of file vxge_reg.h.

#define VXGE_HW_MSG_INT_STATUS_TIM_ERR_TIM_INT   vxge_mBIT(7)

Definition at line 2568 of file vxge_reg.h.

#define VXGE_HW_MSG_INT_STATUS_MSG_EXC_MSG_XT_EXC_INT   vxge_mBIT(60)

Definition at line 2569 of file vxge_reg.h.

#define VXGE_HW_MSG_INT_STATUS_MSG_ERR3_MSG_ERR3_INT   vxge_mBIT(61)

Definition at line 2570 of file vxge_reg.h.

#define VXGE_HW_MSG_INT_STATUS_MSG_ERR2_MSG_ERR2_INT   vxge_mBIT(62)

Definition at line 2571 of file vxge_reg.h.

#define VXGE_HW_MSG_INT_STATUS_MSG_ERR_MSG_ERR_INT   vxge_mBIT(63)

Definition at line 2572 of file vxge_reg.h.

#define VXGE_HW_TIM_ERR_REG_TIM_VBLS_SG_ERR   vxge_mBIT(4)

Definition at line 2575 of file vxge_reg.h.

#define VXGE_HW_TIM_ERR_REG_TIM_BMAP_PA_SG_ERR   vxge_mBIT(5)

Definition at line 2576 of file vxge_reg.h.

#define VXGE_HW_TIM_ERR_REG_TIM_BMAP_PB_SG_ERR   vxge_mBIT(6)

Definition at line 2577 of file vxge_reg.h.

#define VXGE_HW_TIM_ERR_REG_TIM_BMAP_MSG_SG_ERR   vxge_mBIT(7)

Definition at line 2578 of file vxge_reg.h.

#define VXGE_HW_TIM_ERR_REG_TIM_VBLS_DB_ERR   vxge_mBIT(12)

Definition at line 2579 of file vxge_reg.h.

#define VXGE_HW_TIM_ERR_REG_TIM_BMAP_PA_DB_ERR   vxge_mBIT(13)

Definition at line 2580 of file vxge_reg.h.

#define VXGE_HW_TIM_ERR_REG_TIM_BMAP_PB_DB_ERR   vxge_mBIT(14)

Definition at line 2581 of file vxge_reg.h.

#define VXGE_HW_TIM_ERR_REG_TIM_BMAP_MSG_DB_ERR   vxge_mBIT(15)

Definition at line 2582 of file vxge_reg.h.

#define VXGE_HW_TIM_ERR_REG_TIM_BMAP_MEM_CNTRL_SM_ERR   vxge_mBIT(18)

Definition at line 2583 of file vxge_reg.h.

#define VXGE_HW_TIM_ERR_REG_TIM_BMAP_MSG_MEM_CNTRL_SM_ERR   vxge_mBIT(19)

Definition at line 2584 of file vxge_reg.h.

#define VXGE_HW_TIM_ERR_REG_TIM_MPIF_PCIWR_ERR   vxge_mBIT(20)

Definition at line 2585 of file vxge_reg.h.

#define VXGE_HW_TIM_ERR_REG_TIM_ROCRC_BMAP_UPDT_FIFO_ERR   vxge_mBIT(22)

Definition at line 2586 of file vxge_reg.h.

#define VXGE_HW_TIM_ERR_REG_TIM_CREATE_BMAPMSG_FIFO_ERR   vxge_mBIT(23)

Definition at line 2587 of file vxge_reg.h.

#define VXGE_HW_TIM_ERR_REG_TIM_ROCRCIF_MISMATCH   vxge_mBIT(46)

Definition at line 2588 of file vxge_reg.h.

#define VXGE_HW_TIM_ERR_REG_TIM_BMAP_MAPPING_VP_ERR

(

n

)

vxge_mBIT(n)

Definition at line 2589 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_UP_UXP_WAKE_FSM_INTEGRITY_ERR   vxge_mBIT(0)

Definition at line 2593 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MP_MXP_WAKE_FSM_INTEGRITY_ERR   vxge_mBIT(1)

Definition at line 2594 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_DMQ_DMA_READ_CMD_FSM_INTEGRITY_ERR   vxge_mBIT(2)

Definition at line 2595 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_DMQ_DMA_RESP_FSM_INTEGRITY_ERR   vxge_mBIT(3)

Definition at line 2597 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_DMQ_OWN_FSM_INTEGRITY_ERR   vxge_mBIT(4)

Definition at line 2599 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_PDA_ACC_FSM_INTEGRITY_ERR   vxge_mBIT(5)

Definition at line 2600 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MP_MXP_PMON_FSM_INTEGRITY_ERR   vxge_mBIT(6)

Definition at line 2601 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_UP_UXP_PMON_FSM_INTEGRITY_ERR   vxge_mBIT(7)

Definition at line 2602 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_UP_UXP_DTAG_SG_ERR   vxge_mBIT(8)

Definition at line 2603 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_UP_UXP_ITAG_SG_ERR   vxge_mBIT(10)

Definition at line 2604 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MP_MXP_DTAG_SG_ERR   vxge_mBIT(12)

Definition at line 2605 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MP_MXP_ITAG_SG_ERR   vxge_mBIT(14)

Definition at line 2606 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_UP_UXP_TRACE_SG_ERR   vxge_mBIT(16)

Definition at line 2607 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MP_MXP_TRACE_SG_ERR   vxge_mBIT(17)

Definition at line 2608 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_CMG2MSG_SG_ERR   vxge_mBIT(18)

Definition at line 2609 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_TXPE2MSG_SG_ERR   vxge_mBIT(19)

Definition at line 2610 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_RXPE2MSG_SG_ERR   vxge_mBIT(20)

Definition at line 2611 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_RPE2MSG_SG_ERR   vxge_mBIT(21)

Definition at line 2612 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_UMQ_SG_ERR   vxge_mBIT(26)

Definition at line 2613 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_BWR_PF_SG_ERR   vxge_mBIT(27)

Definition at line 2614 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_DMQ_ECC_SG_ERR   vxge_mBIT(29)

Definition at line 2615 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_DMA_RESP_ECC_SG_ERR   vxge_mBIT(31)

Definition at line 2616 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_XFMDQRY_FSM_INTEGRITY_ERR   vxge_mBIT(33)

Definition at line 2617 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_FRMQRY_FSM_INTEGRITY_ERR   vxge_mBIT(34)

Definition at line 2618 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_UMQ_WRITE_FSM_INTEGRITY_ERR   vxge_mBIT(35)

Definition at line 2619 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_UMQ_BWR_PF_FSM_INTEGRITY_ERR   vxge_mBIT(36)

Definition at line 2620 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_REG_RESP_FIFO_ERR   vxge_mBIT(38)

Definition at line 2622 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_UP_UXP_DTAG_DB_ERR   vxge_mBIT(39)

Definition at line 2623 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_UP_UXP_ITAG_DB_ERR   vxge_mBIT(41)

Definition at line 2624 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MP_MXP_DTAG_DB_ERR   vxge_mBIT(43)

Definition at line 2625 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MP_MXP_ITAG_DB_ERR   vxge_mBIT(45)

Definition at line 2626 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_UP_UXP_TRACE_DB_ERR   vxge_mBIT(47)

Definition at line 2627 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MP_MXP_TRACE_DB_ERR   vxge_mBIT(48)

Definition at line 2628 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_CMG2MSG_DB_ERR   vxge_mBIT(49)

Definition at line 2629 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_TXPE2MSG_DB_ERR   vxge_mBIT(50)

Definition at line 2630 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_RXPE2MSG_DB_ERR   vxge_mBIT(51)

Definition at line 2631 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_RPE2MSG_DB_ERR   vxge_mBIT(52)

Definition at line 2632 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_REG_READ_FIFO_ERR   vxge_mBIT(53)

Definition at line 2633 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_MXP2UXP_FIFO_ERR   vxge_mBIT(54)

Definition at line 2634 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_KDFC_SIF_FIFO_ERR   vxge_mBIT(55)

Definition at line 2635 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_CXP2SWIF_FIFO_ERR   vxge_mBIT(56)

Definition at line 2636 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_UMQ_DB_ERR   vxge_mBIT(57)

Definition at line 2637 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_BWR_PF_DB_ERR   vxge_mBIT(58)

Definition at line 2638 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_BWR_SIF_FIFO_ERR   vxge_mBIT(59)

Definition at line 2639 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_DMQ_ECC_DB_ERR   vxge_mBIT(60)

Definition at line 2640 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_DMA_READ_FIFO_ERR   vxge_mBIT(61)

Definition at line 2641 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_DMA_RESP_ECC_DB_ERR   vxge_mBIT(62)

Definition at line 2642 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR_REG_MSG_QUE_UXP2MXP_FIFO_ERR   vxge_mBIT(63)

Definition at line 2643 of file vxge_reg.h.

#define VXGE_HW_MSG_EXC_REG_MP_MXP_CAUSE_INFO_INT   vxge_mBIT(50)

Definition at line 2649 of file vxge_reg.h.

#define VXGE_HW_MSG_EXC_REG_MP_MXP_CAUSE_CRIT_INT   vxge_mBIT(51)

Definition at line 2650 of file vxge_reg.h.

#define VXGE_HW_MSG_EXC_REG_UP_UXP_CAUSE_INFO_INT   vxge_mBIT(54)

Definition at line 2651 of file vxge_reg.h.

#define VXGE_HW_MSG_EXC_REG_UP_UXP_CAUSE_CRIT_INT   vxge_mBIT(55)

Definition at line 2652 of file vxge_reg.h.

#define VXGE_HW_MSG_EXC_REG_MP_MXP_SERR   vxge_mBIT(62)

Definition at line 2653 of file vxge_reg.h.

#define VXGE_HW_MSG_EXC_REG_UP_UXP_SERR   vxge_mBIT(63)

Definition at line 2654 of file vxge_reg.h.

#define VXGE_HW_MSG_EXC_CAUSE_MP_MXP

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 2658 of file vxge_reg.h.

#define VXGE_HW_MSG_EXC_CAUSE_UP_UXP

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 2659 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_CMG2MSG_DISPATCH_FSM_INTEGRITY_ERR   vxge_mBIT(0)

Definition at line 2663 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_DMQ_DISPATCH_FSM_INTEGRITY_ERR   vxge_mBIT(1)

Definition at line 2665 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_SWIF_DISPATCH_FSM_INTEGRITY_ERR   vxge_mBIT(2)

Definition at line 2667 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_PIC_WRITE_FSM_INTEGRITY_ERR   vxge_mBIT(3)

Definition at line 2669 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_SWIFREG_FSM_INTEGRITY_ERR   vxge_mBIT(4)

Definition at line 2671 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_TIM_WRITE_FSM_INTEGRITY_ERR   vxge_mBIT(5)

Definition at line 2672 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_UMQ_TA_FSM_INTEGRITY_ERR   vxge_mBIT(6)

Definition at line 2674 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_TXPE_TA_FSM_INTEGRITY_ERR   vxge_mBIT(7)

Definition at line 2675 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_RXPE_TA_FSM_INTEGRITY_ERR   vxge_mBIT(8)

Definition at line 2676 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_SWIF_TA_FSM_INTEGRITY_ERR   vxge_mBIT(9)

Definition at line 2677 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_DMA_TA_FSM_INTEGRITY_ERR   vxge_mBIT(10)

Definition at line 2678 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_CP_TA_FSM_INTEGRITY_ERR   vxge_mBIT(11)

Definition at line 2679 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA16_FSM_INTEGRITY_ERR   vxge_mBIT(12)

Definition at line 2680 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA15_FSM_INTEGRITY_ERR   vxge_mBIT(13)

Definition at line 2682 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA14_FSM_INTEGRITY_ERR   vxge_mBIT(14)

Definition at line 2684 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA13_FSM_INTEGRITY_ERR   vxge_mBIT(15)

Definition at line 2686 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA12_FSM_INTEGRITY_ERR   vxge_mBIT(16)

Definition at line 2688 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA11_FSM_INTEGRITY_ERR   vxge_mBIT(17)

Definition at line 2690 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA10_FSM_INTEGRITY_ERR   vxge_mBIT(18)

Definition at line 2692 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA9_FSM_INTEGRITY_ERR   vxge_mBIT(19)

Definition at line 2694 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA8_FSM_INTEGRITY_ERR   vxge_mBIT(20)

Definition at line 2696 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA7_FSM_INTEGRITY_ERR   vxge_mBIT(21)

Definition at line 2698 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA6_FSM_INTEGRITY_ERR   vxge_mBIT(22)

Definition at line 2700 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA5_FSM_INTEGRITY_ERR   vxge_mBIT(23)

Definition at line 2702 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA4_FSM_INTEGRITY_ERR   vxge_mBIT(24)

Definition at line 2704 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA3_FSM_INTEGRITY_ERR   vxge_mBIT(25)

Definition at line 2706 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA2_FSM_INTEGRITY_ERR   vxge_mBIT(26)

Definition at line 2708 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA1_FSM_INTEGRITY_ERR   vxge_mBIT(27)

Definition at line 2710 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_LONGTERMUMQ_TA0_FSM_INTEGRITY_ERR   vxge_mBIT(28)

Definition at line 2712 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_FBMC_OWN_FSM_INTEGRITY_ERR   vxge_mBIT(29)

Definition at line 2714 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_TXPE2MSG_DISPATCH_FSM_INTEGRITY_ERR   vxge_mBIT(30)

Definition at line 2715 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_RXPE2MSG_DISPATCH_FSM_INTEGRITY_ERR   vxge_mBIT(31)

Definition at line 2717 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_RPE2MSG_DISPATCH_FSM_INTEGRITY_ERR   vxge_mBIT(32)

Definition at line 2719 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MP_MP_PIFT_IF_CREDIT_CNT_ERR   vxge_mBIT(33)

Definition at line 2721 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_UP_UP_PIFT_IF_CREDIT_CNT_ERR   vxge_mBIT(34)

Definition at line 2722 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_MSG_QUE_UMQ2PIC_CMD_FIFO_ERR   vxge_mBIT(62)

Definition at line 2723 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR2_REG_TIM_TIM2MSG_CMD_FIFO_ERR   vxge_mBIT(63)

Definition at line 2724 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_SG_ERR0   vxge_mBIT(0)

Definition at line 2728 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_SG_ERR1   vxge_mBIT(1)

Definition at line 2729 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_SG_ERR2   vxge_mBIT(2)

Definition at line 2730 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_SG_ERR3   vxge_mBIT(3)

Definition at line 2731 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_SG_ERR4   vxge_mBIT(4)

Definition at line 2732 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_SG_ERR5   vxge_mBIT(5)

Definition at line 2733 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_SG_ERR6   vxge_mBIT(6)

Definition at line 2734 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_SG_ERR7   vxge_mBIT(7)

Definition at line 2735 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_ICACHE_SG_ERR0   vxge_mBIT(8)

Definition at line 2736 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_ICACHE_SG_ERR1   vxge_mBIT(9)

Definition at line 2737 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_SG_ERR0   vxge_mBIT(16)

Definition at line 2738 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_SG_ERR1   vxge_mBIT(17)

Definition at line 2739 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_SG_ERR2   vxge_mBIT(18)

Definition at line 2740 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_SG_ERR3   vxge_mBIT(19)

Definition at line 2741 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_SG_ERR4   vxge_mBIT(20)

Definition at line 2742 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_SG_ERR5   vxge_mBIT(21)

Definition at line 2743 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_SG_ERR6   vxge_mBIT(22)

Definition at line 2744 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_SG_ERR7   vxge_mBIT(23)

Definition at line 2745 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_ICACHE_SG_ERR0   vxge_mBIT(24)

Definition at line 2746 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_ICACHE_SG_ERR1   vxge_mBIT(25)

Definition at line 2747 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_DB_ERR0   vxge_mBIT(32)

Definition at line 2748 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_DB_ERR1   vxge_mBIT(33)

Definition at line 2749 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_DB_ERR2   vxge_mBIT(34)

Definition at line 2750 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_DB_ERR3   vxge_mBIT(35)

Definition at line 2751 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_DB_ERR4   vxge_mBIT(36)

Definition at line 2752 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_DB_ERR5   vxge_mBIT(37)

Definition at line 2753 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_DB_ERR6   vxge_mBIT(38)

Definition at line 2754 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_DCACHE_DB_ERR7   vxge_mBIT(39)

Definition at line 2755 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_ICACHE_DB_ERR0   vxge_mBIT(40)

Definition at line 2756 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_UP_UXP_ICACHE_DB_ERR1   vxge_mBIT(41)

Definition at line 2757 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_DB_ERR0   vxge_mBIT(48)

Definition at line 2758 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_DB_ERR1   vxge_mBIT(49)

Definition at line 2759 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_DB_ERR2   vxge_mBIT(50)

Definition at line 2760 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_DB_ERR3   vxge_mBIT(51)

Definition at line 2761 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_DB_ERR4   vxge_mBIT(52)

Definition at line 2762 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_DB_ERR5   vxge_mBIT(53)

Definition at line 2763 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_DB_ERR6   vxge_mBIT(54)

Definition at line 2764 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_DCACHE_DB_ERR7   vxge_mBIT(55)

Definition at line 2765 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_ICACHE_DB_ERR0   vxge_mBIT(56)

Definition at line 2766 of file vxge_reg.h.

#define VXGE_HW_MSG_ERR3_REG_MP_MXP_ICACHE_DB_ERR1   vxge_mBIT(57)

Definition at line 2767 of file vxge_reg.h.

#define VXGE_HW_FAU_GEN_ERR_REG_FMPF_PORT0_PERMANENT_STOP   vxge_mBIT(3)

Definition at line 2773 of file vxge_reg.h.

#define VXGE_HW_FAU_GEN_ERR_REG_FMPF_PORT1_PERMANENT_STOP   vxge_mBIT(7)

Definition at line 2774 of file vxge_reg.h.

#define VXGE_HW_FAU_GEN_ERR_REG_FMPF_PORT2_PERMANENT_STOP   vxge_mBIT(11)

Definition at line 2775 of file vxge_reg.h.

#define VXGE_HW_FAU_GEN_ERR_REG_FALR_AUTO_LRO_NOTIFICATION   vxge_mBIT(15)

Definition at line 2776 of file vxge_reg.h.

#define VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT0_FAU_MAC2F_N_SG_ERR   vxge_mBIT(0)

Definition at line 2780 of file vxge_reg.h.

#define VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT0_FAU_MAC2F_N_DB_ERR   vxge_mBIT(1)

Definition at line 2781 of file vxge_reg.h.

#define VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT0_FAU_MAC2F_W_SG_ERR

(

val

)

vxge_vBIT(val, 2, 2)

Definition at line 2782 of file vxge_reg.h.

#define VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT0_FAU_MAC2F_W_DB_ERR

(

val

)

vxge_vBIT(val, 4, 2)

Definition at line 2784 of file vxge_reg.h.

#define VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT1_FAU_MAC2F_N_SG_ERR   vxge_mBIT(6)

Definition at line 2786 of file vxge_reg.h.

#define VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT1_FAU_MAC2F_N_DB_ERR   vxge_mBIT(7)

Definition at line 2787 of file vxge_reg.h.

#define VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT1_FAU_MAC2F_W_SG_ERR

(

val

)

vxge_vBIT(val, 8, 2)

Definition at line 2788 of file vxge_reg.h.

#define VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT1_FAU_MAC2F_W_DB_ERR

(

val

)

vxge_vBIT(val, 10, 2)

Definition at line 2790 of file vxge_reg.h.

#define VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT2_FAU_MAC2F_N_SG_ERR   vxge_mBIT(12)

Definition at line 2792 of file vxge_reg.h.

#define VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT2_FAU_MAC2F_N_DB_ERR   vxge_mBIT(13)

Definition at line 2793 of file vxge_reg.h.

#define VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT2_FAU_MAC2F_W_SG_ERR

(

val

)

vxge_vBIT(val, 14, 2)

Definition at line 2794 of file vxge_reg.h.

#define VXGE_HW_FAU_ECC_ERR_REG_FAU_PORT2_FAU_MAC2F_W_DB_ERR

(

val

)

vxge_vBIT(val, 16, 2)

Definition at line 2796 of file vxge_reg.h.

#define VXGE_HW_FAU_ECC_ERR_REG_FAU_FAU_XFMD_INS_SG_ERR

(

val

)

vxge_vBIT(val, 18, 2)

Definition at line 2798 of file vxge_reg.h.

#define VXGE_HW_FAU_ECC_ERR_REG_FAU_FAU_XFMD_INS_DB_ERR

(

val

)

vxge_vBIT(val, 20, 2)

Definition at line 2800 of file vxge_reg.h.

#define VXGE_HW_FAU_ECC_ERR_REG_FAUJ_FAU_FSM_ERR   vxge_mBIT(31)

Definition at line 2802 of file vxge_reg.h.

#define VXGE_HW_FAU_PA_CFG_REPL_L4_COMP_CSUM   vxge_mBIT(3)

Definition at line 2807 of file vxge_reg.h.

#define VXGE_HW_FAU_PA_CFG_REPL_L3_INCL_CF   vxge_mBIT(7)

Definition at line 2808 of file vxge_reg.h.

#define VXGE_HW_FAU_PA_CFG_REPL_L3_COMP_CSUM   vxge_mBIT(11)

Definition at line 2809 of file vxge_reg.h.

#define VXGE_HW_DBG_STATS_FAU_RX_PATH_RX_PERMITTED_FRMS

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 2813 of file vxge_reg.h.

#define VXGE_HW_FAU_LAG_CFG_COLL_ALG

(

val

)

vxge_vBIT(val, 2, 2)

Definition at line 2818 of file vxge_reg.h.

#define VXGE_HW_FAU_LAG_CFG_INCR_RX_AGGR_STATS   vxge_mBIT(7)

Definition at line 2819 of file vxge_reg.h.

#define VXGE_HW_TPA_INT_STATUS_ORP_ERR_ORP_INT   vxge_mBIT(15)

Definition at line 2823 of file vxge_reg.h.

#define VXGE_HW_TPA_INT_STATUS_PTM_ALARM_PTM_INT   vxge_mBIT(23)

Definition at line 2824 of file vxge_reg.h.

#define VXGE_HW_TPA_INT_STATUS_TPA_ERROR_TPA_INT   vxge_mBIT(31)

Definition at line 2825 of file vxge_reg.h.

#define VXGE_HW_ORP_ERR_REG_ORP_FIFO_SG_ERR   vxge_mBIT(3)

Definition at line 2828 of file vxge_reg.h.

#define VXGE_HW_ORP_ERR_REG_ORP_FIFO_DB_ERR   vxge_mBIT(7)

Definition at line 2829 of file vxge_reg.h.

#define VXGE_HW_ORP_ERR_REG_ORP_XFMD_FIFO_UFLOW_ERR   vxge_mBIT(11)

Definition at line 2830 of file vxge_reg.h.

#define VXGE_HW_ORP_ERR_REG_ORP_FRM_FIFO_UFLOW_ERR   vxge_mBIT(15)

Definition at line 2831 of file vxge_reg.h.

#define VXGE_HW_ORP_ERR_REG_ORP_XFMD_RCV_FSM_ERR   vxge_mBIT(19)

Definition at line 2832 of file vxge_reg.h.

#define VXGE_HW_ORP_ERR_REG_ORP_OUTREAD_FSM_ERR   vxge_mBIT(23)

Definition at line 2833 of file vxge_reg.h.

#define VXGE_HW_ORP_ERR_REG_ORP_OUTQEM_FSM_ERR   vxge_mBIT(27)

Definition at line 2834 of file vxge_reg.h.

#define VXGE_HW_ORP_ERR_REG_ORP_XFMD_RCV_SHADOW_ERR   vxge_mBIT(31)

Definition at line 2835 of file vxge_reg.h.

#define VXGE_HW_ORP_ERR_REG_ORP_OUTREAD_SHADOW_ERR   vxge_mBIT(35)

Definition at line 2836 of file vxge_reg.h.

#define VXGE_HW_ORP_ERR_REG_ORP_OUTQEM_SHADOW_ERR   vxge_mBIT(39)

Definition at line 2837 of file vxge_reg.h.

#define VXGE_HW_ORP_ERR_REG_ORP_OUTFRM_SHADOW_ERR   vxge_mBIT(43)

Definition at line 2838 of file vxge_reg.h.

#define VXGE_HW_ORP_ERR_REG_ORP_OPTPRS_SHADOW_ERR   vxge_mBIT(47)

Definition at line 2839 of file vxge_reg.h.

#define VXGE_HW_PTM_ALARM_REG_PTM_RDCTRL_SYNC_ERR   vxge_mBIT(3)

Definition at line 2843 of file vxge_reg.h.

#define VXGE_HW_PTM_ALARM_REG_PTM_RDCTRL_FIFO_ERR   vxge_mBIT(7)

Definition at line 2844 of file vxge_reg.h.

#define VXGE_HW_PTM_ALARM_REG_XFMD_RD_FIFO_ERR   vxge_mBIT(11)

Definition at line 2845 of file vxge_reg.h.

#define VXGE_HW_PTM_ALARM_REG_WDE2MSR_WR_FIFO_ERR   vxge_mBIT(15)

Definition at line 2846 of file vxge_reg.h.

#define VXGE_HW_PTM_ALARM_REG_PTM_FRMM_ECC_DB_ERR

(

val

)

vxge_vBIT(val, 18, 2)

Definition at line 2847 of file vxge_reg.h.

#define VXGE_HW_PTM_ALARM_REG_PTM_FRMM_ECC_SG_ERR

(

val

)

vxge_vBIT(val, 22, 2)

Definition at line 2848 of file vxge_reg.h.

#define VXGE_HW_TPA_ERROR_REG_TPA_FSM_ERR_ALARM   vxge_mBIT(3)

Definition at line 2852 of file vxge_reg.h.

#define VXGE_HW_TPA_ERROR_REG_TPA_TPA_DA_LKUP_PRT0_DB_ERR   vxge_mBIT(7)

Definition at line 2853 of file vxge_reg.h.

#define VXGE_HW_TPA_ERROR_REG_TPA_TPA_DA_LKUP_PRT0_SG_ERR   vxge_mBIT(11)

Definition at line 2854 of file vxge_reg.h.

#define VXGE_HW_TPA_GLOBAL_CFG_SUPPORT_SNAP_AB_N   vxge_mBIT(7)

Definition at line 2858 of file vxge_reg.h.

#define VXGE_HW_TPA_GLOBAL_CFG_ECC_ENABLE_N   vxge_mBIT(35)

Definition at line 2859 of file vxge_reg.h.

#define VXGE_HW_PTM_ECC_CFG_PTM_FRMM_ECC_EN_N   vxge_mBIT(3)

Definition at line 2863 of file vxge_reg.h.

#define VXGE_HW_PTM_PHASE_CFG_FRMM_WR_PHASE_EN   vxge_mBIT(3)

Definition at line 2865 of file vxge_reg.h.

#define VXGE_HW_PTM_PHASE_CFG_FRMM_RD_PHASE_EN   vxge_mBIT(7)

Definition at line 2866 of file vxge_reg.h.

#define VXGE_HW_DBG_STATS_TPA_TX_PATH_TX_PERMITTED_FRMS

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 2870 of file vxge_reg.h.

#define VXGE_HW_TMAC_INT_STATUS_TXMAC_GEN_ERR_TXMAC_GEN_INT   vxge_mBIT(3)

Definition at line 2875 of file vxge_reg.h.

#define VXGE_HW_TMAC_INT_STATUS_TXMAC_ECC_ERR_TXMAC_ECC_INT   vxge_mBIT(7)

Definition at line 2876 of file vxge_reg.h.

#define VXGE_HW_TXMAC_GEN_ERR_REG_TMACJ_PERMANENT_STOP   vxge_mBIT(3)

Definition at line 2879 of file vxge_reg.h.

#define VXGE_HW_TXMAC_GEN_ERR_REG_TMACJ_NO_VALID_VSPORT   vxge_mBIT(7)

Definition at line 2880 of file vxge_reg.h.

#define VXGE_HW_TXMAC_ECC_ERR_REG_TMACJ_TMAC_TPA2MAC_SG_ERR   vxge_mBIT(3)

Definition at line 2884 of file vxge_reg.h.

#define VXGE_HW_TXMAC_ECC_ERR_REG_TMACJ_TMAC_TPA2MAC_DB_ERR   vxge_mBIT(7)

Definition at line 2885 of file vxge_reg.h.

#define VXGE_HW_TXMAC_ECC_ERR_REG_TMACJ_TMAC_TPA2M_SB_SG_ERR   vxge_mBIT(11)

Definition at line 2886 of file vxge_reg.h.

#define VXGE_HW_TXMAC_ECC_ERR_REG_TMACJ_TMAC_TPA2M_SB_DB_ERR   vxge_mBIT(15)

Definition at line 2887 of file vxge_reg.h.

#define VXGE_HW_TXMAC_ECC_ERR_REG_TMACJ_TMAC_TPA2M_DA_SG_ERR   vxge_mBIT(19)

Definition at line 2888 of file vxge_reg.h.

#define VXGE_HW_TXMAC_ECC_ERR_REG_TMACJ_TMAC_TPA2M_DA_DB_ERR   vxge_mBIT(23)

Definition at line 2889 of file vxge_reg.h.

#define VXGE_HW_TXMAC_ECC_ERR_REG_TMAC_TMAC_PORT0_FSM_ERR   vxge_mBIT(27)

Definition at line 2890 of file vxge_reg.h.

#define VXGE_HW_TXMAC_ECC_ERR_REG_TMAC_TMAC_PORT1_FSM_ERR   vxge_mBIT(31)

Definition at line 2891 of file vxge_reg.h.

#define VXGE_HW_TXMAC_ECC_ERR_REG_TMAC_TMAC_PORT2_FSM_ERR   vxge_mBIT(35)

Definition at line 2892 of file vxge_reg.h.

#define VXGE_HW_TXMAC_ECC_ERR_REG_TMACJ_TMACJ_FSM_ERR   vxge_mBIT(39)

Definition at line 2893 of file vxge_reg.h.

#define VXGE_HW_DBG_STAT_TX_ANY_FRMS_PORT0_TX_ANY_FRMS

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 2899 of file vxge_reg.h.

#define VXGE_HW_DBG_STAT_TX_ANY_FRMS_PORT1_TX_ANY_FRMS

(

val

)

vxge_vBIT(val, 8, 8)

Definition at line 2900 of file vxge_reg.h.

#define VXGE_HW_DBG_STAT_TX_ANY_FRMS_PORT2_TX_ANY_FRMS

(

val

)

vxge_vBIT(val, 16, 8)

Definition at line 2901 of file vxge_reg.h.

#define VXGE_HW_TXMAC_LINK_UTIL_PORT_TMAC_TMAC_UTILIZATION

(

val

)

vxge_vBIT(val, 1, 7)

Definition at line 2906 of file vxge_reg.h.

#define VXGE_HW_TXMAC_LINK_UTIL_PORT_TMAC_UTIL_CFG

(

val

)

vxge_vBIT(val, 8, 4)

Definition at line 2908 of file vxge_reg.h.

#define VXGE_HW_TXMAC_LINK_UTIL_PORT_TMAC_TMAC_FRAC_UTIL

(

val

)

vxge_vBIT(val, 12, 4)

Definition at line 2909 of file vxge_reg.h.

#define VXGE_HW_TXMAC_LINK_UTIL_PORT_TMAC_PKT_WEIGHT

(

val

)

vxge_vBIT(val, 16, 4)

Definition at line 2911 of file vxge_reg.h.

#define VXGE_HW_TXMAC_LINK_UTIL_PORT_TMAC_TMAC_SCALE_FACTOR   vxge_mBIT(23)

Definition at line 2912 of file vxge_reg.h.

#define VXGE_HW_TXMAC_CFG0_PORT_TMAC_EN   vxge_mBIT(3)

Definition at line 2914 of file vxge_reg.h.

#define VXGE_HW_TXMAC_CFG0_PORT_APPEND_PAD   vxge_mBIT(7)

Definition at line 2915 of file vxge_reg.h.

#define VXGE_HW_TXMAC_CFG0_PORT_PAD_BYTE

(

val

)

vxge_vBIT(val, 8, 8)

Definition at line 2916 of file vxge_reg.h.

#define VXGE_HW_TXMAC_CFG1_PORT_AVG_IPG

(

val

)

vxge_vBIT(val, 40, 8)

Definition at line 2918 of file vxge_reg.h.

#define VXGE_HW_TXMAC_STATUS_PORT_TMAC_TX_FRM_SENT   vxge_mBIT(3)

Definition at line 2920 of file vxge_reg.h.

#define VXGE_HW_LAG_DISTRIB_DEST_MAP_VPATH

(

n

)

vxge_mBIT(n)

Definition at line 2924 of file vxge_reg.h.

#define VXGE_HW_LAG_MARKER_CFG_GEN_RCVR_EN   vxge_mBIT(3)

Definition at line 2926 of file vxge_reg.h.

#define VXGE_HW_LAG_MARKER_CFG_RESP_EN   vxge_mBIT(7)

Definition at line 2927 of file vxge_reg.h.

#define VXGE_HW_LAG_MARKER_CFG_RESP_TIMEOUT

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 2928 of file vxge_reg.h.

#define VXGE_HW_LAG_MARKER_CFG_SLOW_PROTO_MRKR_MIN_INTERVAL

(

val

)

vxge_vBIT(val, 32, 16)

Definition at line 2929 of file vxge_reg.h.

#define VXGE_HW_LAG_MARKER_CFG_THROTTLE_MRKR_RESP   vxge_mBIT(51)

Definition at line 2931 of file vxge_reg.h.

#define VXGE_HW_LAG_TX_CFG_INCR_TX_AGGR_STATS   vxge_mBIT(3)

Definition at line 2933 of file vxge_reg.h.

#define VXGE_HW_LAG_TX_CFG_DISTRIB_ALG_SEL

(

val

)

vxge_vBIT(val, 6, 2)

Definition at line 2934 of file vxge_reg.h.

#define VXGE_HW_LAG_TX_CFG_DISTRIB_REMAP_IF_FAIL   vxge_mBIT(11)

Definition at line 2935 of file vxge_reg.h.

#define VXGE_HW_LAG_TX_CFG_COLL_MAX_DELAY

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 2936 of file vxge_reg.h.

#define VXGE_HW_LAG_TX_STATUS_TLAG_TIMER_VAL_EMPTIED_LINK

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 2938 of file vxge_reg.h.

#define VXGE_HW_LAG_TX_STATUS_TLAG_TIMER_VAL_SLOW_PROTO_MRKR

(

val

)

vxge_vBIT(val, 8, 8)

Definition at line 2940 of file vxge_reg.h.

#define VXGE_HW_LAG_TX_STATUS_TLAG_TIMER_VAL_SLOW_PROTO_MRKRRESP

(

val

)

vxge_vBIT(val, 16, 8)

Definition at line 2942 of file vxge_reg.h.

#define VXGE_HAL_SRPCIM_TO_MRPCIM_VPLANE_RMSG_SWIF_SRPCIM_TO_MRPCIM_VPLANE_RMSG

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 2948 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_TO_SRPCIM_VPLANE_WMSG_MRPCIM_TO_SRPCIM_VPLANE_WMSG

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 2953 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS0_RSTDROP_MSG

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 2958 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS0_RSTDROP_CPL

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 2959 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS1_RSTDROP_CLIENT0

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 2961 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS1_RSTDROP_CLIENT1

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 2962 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS2_RSTDROP_CLIENT2

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 2964 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS3_VPLANE_DEPL_PH

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 2966 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS3_VPLANE_DEPL_NPH

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 2967 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS3_VPLANE_DEPL_CPLH

(

val

)

vxge_vBIT(val, 32, 16)

Definition at line 2968 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS4_VPLANE_DEPL_PD

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 2970 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS4_VPLANE_DEPL_NPD

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 2971 of file vxge_reg.h.

#define VXGE_HW_DEBUG_STATS4_VPLANE_DEPL_CPLD

(

val

)

vxge_vBIT(val, 32, 16)

Definition at line 2972 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_PIC_INT   vxge_mBIT(0)

Definition at line 2977 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_PCI_INT   vxge_mBIT(1)

Definition at line 2978 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_RTDMA_INT   vxge_mBIT(2)

Definition at line 2979 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_WRDMA_INT   vxge_mBIT(3)

Definition at line 2980 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_G3CMCT_INT   vxge_mBIT(4)

Definition at line 2981 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_GCMG1_INT   vxge_mBIT(5)

Definition at line 2982 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_GCMG2_INT   vxge_mBIT(6)

Definition at line 2983 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_GCMG3_INT   vxge_mBIT(7)

Definition at line 2984 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_G3CMIFL_INT   vxge_mBIT(8)

Definition at line 2985 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_G3CMIFU_INT   vxge_mBIT(9)

Definition at line 2986 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_PCMG1_INT   vxge_mBIT(10)

Definition at line 2987 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_PCMG2_INT   vxge_mBIT(11)

Definition at line 2988 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_PCMG3_INT   vxge_mBIT(12)

Definition at line 2989 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_XMAC_INT   vxge_mBIT(13)

Definition at line 2990 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_RXMAC_INT   vxge_mBIT(14)

Definition at line 2991 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_TMAC_INT   vxge_mBIT(15)

Definition at line 2992 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_G3FBIF_INT   vxge_mBIT(16)

Definition at line 2993 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_FBMC_INT   vxge_mBIT(17)

Definition at line 2994 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_G3FBCT_INT   vxge_mBIT(18)

Definition at line 2995 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_TPA_INT   vxge_mBIT(19)

Definition at line 2996 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_DRBELL_INT   vxge_mBIT(20)

Definition at line 2997 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_ONE_INT   vxge_mBIT(21)

Definition at line 2998 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_STATUS_MSG_INT   vxge_mBIT(22)

Definition at line 2999 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_PIC_INT   vxge_mBIT(0)

Definition at line 3001 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_PCI_INT   vxge_mBIT(1)

Definition at line 3002 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_RTDMA_INT   vxge_mBIT(2)

Definition at line 3003 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_WRDMA_INT   vxge_mBIT(3)

Definition at line 3004 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_G3CMCT_INT   vxge_mBIT(4)

Definition at line 3005 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_GCMG1_INT   vxge_mBIT(5)

Definition at line 3006 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_GCMG2_INT   vxge_mBIT(6)

Definition at line 3007 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_GCMG3_INT   vxge_mBIT(7)

Definition at line 3008 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_G3CMIFL_INT   vxge_mBIT(8)

Definition at line 3009 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_G3CMIFU_INT   vxge_mBIT(9)

Definition at line 3010 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_PCMG1_INT   vxge_mBIT(10)

Definition at line 3011 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_PCMG2_INT   vxge_mBIT(11)

Definition at line 3012 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_PCMG3_INT   vxge_mBIT(12)

Definition at line 3013 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_XMAC_INT   vxge_mBIT(13)

Definition at line 3014 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_RXMAC_INT   vxge_mBIT(14)

Definition at line 3015 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_TMAC_INT   vxge_mBIT(15)

Definition at line 3016 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_G3FBIF_INT   vxge_mBIT(16)

Definition at line 3017 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_FBMC_INT   vxge_mBIT(17)

Definition at line 3018 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_G3FBCT_INT   vxge_mBIT(18)

Definition at line 3019 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_TPA_INT   vxge_mBIT(19)

Definition at line 3020 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_DRBELL_INT   vxge_mBIT(20)

Definition at line 3021 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_ONE_INT   vxge_mBIT(21)

Definition at line 3022 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_INT_MASK_MSG_INT   vxge_mBIT(22)

Definition at line 3023 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_INI_ERRORS_INI_INT   vxge_mBIT(3)

Definition at line 3025 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_DMA_ERRORS_DMA_INT   vxge_mBIT(7)

Definition at line 3026 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_TGT_ERRORS_TGT_INT   vxge_mBIT(11)

Definition at line 3027 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CONFIG_ERRORS_CONFIG_INT   vxge_mBIT(15)

Definition at line 3028 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_CRDT_INT   vxge_mBIT(19)

Definition at line 3029 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_PLL_ERRORS_PLL_INT   vxge_mBIT(27)

Definition at line 3030 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE0_CRD_INT_VPLANE0_INT   vxge_mBIT(31)

Definition at line 3031 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE1_CRD_INT_VPLANE1_INT   vxge_mBIT(32)

Definition at line 3033 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE2_CRD_INT_VPLANE2_INT   vxge_mBIT(33)

Definition at line 3035 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE3_CRD_INT_VPLANE3_INT   vxge_mBIT(34)

Definition at line 3037 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE4_CRD_INT_VPLANE4_INT   vxge_mBIT(35)

Definition at line 3039 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE5_CRD_INT_VPLANE5_INT   vxge_mBIT(36)

Definition at line 3041 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE6_CRD_INT_VPLANE6_INT   vxge_mBIT(37)

Definition at line 3043 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE7_CRD_INT_VPLANE7_INT   vxge_mBIT(38)

Definition at line 3045 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE8_CRD_INT_VPLANE8_INT   vxge_mBIT(39)

Definition at line 3047 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE9_CRD_INT_VPLANE9_INT   vxge_mBIT(40)

Definition at line 3049 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE10_CRD_INT_VPLANE10_INT   vxge_mBIT(41)

Definition at line 3052 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE11_CRD_INT_VPLANE11_INT   vxge_mBIT(42)

Definition at line 3055 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE12_CRD_INT_VPLANE12_INT   vxge_mBIT(43)

Definition at line 3058 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE13_CRD_INT_VPLANE13_INT   vxge_mBIT(44)

Definition at line 3061 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE14_CRD_INT_VPLANE14_INT   vxge_mBIT(45)

Definition at line 3064 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE15_CRD_INT_VPLANE15_INT   vxge_mBIT(46)

Definition at line 3067 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_CRDT_ERRORS_VPLANE16_CRD_INT_VPLANE16_INT   vxge_mBIT(47)

Definition at line 3070 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_PPIF_INT_STATUS_VPATH_TO_MRPCIM_ALARM_VPATH_TO_MRPCIM_ALARM_INT   vxge_mBIT(55)

Definition at line 3073 of file vxge_reg.h.

#define VXGE_HW_INI_ERRORS_REG_SCPL_CPL_TIMEOUT_UNUSED_TAG   vxge_mBIT(3)

Definition at line 3079 of file vxge_reg.h.

#define VXGE_HW_INI_ERRORS_REG_SCPL_CPL_TIMEOUT   vxge_mBIT(7)

Definition at line 3080 of file vxge_reg.h.

#define VXGE_HW_INI_ERRORS_REG_DCPL_FSM_ERR   vxge_mBIT(11)

Definition at line 3081 of file vxge_reg.h.

#define VXGE_HW_INI_ERRORS_REG_DCPL_POISON   vxge_mBIT(12)

Definition at line 3082 of file vxge_reg.h.

#define VXGE_HW_INI_ERRORS_REG_DCPL_UNSUPPORTED   vxge_mBIT(15)

Definition at line 3083 of file vxge_reg.h.

#define VXGE_HW_INI_ERRORS_REG_DCPL_ABORT   vxge_mBIT(19)

Definition at line 3084 of file vxge_reg.h.

#define VXGE_HW_INI_ERRORS_REG_INI_TLP_ABORT   vxge_mBIT(23)

Definition at line 3085 of file vxge_reg.h.

#define VXGE_HW_INI_ERRORS_REG_INI_DLLP_ABORT   vxge_mBIT(27)

Definition at line 3086 of file vxge_reg.h.

#define VXGE_HW_INI_ERRORS_REG_INI_ECRC_ERR   vxge_mBIT(31)

Definition at line 3087 of file vxge_reg.h.

#define VXGE_HW_INI_ERRORS_REG_INI_BUF_DB_ERR   vxge_mBIT(35)

Definition at line 3088 of file vxge_reg.h.

#define VXGE_HW_INI_ERRORS_REG_INI_BUF_SG_ERR   vxge_mBIT(39)

Definition at line 3089 of file vxge_reg.h.

#define VXGE_HW_INI_ERRORS_REG_INI_DATA_OVERFLOW   vxge_mBIT(43)

Definition at line 3090 of file vxge_reg.h.

#define VXGE_HW_INI_ERRORS_REG_INI_HDR_OVERFLOW   vxge_mBIT(47)

Definition at line 3091 of file vxge_reg.h.

#define VXGE_HW_INI_ERRORS_REG_INI_MRD_SYS_DROP   vxge_mBIT(51)

Definition at line 3092 of file vxge_reg.h.

#define VXGE_HW_INI_ERRORS_REG_INI_MWR_SYS_DROP   vxge_mBIT(55)

Definition at line 3093 of file vxge_reg.h.

#define VXGE_HW_INI_ERRORS_REG_INI_MRD_CLIENT_DROP   vxge_mBIT(59)

Definition at line 3094 of file vxge_reg.h.

#define VXGE_HW_INI_ERRORS_REG_INI_MWR_CLIENT_DROP   vxge_mBIT(63)

Definition at line 3095 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_RDARB_FSM_ERR   vxge_mBIT(3)

Definition at line 3099 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_WRARB_FSM_ERR   vxge_mBIT(7)

Definition at line 3100 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_WRDMA_WR_HDR_OVERFLOW   vxge_mBIT(8)

Definition at line 3101 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_WRDMA_WR_HDR_UNDERFLOW   vxge_mBIT(9)

Definition at line 3102 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_WRDMA_WR_DATA_OVERFLOW   vxge_mBIT(10)

Definition at line 3103 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_WRDMA_WR_DATA_UNDERFLOW   vxge_mBIT(11)

Definition at line 3104 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_MSG_WR_HDR_OVERFLOW   vxge_mBIT(12)

Definition at line 3105 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_MSG_WR_HDR_UNDERFLOW   vxge_mBIT(13)

Definition at line 3106 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_MSG_WR_DATA_OVERFLOW   vxge_mBIT(14)

Definition at line 3107 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_MSG_WR_DATA_UNDERFLOW   vxge_mBIT(15)

Definition at line 3108 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_STATS_WR_HDR_OVERFLOW   vxge_mBIT(16)

Definition at line 3109 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_STATS_WR_HDR_UNDERFLOW   vxge_mBIT(17)

Definition at line 3110 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_STATS_WR_DATA_OVERFLOW   vxge_mBIT(18)

Definition at line 3111 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_STATS_WR_DATA_UNDERFLOW   vxge_mBIT(19)

Definition at line 3112 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_RTDMA_WR_HDR_OVERFLOW   vxge_mBIT(20)

Definition at line 3113 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_RTDMA_WR_HDR_UNDERFLOW   vxge_mBIT(21)

Definition at line 3114 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_RTDMA_WR_DATA_OVERFLOW   vxge_mBIT(22)

Definition at line 3115 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_RTDMA_WR_DATA_UNDERFLOW   vxge_mBIT(23)

Definition at line 3116 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_WRDMA_RD_HDR_OVERFLOW   vxge_mBIT(24)

Definition at line 3117 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_WRDMA_RD_HDR_UNDERFLOW   vxge_mBIT(25)

Definition at line 3118 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_RTDMA_RD_HDR_OVERFLOW   vxge_mBIT(28)

Definition at line 3119 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DMA_RTDMA_RD_HDR_UNDERFLOW   vxge_mBIT(29)

Definition at line 3120 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DBLGEN_FSM_ERR   vxge_mBIT(32)

Definition at line 3121 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DBLGEN_CREDIT_FSM_ERR   vxge_mBIT(33)

Definition at line 3122 of file vxge_reg.h.

#define VXGE_HW_DMA_ERRORS_REG_DBLGEN_DMA_WRR_SM_ERR   vxge_mBIT(34)

Definition at line 3123 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_VENDOR_MSG   vxge_mBIT(0)

Definition at line 3127 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_MSG_UNLOCK   vxge_mBIT(1)

Definition at line 3128 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_ILLEGAL_TLP_BE   vxge_mBIT(2)

Definition at line 3129 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_BOOT_WRITE   vxge_mBIT(3)

Definition at line 3130 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_PIF_WR_CROSS_QWRANGE   vxge_mBIT(4)

Definition at line 3131 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_PIF_READ_CROSS_QWRANGE   vxge_mBIT(5)

Definition at line 3132 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_KDFC_READ   vxge_mBIT(6)

Definition at line 3133 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_USDC_READ   vxge_mBIT(7)

Definition at line 3134 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_USDC_WR_CROSS_QWRANGE   vxge_mBIT(8)

Definition at line 3135 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_MSIX_BEYOND_RANGE   vxge_mBIT(9)

Definition at line 3136 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_WR_TO_KDFC_POISON   vxge_mBIT(10)

Definition at line 3137 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_WR_TO_USDC_POISON   vxge_mBIT(11)

Definition at line 3138 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_WR_TO_PIF_POISON   vxge_mBIT(12)

Definition at line 3139 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_WR_TO_MSIX_POISON   vxge_mBIT(13)

Definition at line 3140 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_WR_TO_MRIOV_POISON   vxge_mBIT(14)

Definition at line 3141 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_NOT_MEM_TLP   vxge_mBIT(15)

Definition at line 3142 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_UNKNOWN_MEM_TLP   vxge_mBIT(16)

Definition at line 3143 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_REQ_FSM_ERR   vxge_mBIT(17)

Definition at line 3144 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_CPL_FSM_ERR   vxge_mBIT(18)

Definition at line 3145 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_KDFC_PROT_ERR   vxge_mBIT(19)

Definition at line 3146 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_SWIF_PROT_ERR   vxge_mBIT(20)

Definition at line 3147 of file vxge_reg.h.

#define VXGE_HW_TGT_ERRORS_REG_TGT_MRIOV_MEM_MAP_CFG_ERR   vxge_mBIT(21)

Definition at line 3148 of file vxge_reg.h.

#define VXGE_HW_CONFIG_ERRORS_REG_I2C_ILLEGAL_STOP_COND   vxge_mBIT(3)

Definition at line 3152 of file vxge_reg.h.

#define VXGE_HW_CONFIG_ERRORS_REG_I2C_ILLEGAL_START_COND   vxge_mBIT(7)

Definition at line 3153 of file vxge_reg.h.

#define VXGE_HW_CONFIG_ERRORS_REG_I2C_EXP_RD_CNT   vxge_mBIT(11)

Definition at line 3154 of file vxge_reg.h.

#define VXGE_HW_CONFIG_ERRORS_REG_I2C_EXTRA_CYCLE   vxge_mBIT(15)

Definition at line 3155 of file vxge_reg.h.

#define VXGE_HW_CONFIG_ERRORS_REG_I2C_MAIN_FSM_ERR   vxge_mBIT(19)

Definition at line 3156 of file vxge_reg.h.

#define VXGE_HW_CONFIG_ERRORS_REG_I2C_REQ_COLLISION   vxge_mBIT(23)

Definition at line 3157 of file vxge_reg.h.

#define VXGE_HW_CONFIG_ERRORS_REG_I2C_REG_FSM_ERR   vxge_mBIT(27)

Definition at line 3158 of file vxge_reg.h.

#define VXGE_HW_CONFIG_ERRORS_REG_CFGM_I2C_TIMEOUT   vxge_mBIT(31)

Definition at line 3159 of file vxge_reg.h.

#define VXGE_HW_CONFIG_ERRORS_REG_RIC_I2C_TIMEOUT   vxge_mBIT(35)

Definition at line 3160 of file vxge_reg.h.

#define VXGE_HW_CONFIG_ERRORS_REG_CFGM_FSM_ERR   vxge_mBIT(39)

Definition at line 3161 of file vxge_reg.h.

#define VXGE_HW_CONFIG_ERRORS_REG_RIC_FSM_ERR   vxge_mBIT(43)

Definition at line 3162 of file vxge_reg.h.

#define VXGE_HW_CONFIG_ERRORS_REG_PIFM_ILLEGAL_ACCESS   vxge_mBIT(47)

Definition at line 3163 of file vxge_reg.h.

#define VXGE_HW_CONFIG_ERRORS_REG_PIFM_TIMEOUT   vxge_mBIT(51)

Definition at line 3164 of file vxge_reg.h.

#define VXGE_HW_CONFIG_ERRORS_REG_PIFM_FSM_ERR   vxge_mBIT(55)

Definition at line 3165 of file vxge_reg.h.

#define VXGE_HW_CONFIG_ERRORS_REG_PIFM_TO_FSM_ERR   vxge_mBIT(59)

Definition at line 3166 of file vxge_reg.h.

#define VXGE_HW_CONFIG_ERRORS_REG_RIC_RIC_RD_TIMEOUT   vxge_mBIT(63)

Definition at line 3167 of file vxge_reg.h.

#define VXGE_HW_CRDT_ERRORS_REG_WRCRDTARB_FSM_ERR   vxge_mBIT(11)

Definition at line 3173 of file vxge_reg.h.

#define VXGE_HW_CRDT_ERRORS_REG_WRCRDTARB_INTCTL_ILLEGAL_CRD_DEAL   vxge_mBIT(15)

Definition at line 3174 of file vxge_reg.h.

#define VXGE_HW_CRDT_ERRORS_REG_WRCRDTARB_PDA_ILLEGAL_CRD_DEAL   vxge_mBIT(19)

Definition at line 3176 of file vxge_reg.h.

#define VXGE_HW_CRDT_ERRORS_REG_WRCRDTARB_PCI_MSG_ILLEGAL_CRD_DEAL   vxge_mBIT(23)

Definition at line 3177 of file vxge_reg.h.

#define VXGE_HW_CRDT_ERRORS_REG_RDCRDTARB_FSM_ERR   vxge_mBIT(35)

Definition at line 3179 of file vxge_reg.h.

#define VXGE_HW_CRDT_ERRORS_REG_RDCRDTARB_RDA_ILLEGAL_CRD_DEAL   vxge_mBIT(39)

Definition at line 3180 of file vxge_reg.h.

#define VXGE_HW_CRDT_ERRORS_REG_RDCRDTARB_PDA_ILLEGAL_CRD_DEAL   vxge_mBIT(43)

Definition at line 3181 of file vxge_reg.h.

#define VXGE_HW_CRDT_ERRORS_REG_RDCRDTARB_DBLGEN_ILLEGAL_CRD_DEAL   vxge_mBIT(47)

Definition at line 3182 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_STATSB_FSM_ERR   vxge_mBIT(3)

Definition at line 3189 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_XGEN_FSM_ERR   vxge_mBIT(7)

Definition at line 3190 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_XMEM_FSM_ERR   vxge_mBIT(11)

Definition at line 3191 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_KDFCCTL_FSM_ERR   vxge_mBIT(15)

Definition at line 3192 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_MRIOVCTL_FSM_ERR   vxge_mBIT(19)

Definition at line 3193 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_SPI_FLSH_ERR   vxge_mBIT(23)

Definition at line 3194 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_SPI_IIC_ACK_ERR   vxge_mBIT(27)

Definition at line 3195 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_SPI_IIC_CHKSUM_ERR   vxge_mBIT(31)

Definition at line 3196 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_INI_SERR_DET   vxge_mBIT(35)

Definition at line 3197 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_INTCTL_MSIX_FSM_ERR   vxge_mBIT(39)

Definition at line 3198 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_INTCTL_MSI_OVERFLOW   vxge_mBIT(43)

Definition at line 3199 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_PPIF_PCI_NOT_FLUSH_DURING_SW_RESET   vxge_mBIT(47)

Definition at line 3200 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_ERRORS_REG_PPIF_SW_RESET_FSM_ERR   vxge_mBIT(51)

Definition at line 3202 of file vxge_reg.h.

#define VXGE_HW_PLL_ERRORS_REG_CORE_CMG_PLL_OOL   vxge_mBIT(3)

Definition at line 3208 of file vxge_reg.h.

#define VXGE_HW_PLL_ERRORS_REG_CORE_FB_PLL_OOL   vxge_mBIT(7)

Definition at line 3209 of file vxge_reg.h.

#define VXGE_HW_PLL_ERRORS_REG_CORE_X_PLL_OOL   vxge_mBIT(11)

Definition at line 3210 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_TO_MRPCIM_ALARM_REG_PPIF_SRPCIM_TO_MRPCIM_ALARM

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 3214 of file vxge_reg.h.

#define VXGE_HW_VPATH_TO_MRPCIM_ALARM_REG_PPIF_VPATH_TO_MRPCIM_ALARM

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 3219 of file vxge_reg.h.

#define VXGE_HW_CRDT_ERRORS_VPLANE_REG_WRCRDTARB_P_H_CONSUME_CRDT_ERR   vxge_mBIT(3)

Definition at line 3226 of file vxge_reg.h.

#define VXGE_HW_CRDT_ERRORS_VPLANE_REG_WRCRDTARB_P_D_CONSUME_CRDT_ERR   vxge_mBIT(7)

Definition at line 3228 of file vxge_reg.h.

#define VXGE_HW_CRDT_ERRORS_VPLANE_REG_WRCRDTARB_P_H_RETURN_CRDT_ERR   vxge_mBIT(11)

Definition at line 3230 of file vxge_reg.h.

#define VXGE_HW_CRDT_ERRORS_VPLANE_REG_WRCRDTARB_P_D_RETURN_CRDT_ERR   vxge_mBIT(15)

Definition at line 3232 of file vxge_reg.h.

#define VXGE_HW_CRDT_ERRORS_VPLANE_REG_RDCRDTARB_NP_H_CONSUME_CRDT_ERR   vxge_mBIT(19)

Definition at line 3234 of file vxge_reg.h.

#define VXGE_HW_CRDT_ERRORS_VPLANE_REG_RDCRDTARB_NP_H_RETURN_CRDT_ERR   vxge_mBIT(23)

Definition at line 3236 of file vxge_reg.h.

#define VXGE_HW_CRDT_ERRORS_VPLANE_REG_RDCRDTARB_TAG_CONSUME_TAG_ERR   vxge_mBIT(27)

Definition at line 3238 of file vxge_reg.h.

#define VXGE_HW_CRDT_ERRORS_VPLANE_REG_RDCRDTARB_TAG_RETURN_TAG_ERR   vxge_mBIT(31)

Definition at line 3240 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_RST_IN_PROG_MRPCIM_RST_IN_PROG   vxge_mBIT(7)

Definition at line 3247 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_REG_MODIFIED_MRPCIM_REG_MODIFIED   vxge_mBIT(7)

Definition at line 3249 of file vxge_reg.h.

#define VXGE_HW_WRITE_ARB_PENDING_WRARB_WRDMA   vxge_mBIT(3)

Definition at line 3254 of file vxge_reg.h.

#define VXGE_HW_WRITE_ARB_PENDING_WRARB_RTDMA   vxge_mBIT(7)

Definition at line 3255 of file vxge_reg.h.

#define VXGE_HW_WRITE_ARB_PENDING_WRARB_MSG   vxge_mBIT(11)

Definition at line 3256 of file vxge_reg.h.

#define VXGE_HW_WRITE_ARB_PENDING_WRARB_STATSB   vxge_mBIT(15)

Definition at line 3257 of file vxge_reg.h.

#define VXGE_HW_WRITE_ARB_PENDING_WRARB_INTCTL   vxge_mBIT(19)

Definition at line 3258 of file vxge_reg.h.

#define VXGE_HW_READ_ARB_PENDING_RDARB_WRDMA   vxge_mBIT(3)

Definition at line 3260 of file vxge_reg.h.

#define VXGE_HW_READ_ARB_PENDING_RDARB_RTDMA   vxge_mBIT(7)

Definition at line 3261 of file vxge_reg.h.

#define VXGE_HW_READ_ARB_PENDING_RDARB_DBLGEN   vxge_mBIT(11)

Definition at line 3262 of file vxge_reg.h.

#define VXGE_HW_DMAIF_DMADBL_PENDING_DMAIF_WRDMA_WR   vxge_mBIT(0)

Definition at line 3264 of file vxge_reg.h.

#define VXGE_HW_DMAIF_DMADBL_PENDING_DMAIF_WRDMA_RD   vxge_mBIT(1)

Definition at line 3265 of file vxge_reg.h.

#define VXGE_HW_DMAIF_DMADBL_PENDING_DMAIF_RTDMA_WR   vxge_mBIT(2)

Definition at line 3266 of file vxge_reg.h.

#define VXGE_HW_DMAIF_DMADBL_PENDING_DMAIF_RTDMA_RD   vxge_mBIT(3)

Definition at line 3267 of file vxge_reg.h.

#define VXGE_HW_DMAIF_DMADBL_PENDING_DMAIF_MSG_WR   vxge_mBIT(4)

Definition at line 3268 of file vxge_reg.h.

#define VXGE_HW_DMAIF_DMADBL_PENDING_DMAIF_STATS_WR   vxge_mBIT(5)

Definition at line 3269 of file vxge_reg.h.

#define VXGE_HW_DMAIF_DMADBL_PENDING_DBLGEN_IN_PROG

(

val

)

vxge_vBIT(val, 13, 51)

Definition at line 3270 of file vxge_reg.h.

#define VXGE_HW_WRCRDTARB_STATUS0_VPLANE_WRCRDTARB_ABS_AVAIL_P_H

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 3273 of file vxge_reg.h.

#define VXGE_HW_WRCRDTARB_STATUS1_VPLANE_WRCRDTARB_ABS_AVAIL_P_D

(

val

)

vxge_vBIT(val, 4, 12)

Definition at line 3276 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG1_CLEAR_SERR   vxge_mBIT(7)

Definition at line 3281 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG2_INS_TX_WR_TD   vxge_mBIT(3)

Definition at line 3283 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG2_INS_TX_RD_TD   vxge_mBIT(7)

Definition at line 3284 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG2_INS_TX_CPL_TD   vxge_mBIT(11)

Definition at line 3285 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG2_INI_TIMEOUT_EN_MWR   vxge_mBIT(15)

Definition at line 3286 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG2_INI_TIMEOUT_EN_MRD   vxge_mBIT(19)

Definition at line 3287 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG2_IGNORE_VPATH_RST_FOR_MSIX   vxge_mBIT(23)

Definition at line 3288 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG2_FLASH_READ_MSB   vxge_mBIT(27)

Definition at line 3289 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG2_DIS_HOST_PIPELINE_WR   vxge_mBIT(31)

Definition at line 3290 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG2_MRPCIM_STATS_ENABLE   vxge_mBIT(43)

Definition at line 3291 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG2_MRPCIM_STATS_MAP_TO_VPATH

(

val

)

vxge_vBIT(val, 47, 5)

Definition at line 3292 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG2_EN_BLOCK_MSIX_DUE_TO_SERR   vxge_mBIT(55)

Definition at line 3294 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG2_FORCE_SENDING_INTA   vxge_mBIT(59)

Definition at line 3295 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG2_DIS_SWIF_PROT_ON_RDS   vxge_mBIT(63)

Definition at line 3296 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG3_PROTECTION_CA_OR_UNSUPN   vxge_mBIT(0)

Definition at line 3298 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG3_ILLEGAL_RD_CA_OR_UNSUPN   vxge_mBIT(3)

Definition at line 3299 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG3_RD_BYTE_SWAPEN   vxge_mBIT(7)

Definition at line 3300 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG3_RD_BIT_FLIPEN   vxge_mBIT(11)

Definition at line 3301 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG3_WR_BYTE_SWAPEN   vxge_mBIT(15)

Definition at line 3302 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG3_WR_BIT_FLIPEN   vxge_mBIT(19)

Definition at line 3303 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG3_MR_MAX_MVFS

(

val

)

vxge_vBIT(val, 20, 16)

Definition at line 3304 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG3_MR_MVF_TBL_SIZE

(

val

)

vxge_vBIT(val, 36, 16)

Definition at line 3305 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG3_PF0_SW_RESET_EN   vxge_mBIT(55)

Definition at line 3307 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG3_REG_MODIFIED_CFG

(

val

)

vxge_vBIT(val, 56, 2)

Definition at line 3308 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG3_CPL_ECC_ENABLE_N   vxge_mBIT(59)

Definition at line 3309 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_GENERAL_CFG3_BYPASS_DAISY_CHAIN   vxge_mBIT(63)

Definition at line 3310 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_STATS_START_HOST_ADDR_MRPCIM_STATS_START_HOST_ADDR

(

val

)

vxge_vBIT(val, 0, 57)

Definition at line 3312 of file vxge_reg.h.

#define VXGE_HW_RDCRDTARB_CFG0_RDA_MAX_OUTSTANDING_RDS

(

val

)

vxge_vBIT(val, 18, 6)

Definition at line 3318 of file vxge_reg.h.

#define VXGE_HW_RDCRDTARB_CFG0_PDA_MAX_OUTSTANDING_RDS

(

val

)

vxge_vBIT(val, 26, 6)

Definition at line 3320 of file vxge_reg.h.

#define VXGE_HW_RDCRDTARB_CFG0_DBLGEN_MAX_OUTSTANDING_RDS

(

val

)

vxge_vBIT(val, 34, 6)

Definition at line 3322 of file vxge_reg.h.

#define VXGE_HW_RDCRDTARB_CFG0_WAIT_CNT

(

val

)

vxge_vBIT(val, 48, 4)

Definition at line 3324 of file vxge_reg.h.

#define VXGE_HW_RDCRDTARB_CFG0_MAX_OUTSTANDING_RDS

(

val

)

vxge_vBIT(val, 54, 6)

Definition at line 3325 of file vxge_reg.h.

#define VXGE_HW_RDCRDTARB_CFG0_EN_XON   vxge_mBIT(63)

Definition at line 3326 of file vxge_reg.h.

#define VXGE_HW_BF_SW_RESET_BF_SW_RESET

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 3330 of file vxge_reg.h.

#define VXGE_HW_SW_RESET_STATUS_RESET_CMPLT   vxge_mBIT(7)

Definition at line 3332 of file vxge_reg.h.

#define VXGE_HW_SW_RESET_STATUS_INIT_CMPLT   vxge_mBIT(15)

Definition at line 3333 of file vxge_reg.h.

#define VXGE_HW_SW_RESET_CFG1_TYPE   vxge_mBIT(0)

Definition at line 3337 of file vxge_reg.h.

#define VXGE_HW_SW_RESET_CFG1_WAIT_TIME_FOR_FLUSH_PCI

(

val

)

vxge_vBIT(val, 7, 25)

Definition at line 3338 of file vxge_reg.h.

#define VXGE_HW_SW_RESET_CFG1_SOPR_ASSERT_TIME

(

val

)

vxge_vBIT(val, 32, 4)

Definition at line 3340 of file vxge_reg.h.

#define VXGE_HW_SW_RESET_CFG1_WAIT_TIME_AFTER_RESET

(

val

)

vxge_vBIT(val, 38, 25)

Definition at line 3341 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_DEBUG_STATS0_INI_WR_DROP

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 3346 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_DEBUG_STATS0_INI_RD_DROP

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 3347 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_DEBUG_STATS1_VPLANE_WRCRDTARB_PH_CRDT_DEPLETED

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 3349 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_DEBUG_STATS2_VPLANE_WRCRDTARB_PD_CRDT_DEPLETED

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 3352 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_DEBUG_STATS3_VPLANE_RDCRDTARB_NPH_CRDT_DEPLETED

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 3355 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_DEBUG_STATS4_INI_WR_VPIN_DROP

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 3358 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_DEBUG_STATS4_INI_RD_VPIN_DROP

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 3359 of file vxge_reg.h.

#define VXGE_HW_GENSTATS_COUNT01_GENSTATS_COUNT1

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 3362 of file vxge_reg.h.

#define VXGE_HW_GENSTATS_COUNT01_GENSTATS_COUNT0

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 3363 of file vxge_reg.h.

#define VXGE_HW_GENSTATS_COUNT23_GENSTATS_COUNT3

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 3365 of file vxge_reg.h.

#define VXGE_HW_GENSTATS_COUNT23_GENSTATS_COUNT2

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 3366 of file vxge_reg.h.

#define VXGE_HW_GENSTATS_COUNT4_GENSTATS_COUNT4

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 3368 of file vxge_reg.h.

#define VXGE_HW_GENSTATS_COUNT5_GENSTATS_COUNT5

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 3370 of file vxge_reg.h.

#define VXGE_HW_GENSTATS_CFG_DTYPE_SEL

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 3375 of file vxge_reg.h.

#define VXGE_HW_GENSTATS_CFG_CLIENT_NO_SEL

(

val

)

vxge_vBIT(val, 9, 3)

Definition at line 3376 of file vxge_reg.h.

#define VXGE_HW_GENSTATS_CFG_WR_RD_CPL_SEL

(

val

)

vxge_vBIT(val, 14, 2)

Definition at line 3377 of file vxge_reg.h.

#define VXGE_HW_GENSTATS_CFG_VPATH_SEL

(

val

)

vxge_vBIT(val, 31, 17)

Definition at line 3378 of file vxge_reg.h.

#define VXGE_HW_GENSTAT_64BIT_CFG_EN_FOR_GENSTATS0   vxge_mBIT(3)

Definition at line 3380 of file vxge_reg.h.

#define VXGE_HW_GENSTAT_64BIT_CFG_EN_FOR_GENSTATS2   vxge_mBIT(7)

Definition at line 3381 of file vxge_reg.h.

#define VXGE_HW_GCMG3_INT_STATUS_GSTC_ERR0_GSTC0_INT   vxge_mBIT(0)

Definition at line 3384 of file vxge_reg.h.

#define VXGE_HW_GCMG3_INT_STATUS_GSTC_ERR1_GSTC1_INT   vxge_mBIT(1)

Definition at line 3385 of file vxge_reg.h.

#define VXGE_HW_GCMG3_INT_STATUS_GH2L_ERR0_GH2L0_INT   vxge_mBIT(2)

Definition at line 3386 of file vxge_reg.h.

#define VXGE_HW_GCMG3_INT_STATUS_GHSQ_ERR_GH2L1_INT   vxge_mBIT(3)

Definition at line 3387 of file vxge_reg.h.

#define VXGE_HW_GCMG3_INT_STATUS_GHSQ_ERR2_GH2L2_INT   vxge_mBIT(4)

Definition at line 3388 of file vxge_reg.h.

#define VXGE_HW_GCMG3_INT_STATUS_GH2L_SMERR0_GH2L3_INT   vxge_mBIT(5)

Definition at line 3389 of file vxge_reg.h.

#define VXGE_HW_GCMG3_INT_STATUS_GHSQ_ERR3_GH2L4_INT   vxge_mBIT(6)

Definition at line 3390 of file vxge_reg.h.

#define VXGE_HW_G3IFCMD_FB_INT_STATUS_ERR_G3IF_INT   vxge_mBIT(0)

Definition at line 3395 of file vxge_reg.h.

#define VXGE_HW_G3IFCMD_FB_ERR_REG_G3IF_CK_DLL_LOCK   vxge_mBIT(6)

Definition at line 3398 of file vxge_reg.h.

#define VXGE_HW_G3IFCMD_FB_ERR_REG_G3IF_SM_ERR   vxge_mBIT(7)

Definition at line 3399 of file vxge_reg.h.

#define VXGE_HW_G3IFCMD_FB_ERR_REG_G3IF_RWDQS_DLL_LOCK

(

val

)

vxge_vBIT(val, 24, 8)

Definition at line 3400 of file vxge_reg.h.

#define VXGE_HW_G3IFCMD_FB_ERR_REG_G3IF_IOCAL_FAULT   vxge_mBIT(55)

Definition at line 3402 of file vxge_reg.h.

#define VXGE_HW_G3IFCMD_CMU_INT_STATUS_ERR_G3IF_INT   vxge_mBIT(0)

Definition at line 3409 of file vxge_reg.h.

#define VXGE_HW_G3IFCMD_CMU_ERR_REG_G3IF_CK_DLL_LOCK   vxge_mBIT(6)

Definition at line 3412 of file vxge_reg.h.

#define VXGE_HW_G3IFCMD_CMU_ERR_REG_G3IF_SM_ERR   vxge_mBIT(7)

Definition at line 3413 of file vxge_reg.h.

#define VXGE_HW_G3IFCMD_CMU_ERR_REG_G3IF_RWDQS_DLL_LOCK

(

val

)

vxge_vBIT(val, 24, 8)

Definition at line 3414 of file vxge_reg.h.

#define VXGE_HW_G3IFCMD_CMU_ERR_REG_G3IF_IOCAL_FAULT   vxge_mBIT(55)

Definition at line 3416 of file vxge_reg.h.

#define VXGE_HW_G3IFCMD_CML_INT_STATUS_ERR_G3IF_INT   vxge_mBIT(0)

Definition at line 3423 of file vxge_reg.h.

#define VXGE_HW_G3IFCMD_CML_ERR_REG_G3IF_CK_DLL_LOCK   vxge_mBIT(6)

Definition at line 3426 of file vxge_reg.h.

#define VXGE_HW_G3IFCMD_CML_ERR_REG_G3IF_SM_ERR   vxge_mBIT(7)

Definition at line 3427 of file vxge_reg.h.

#define VXGE_HW_G3IFCMD_CML_ERR_REG_G3IF_RWDQS_DLL_LOCK

(

val

)

vxge_vBIT(val, 24, 8)

Definition at line 3428 of file vxge_reg.h.

#define VXGE_HW_G3IFCMD_CML_ERR_REG_G3IF_IOCAL_FAULT   vxge_mBIT(55)

Definition at line 3430 of file vxge_reg.h.

#define VXGE_HW_VPATH_TO_VPLANE_MAP_VPATH_TO_VPLANE_MAP

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 3436 of file vxge_reg.h.

#define VXGE_HW_XGXS_CFG_PORT_SIG_DETECT_FORCE_LOS

(

val

)

vxge_vBIT(val, 16, 4)

Definition at line 3441 of file vxge_reg.h.

#define VXGE_HW_XGXS_CFG_PORT_SIG_DETECT_FORCE_VALID

(

val

)

vxge_vBIT(val, 20, 4)

Definition at line 3442 of file vxge_reg.h.

#define VXGE_HW_XGXS_CFG_PORT_SEL_INFO_0   vxge_mBIT(27)

Definition at line 3443 of file vxge_reg.h.

#define VXGE_HW_XGXS_CFG_PORT_SEL_INFO_1

(

val

)

vxge_vBIT(val, 29, 3)

Definition at line 3444 of file vxge_reg.h.

#define VXGE_HW_XGXS_CFG_PORT_TX_LANE0_SKEW

(

val

)

vxge_vBIT(val, 32, 4)

Definition at line 3445 of file vxge_reg.h.

#define VXGE_HW_XGXS_CFG_PORT_TX_LANE1_SKEW

(

val

)

vxge_vBIT(val, 36, 4)

Definition at line 3446 of file vxge_reg.h.

#define VXGE_HW_XGXS_CFG_PORT_TX_LANE2_SKEW

(

val

)

vxge_vBIT(val, 40, 4)

Definition at line 3447 of file vxge_reg.h.

#define VXGE_HW_XGXS_CFG_PORT_TX_LANE3_SKEW

(

val

)

vxge_vBIT(val, 44, 4)

Definition at line 3448 of file vxge_reg.h.

#define VXGE_HW_XGXS_RXBER_CFG_PORT_INTERVAL_DUR

(

val

)

vxge_vBIT(val, 0, 4)

Definition at line 3450 of file vxge_reg.h.

#define VXGE_HW_XGXS_RXBER_CFG_PORT_RXGXS_INTERVAL_CNT

(

val

)

vxge_vBIT(val, 16, 48)

Definition at line 3451 of file vxge_reg.h.

#define VXGE_HW_XGXS_RXBER_STATUS_PORT_RXGXS_RXGXS_LANE_A_ERR_CNT

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 3454 of file vxge_reg.h.

#define VXGE_HW_XGXS_RXBER_STATUS_PORT_RXGXS_RXGXS_LANE_B_ERR_CNT

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 3456 of file vxge_reg.h.

#define VXGE_HW_XGXS_RXBER_STATUS_PORT_RXGXS_RXGXS_LANE_C_ERR_CNT

(

val

)

vxge_vBIT(val, 32, 16)

Definition at line 3458 of file vxge_reg.h.

#define VXGE_HW_XGXS_RXBER_STATUS_PORT_RXGXS_RXGXS_LANE_D_ERR_CNT

(

val

)

vxge_vBIT(val, 48, 16)

Definition at line 3460 of file vxge_reg.h.

#define VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_TX_ACTIVITY

(

val

)

vxge_vBIT(val, 0, 4)

Definition at line 3463 of file vxge_reg.h.

#define VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_RX_ACTIVITY

(

val

)

vxge_vBIT(val, 4, 4)

Definition at line 3464 of file vxge_reg.h.

#define VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_CTC_FIFO_ERR   BIT(11)

Definition at line 3465 of file vxge_reg.h.

#define VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_BYTE_SYNC_LOST

(

val

)

vxge_vBIT(val, 12, 4)

Definition at line 3466 of file vxge_reg.h.

#define VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_CTC_ERR

(

val

)

vxge_vBIT(val, 16, 4)

Definition at line 3468 of file vxge_reg.h.

#define VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_ALIGNMENT_ERR   vxge_mBIT(23)

Definition at line 3469 of file vxge_reg.h.

#define VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_DEC_ERR

(

val

)

vxge_vBIT(val, 24, 8)

Definition at line 3470 of file vxge_reg.h.

#define VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_SKIP_INS_REQ

(

val

)

vxge_vBIT(val, 32, 4)

Definition at line 3471 of file vxge_reg.h.

#define VXGE_HW_XGXS_STATUS_PORT_XMACJ_PCS_SKIP_DEL_REQ

(

val

)

vxge_vBIT(val, 36, 4)

Definition at line 3473 of file vxge_reg.h.

#define VXGE_HW_XGXS_PMA_RESET_PORT_SERDES_RESET

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 3476 of file vxge_reg.h.

#define VXGE_HW_XGXS_STATIC_CFG_PORT_FW_CTRL_SERDES   vxge_mBIT(3)

Definition at line 3480 of file vxge_reg.h.

#define VXGE_HW_XGXS_INFO_PORT_XMACJ_INFO_0

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 3484 of file vxge_reg.h.

#define VXGE_HW_XGXS_INFO_PORT_XMACJ_INFO_1

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 3485 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_CFG_PORT_MODE

(

val

)

vxge_vBIT(val, 2, 2)

Definition at line 3487 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_CFG_PORT_RATE   vxge_mBIT(7)

Definition at line 3488 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_CFG_PORT_FIXED_USE_FSM   vxge_mBIT(11)

Definition at line 3489 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_CFG_PORT_ANTP_USE_FSM   vxge_mBIT(15)

Definition at line 3490 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_CFG_PORT_ANBE_USE_FSM   vxge_mBIT(19)

Definition at line 3491 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_STATUS_PORT_RATEMGMT_COMPLETE   vxge_mBIT(3)

Definition at line 3493 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_STATUS_PORT_RATEMGMT_RATE   vxge_mBIT(7)

Definition at line 3494 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_STATUS_PORT_RATEMGMT_MAC_MATCHES_PHY   vxge_mBIT(11)

Definition at line 3495 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_FIXED_CFG_PORT_RESTART   vxge_mBIT(7)

Definition at line 3499 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_ANTP_CFG_PORT_RESTART   vxge_mBIT(7)

Definition at line 3501 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_ANTP_CFG_PORT_USE_PREAMBLE_EXT_PHY   vxge_mBIT(11)

Definition at line 3502 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_ANTP_CFG_PORT_USE_ACT_SEL   vxge_mBIT(15)

Definition at line 3503 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_ANTP_CFG_PORT_T_RETRY_PHY_QUERY

(

val

)

vxge_vBIT(val, 16, 4)

Definition at line 3504 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_ANTP_CFG_PORT_T_WAIT_MDIO_RESPONSE

(

val

)

vxge_vBIT(val, 20, 4)

Definition at line 3506 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_ANTP_CFG_PORT_T_LDOWN_REAUTO_RESPONSE

(

val

)

vxge_vBIT(val, 24, 4)

Definition at line 3508 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_ANTP_CFG_PORT_ADVERTISE_10G   vxge_mBIT(31)

Definition at line 3510 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_ANTP_CFG_PORT_ADVERTISE_1G   vxge_mBIT(35)

Definition at line 3511 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_ANBE_CFG_PORT_RESTART   vxge_mBIT(7)

Definition at line 3513 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_ANBE_CFG_PORT_PARALLEL_DETECT_10G_KX4_ENABLE   vxge_mBIT(11)

Definition at line 3514 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_ANBE_CFG_PORT_PARALLEL_DETECT_1G_KX_ENABLE   vxge_mBIT(15)

Definition at line 3516 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_ANBE_CFG_PORT_T_SYNC_10G_KX4

(

val

)

vxge_vBIT(val, 16, 4)

Definition at line 3518 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_ANBE_CFG_PORT_T_SYNC_1G_KX

(

val

)

vxge_vBIT(val, 20, 4)

Definition at line 3519 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_ANBE_CFG_PORT_T_DME_EXCHANGE

(

val

)

vxge_vBIT(val, 24, 4)

Definition at line 3520 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_ANBE_CFG_PORT_ADVERTISE_10G_KX4   vxge_mBIT(31)

Definition at line 3521 of file vxge_reg.h.

#define VXGE_HW_RATEMGMT_ANBE_CFG_PORT_ADVERTISE_1G_KX   vxge_mBIT(35)

Definition at line 3522 of file vxge_reg.h.

#define VXGE_HW_ANBE_CFG_PORT_RESET_CFG_REGS

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 3524 of file vxge_reg.h.

#define VXGE_HW_ANBE_CFG_PORT_ALIGN_10G_KX4_OVERRIDE

(

val

)

vxge_vBIT(val, 10, 2)

Definition at line 3525 of file vxge_reg.h.

#define VXGE_HW_ANBE_CFG_PORT_SYNC_1G_KX_OVERRIDE

(

val

)

vxge_vBIT(val, 14, 2)

Definition at line 3526 of file vxge_reg.h.

#define VXGE_HW_ANBE_MGR_CTRL_PORT_WE   vxge_mBIT(3)

Definition at line 3528 of file vxge_reg.h.

#define VXGE_HW_ANBE_MGR_CTRL_PORT_STROBE   vxge_mBIT(7)

Definition at line 3529 of file vxge_reg.h.

#define VXGE_HW_ANBE_MGR_CTRL_PORT_ADDR

(

val

)

vxge_vBIT(val, 15, 9)

Definition at line 3530 of file vxge_reg.h.

#define VXGE_HW_ANBE_MGR_CTRL_PORT_DATA

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 3531 of file vxge_reg.h.

#define VXGE_HW_ANBE_FW_MSTR_PORT_CONNECT_BEAN_TO_SERDES   vxge_mBIT(3)

Definition at line 3535 of file vxge_reg.h.

#define VXGE_HW_ANBE_FW_MSTR_PORT_TX_ZEROES_TO_SERDES   vxge_mBIT(7)

Definition at line 3536 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_CHOSE_10G_KX4_USING_PD   vxge_mBIT(3)

Definition at line 3538 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_CHOSE_10G_KX4_USING_DME   vxge_mBIT(7)

Definition at line 3540 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_CHOSE_1G_KX_USING_PD   vxge_mBIT(11)

Definition at line 3542 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_CHOSE_1G_KX_USING_DME   vxge_mBIT(15)

Definition at line 3544 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_ANBEFSM_STATE

(

val

)

vxge_vBIT(val, 18, 6)

Definition at line 3546 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_BEAN_NEXT_PAGE_RECEIVED   vxge_mBIT(27)

Definition at line 3548 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_BEAN_BASE_PAGE_RECEIVED   vxge_mBIT(35)

Definition at line 3550 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_BEAN_AUTONEG_COMPLETE   vxge_mBIT(39)

Definition at line 3552 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_UNEXPECTED_NP_BEFORE_BP   vxge_mBIT(43)

Definition at line 3554 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_UNEXPECTED_AN_COMPLETE_BEFORE_BP   vxge_mBIT(47)

Definition at line 3557 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_UNEXPECTED_AN_COMPLETE_BEFORE_NP   vxge_mBIT(51)

Definition at line 3560 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_UNEXPECTED_MODE_WHEN_AN_COMPLETE   vxge_mBIT(55)

Definition at line 3563 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_COUNT_BP

(

val

)

vxge_vBIT(val, 56, 4)

Definition at line 3565 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_GEN_STATUS_PORT_RATEMGMT_COUNT_NP

(

val

)

vxge_vBIT(val, 60, 4)

Definition at line 3567 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_FEC_ENABLE   vxge_mBIT(32)

Definition at line 3570 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_FEC_ABILITY   vxge_mBIT(33)

Definition at line 3572 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_10G_KR_CAPABLE   vxge_mBIT(40)

Definition at line 3574 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_10G_KX4_CAPABLE   vxge_mBIT(41)

Definition at line 3576 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_1G_KX_CAPABLE   vxge_mBIT(42)

Definition at line 3578 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_TX_NONCE

(

val

)

vxge_vBIT(val, 43, 5)

Definition at line 3580 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_NP   vxge_mBIT(48)

Definition at line 3582 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_ACK   vxge_mBIT(49)

Definition at line 3583 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_REMOTE_FAULT   vxge_mBIT(50)

Definition at line 3584 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_ASM_DIR   vxge_mBIT(51)

Definition at line 3586 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_PAUSE   vxge_mBIT(53)

Definition at line 3587 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_ECHOED_NONCE

(

val

)

vxge_vBIT(val, 54, 5)

Definition at line 3588 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_SELECTOR_FIELD

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 3590 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_NP_STATUS_PORT_RATEMGMT_NP_BITS_47_TO_32

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 3593 of file vxge_reg.h.

#define VXGE_HW_ANBE_HWFSM_NP_STATUS_PORT_RATEMGMT_NP_BITS_31_TO_0

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 3595 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_CHOSE_10G   vxge_mBIT(3)

Definition at line 3601 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_CHOSE_1G   vxge_mBIT(7)

Definition at line 3602 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_ANTPFSM_STATE

(

val

)

vxge_vBIT(val, 10, 6)

Definition at line 3603 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_AUTONEG_COMPLETE   vxge_mBIT(23)

Definition at line 3605 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_UNEXPECTED_NO_LP_XNP   vxge_mBIT(27)

Definition at line 3607 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_GOT_LP_XNP   vxge_mBIT(31)

Definition at line 3609 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_UNEXPECTED_MESSAGE_CODE   vxge_mBIT(35)

Definition at line 3610 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_UNEXPECTED_NO_HCD   vxge_mBIT(43)

Definition at line 3612 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_FOUND_HCD   vxge_mBIT(47)

Definition at line 3614 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_UNEXPECTED_INVALID_RATE   vxge_mBIT(51)

Definition at line 3615 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_VALID_RATE   vxge_mBIT(55)

Definition at line 3617 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_GEN_STATUS_PORT_RATEMGMT_PERSISTENT_LDOWN   vxge_mBIT(59)

Definition at line 3618 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_NP   vxge_mBIT(0)

Definition at line 3621 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_ACK   vxge_mBIT(1)

Definition at line 3622 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_RF   vxge_mBIT(2)

Definition at line 3623 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_XNP   vxge_mBIT(3)

Definition at line 3624 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_ABILITY_FIELD

(

val

)

vxge_vBIT(val, 4, 7)

Definition at line 3625 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_BP_STATUS_PORT_RATEMGMT_BP_SELECTOR_FIELD

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 3627 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_XNP_STATUS_PORT_RATEMGMT_XNP_NP   vxge_mBIT(0)

Definition at line 3630 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_XNP_STATUS_PORT_RATEMGMT_XNP_ACK   vxge_mBIT(1)

Definition at line 3631 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_XNP_STATUS_PORT_RATEMGMT_XNP_MP   vxge_mBIT(2)

Definition at line 3632 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_XNP_STATUS_PORT_RATEMGMT_XNP_ACK2   vxge_mBIT(3)

Definition at line 3633 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_XNP_STATUS_PORT_RATEMGMT_XNP_TOGGLE   vxge_mBIT(4)

Definition at line 3634 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_XNP_STATUS_PORT_RATEMGMT_XNP_MESSAGE_CODE

(

val

)

vxge_vBIT(val, 5, 11)

Definition at line 3635 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_XNP_STATUS_PORT_RATEMGMT_XNP_UNF_CODE_FIELD1

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 3637 of file vxge_reg.h.

#define VXGE_HW_ANTP_HWFSM_XNP_STATUS_PORT_RATEMGMT_XNP_UNF_CODE_FIELD2

(

val

)

vxge_vBIT(val, 32, 16)

Definition at line 3639 of file vxge_reg.h.

#define VXGE_HW_MDIO_MGR_ACCESS_PORT_STROBE_ONE   BIT(3)

Definition at line 3642 of file vxge_reg.h.

#define VXGE_HW_MDIO_MGR_ACCESS_PORT_OP_TYPE

(

val

)

vxge_vBIT(val, 5, 3)

Definition at line 3643 of file vxge_reg.h.

#define VXGE_HW_MDIO_MGR_ACCESS_PORT_DEVAD

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 3644 of file vxge_reg.h.

#define VXGE_HW_MDIO_MGR_ACCESS_PORT_ADDR

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 3645 of file vxge_reg.h.

#define VXGE_HW_MDIO_MGR_ACCESS_PORT_DATA

(

val

)

vxge_vBIT(val, 32, 16)

Definition at line 3646 of file vxge_reg.h.

#define VXGE_HW_MDIO_MGR_ACCESS_PORT_ST_PATTERN

(

val

)

vxge_vBIT(val, 49, 2)

Definition at line 3647 of file vxge_reg.h.

#define VXGE_HW_MDIO_MGR_ACCESS_PORT_PREAMBLE   vxge_mBIT(51)

Definition at line 3648 of file vxge_reg.h.

#define VXGE_HW_MDIO_MGR_ACCESS_PORT_PRTAD

(

val

)

vxge_vBIT(val, 55, 5)

Definition at line 3649 of file vxge_reg.h.

#define VXGE_HW_MDIO_MGR_ACCESS_PORT_STROBE_TWO   vxge_mBIT(63)

Definition at line 3650 of file vxge_reg.h.

#define VXGE_HW_XMAC_VSPORT_CHOICES_VH_VSPORT_VECTOR

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 3653 of file vxge_reg.h.

#define VXGE_HW_RX_THRESH_CFG_VP_PAUSE_LOW_THR

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 3657 of file vxge_reg.h.

#define VXGE_HW_RX_THRESH_CFG_VP_PAUSE_HIGH_THR

(

val

)

vxge_vBIT(val, 8, 8)

Definition at line 3658 of file vxge_reg.h.

#define VXGE_HW_RX_THRESH_CFG_VP_RED_THR_0

(

val

)

vxge_vBIT(val, 16, 8)

Definition at line 3659 of file vxge_reg.h.

#define VXGE_HW_RX_THRESH_CFG_VP_RED_THR_1

(

val

)

vxge_vBIT(val, 24, 8)

Definition at line 3660 of file vxge_reg.h.

#define VXGE_HW_RX_THRESH_CFG_VP_RED_THR_2

(

val

)

vxge_vBIT(val, 32, 8)

Definition at line 3661 of file vxge_reg.h.

#define VXGE_HW_RX_THRESH_CFG_VP_RED_THR_3

(

val

)

vxge_vBIT(val, 40, 8)

Definition at line 3662 of file vxge_reg.h.

#define VXGE_HW_TIM_MR2SR_RESOURCE_ASSIGNMENT_VH_BMAP_ROOT

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 3670 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_PCIPIF_INT_STATUS_MRPCIM_MSG_MRPCIM_MSG_INT   BIT(3)

Definition at line 3675 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_PCIPIF_INT_STATUS_VPATH_MSG_VPATH_MSG_INT   BIT(7)

Definition at line 3676 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_PCIPIF_INT_STATUS_SRPCIM_SPARE_R1_SRPCIM_SPARE_R1_INT   BIT(11)

Definition at line 3677 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_MSG_REG_SWIF_MRPCIM_TO_SRPCIM_RMSG_INT   BIT(3)

Definition at line 3681 of file vxge_reg.h.

#define VXGE_HW_VPATH_MSG_REG_SWIF_VPATH0_TO_SRPCIM_RMSG_INT   BIT(0)

Definition at line 3685 of file vxge_reg.h.

#define VXGE_HW_VPATH_MSG_REG_SWIF_VPATH1_TO_SRPCIM_RMSG_INT   BIT(1)

Definition at line 3686 of file vxge_reg.h.

#define VXGE_HW_VPATH_MSG_REG_SWIF_VPATH2_TO_SRPCIM_RMSG_INT   BIT(2)

Definition at line 3687 of file vxge_reg.h.

#define VXGE_HW_VPATH_MSG_REG_SWIF_VPATH3_TO_SRPCIM_RMSG_INT   BIT(3)

Definition at line 3688 of file vxge_reg.h.

#define VXGE_HW_VPATH_MSG_REG_SWIF_VPATH4_TO_SRPCIM_RMSG_INT   BIT(4)

Definition at line 3689 of file vxge_reg.h.

#define VXGE_HW_VPATH_MSG_REG_SWIF_VPATH5_TO_SRPCIM_RMSG_INT   BIT(5)

Definition at line 3690 of file vxge_reg.h.

#define VXGE_HW_VPATH_MSG_REG_SWIF_VPATH6_TO_SRPCIM_RMSG_INT   BIT(6)

Definition at line 3691 of file vxge_reg.h.

#define VXGE_HW_VPATH_MSG_REG_SWIF_VPATH7_TO_SRPCIM_RMSG_INT   BIT(7)

Definition at line 3692 of file vxge_reg.h.

#define VXGE_HW_VPATH_MSG_REG_SWIF_VPATH8_TO_SRPCIM_RMSG_INT   BIT(8)

Definition at line 3693 of file vxge_reg.h.

#define VXGE_HW_VPATH_MSG_REG_SWIF_VPATH9_TO_SRPCIM_RMSG_INT   BIT(9)

Definition at line 3694 of file vxge_reg.h.

#define VXGE_HW_VPATH_MSG_REG_SWIF_VPATH10_TO_SRPCIM_RMSG_INT   BIT(10)

Definition at line 3695 of file vxge_reg.h.

#define VXGE_HW_VPATH_MSG_REG_SWIF_VPATH11_TO_SRPCIM_RMSG_INT   BIT(11)

Definition at line 3696 of file vxge_reg.h.

#define VXGE_HW_VPATH_MSG_REG_SWIF_VPATH12_TO_SRPCIM_RMSG_INT   BIT(12)

Definition at line 3697 of file vxge_reg.h.

#define VXGE_HW_VPATH_MSG_REG_SWIF_VPATH13_TO_SRPCIM_RMSG_INT   BIT(13)

Definition at line 3698 of file vxge_reg.h.

#define VXGE_HW_VPATH_MSG_REG_SWIF_VPATH14_TO_SRPCIM_RMSG_INT   BIT(14)

Definition at line 3699 of file vxge_reg.h.

#define VXGE_HW_VPATH_MSG_REG_SWIF_VPATH15_TO_SRPCIM_RMSG_INT   BIT(15)

Definition at line 3700 of file vxge_reg.h.

#define VXGE_HW_VPATH_MSG_REG_SWIF_VPATH16_TO_SRPCIM_RMSG_INT   BIT(16)

Definition at line 3701 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_TO_MRPCIM_WMSG_SRPCIM_TO_MRPCIM_WMSG

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 3707 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_TO_MRPCIM_WMSG_TRIG_SRPCIM_TO_MRPCIM_WMSG_TRIG   BIT(0)

Definition at line 3710 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_TO_SRPCIM_RMSG_SWIF_MRPCIM_TO_SRPCIM_RMSG

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 3712 of file vxge_reg.h.

#define VXGE_HW_VPATH_TO_SRPCIM_RMSG_SEL_VPATH_TO_SRPCIM_RMSG_SEL

(

val

)

vxge_vBIT(val, 0, 5)

Definition at line 3715 of file vxge_reg.h.

#define VXGE_HW_VPATH_TO_SRPCIM_RMSG_SWIF_VPATH_TO_SRPCIM_RMSG

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 3718 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GENERAL_INT_STATUS_PIC_INT   BIT(0)

Definition at line 3723 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GENERAL_INT_STATUS_PCI_INT   BIT(3)

Definition at line 3724 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GENERAL_INT_STATUS_XMAC_INT   BIT(7)

Definition at line 3725 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GENERAL_INT_MASK_PIC_INT   BIT(0)

Definition at line 3729 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GENERAL_INT_MASK_PCI_INT   BIT(3)

Definition at line 3730 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GENERAL_INT_MASK_XMAC_INT   BIT(7)

Definition at line 3731 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GEN_ERRORS_REG_PCICONFIG_PF_STATUS_ERR   BIT(3)

Definition at line 3738 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GEN_ERRORS_REG_PCICONFIG_PF_UNCOR_ERR   BIT(7)

Definition at line 3739 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GEN_ERRORS_REG_PCICONFIG_PF_COR_ERR   BIT(11)

Definition at line 3740 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GEN_ERRORS_REG_INTCTRL_SCHED_INT   BIT(15)

Definition at line 3741 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GEN_ERRORS_REG_INI_SERR_DET   BIT(19)

Definition at line 3742 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GEN_ERRORS_REG_TGT_PF_ILLEGAL_ACCESS   BIT(23)

Definition at line 3743 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_TO_SRPCIM_ALARM_REG_PPIF_MRPCIM_TO_SRPCIM_ALARM   BIT(3)

Definition at line 3747 of file vxge_reg.h.

#define VXGE_HW_PF_SW_RESET_PF_SW_RESET

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 3757 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GENERAL_CFG1_BOOT_BYTE_SWAPEN   BIT(19)

Definition at line 3759 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GENERAL_CFG1_BOOT_BIT_FLIPEN   BIT(23)

Definition at line 3760 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GENERAL_CFG1_MSIX_ADDR_SWAPEN   BIT(27)

Definition at line 3761 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GENERAL_CFG1_MSIX_ADDR_FLIPEN   BIT(31)

Definition at line 3762 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GENERAL_CFG1_MSIX_DATA_SWAPEN   BIT(35)

Definition at line 3763 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_GENERAL_CFG1_MSIX_DATA_FLIPEN   BIT(39)

Definition at line 3764 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_INTERRUPT_CFG1_ALARM_MAP_TO_MSG

(

val

)

vxge_vBIT(val, 1, 7)

Definition at line 3766 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_INTERRUPT_CFG1_TRAFFIC_CLASS

(

val

)

vxge_vBIT(val, 9, 3)

Definition at line 3767 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_CLEAR_MSIX_MASK_SRPCIM_CLEAR_MSIX_MASK   BIT(0)

Definition at line 3771 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_SET_MSIX_MASK_SRPCIM_SET_MSIX_MASK   BIT(0)

Definition at line 3773 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_CLR_MSIX_ONE_SHOT_SRPCIM_CLR_MSIX_ONE_SHOT   BIT(0)

Definition at line 3775 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_RST_IN_PROG_SRPCIM_RST_IN_PROG   BIT(7)

Definition at line 3777 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_REG_MODIFIED_SRPCIM_REG_MODIFIED   BIT(7)

Definition at line 3779 of file vxge_reg.h.

#define VXGE_HW_TGT_PF_ILLEGAL_ACCESS_SWIF_REGION

(

val

)

vxge_vBIT(val, 1, 7)

Definition at line 3781 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSIX_STATUS_INTCTL_SRPCIM_MSIX_MASK   BIT(3)

Definition at line 3783 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSIX_STATUS_INTCTL_SRPCIM_MSIX_PENDING_VECTOR   BIT(7)

Definition at line 3784 of file vxge_reg.h.

#define VXGE_HW_XGMAC_SR_INT_STATUS_ASIC_NTWK_SR_ERR_ASIC_NTWK_SR_INT   BIT(3)

Definition at line 3788 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_SR_ERR_REG_XMACJ_NTWK_SUSTAINED_FAULT   BIT(3)

Definition at line 3791 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_SR_ERR_REG_XMACJ_NTWK_SUSTAINED_OK   BIT(7)

Definition at line 3792 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_SR_ERR_REG_XMACJ_NTWK_SUSTAINED_FAULT_OCCURRED   BIT(11)

Definition at line 3793 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_SR_ERR_REG_XMACJ_NTWK_SUSTAINED_OK_OCCURRED   BIT(15)

Definition at line 3795 of file vxge_reg.h.

#define VXGE_HW_XMAC_VSPORT_CHOICES_SR_CLONE_VSPORT_VECTOR

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 3801 of file vxge_reg.h.

#define VXGE_HW_MR_RQA_TOP_PRTY_FOR_VH_RQA_TOP_PRTY_FOR_VH

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 3806 of file vxge_reg.h.

#define VXGE_HW_UMQ_VH_DATA_LIST_EMPTY_ROCRC_UMQ_VH_DATA_LIST_EMPTY   BIT(0)

Definition at line 3809 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS0_FORCE_MWB_START   BIT(0)

Definition at line 3812 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS0_FORCE_MWB_END   BIT(1)

Definition at line 3813 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS0_FORCE_QB_START   BIT(2)

Definition at line 3814 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS0_FORCE_QB_END   BIT(3)

Definition at line 3815 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS0_FORCE_MPSB_START   BIT(4)

Definition at line 3816 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS0_FORCE_MPSB_END   BIT(5)

Definition at line 3817 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS0_MWB_OPT_EN   BIT(6)

Definition at line 3818 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS0_QB_OPT_EN   BIT(7)

Definition at line 3819 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS0_MPSB_OPT_EN   BIT(8)

Definition at line 3820 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS1_FORCE_MWB_START   BIT(9)

Definition at line 3821 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS1_FORCE_MWB_END   BIT(10)

Definition at line 3822 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS1_FORCE_QB_START   BIT(11)

Definition at line 3823 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS1_FORCE_QB_END   BIT(12)

Definition at line 3824 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS1_FORCE_MPSB_START   BIT(13)

Definition at line 3825 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS1_FORCE_MPSB_END   BIT(14)

Definition at line 3826 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS1_MWB_OPT_EN   BIT(15)

Definition at line 3827 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS1_QB_OPT_EN   BIT(16)

Definition at line 3828 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_NS1_MPSB_OPT_EN   BIT(17)

Definition at line 3829 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_DISABLE_QPAD_FOR_UNALIGNED_ADDR   BIT(19)

Definition at line 3830 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_ALIGNMENT_PREFERENCE

(

val

)

vxge_vBIT(val, 30, 2)

Definition at line 3831 of file vxge_reg.h.

#define VXGE_HW_WDE_CFG_MEM_WORD_SIZE

(

val

)

vxge_vBIT(val, 46, 2)

Definition at line 3832 of file vxge_reg.h.

#define VXGE_HW_VPATH_TO_FUNC_MAP_CFG1_VPATH_TO_FUNC_MAP_CFG1

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 3842 of file vxge_reg.h.

#define VXGE_HW_VPATH_IS_FIRST_VPATH_IS_FIRST   vxge_mBIT(3)

Definition at line 3845 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_TO_VPATH_WMSG_SRPCIM_TO_VPATH_WMSG

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 3847 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_TO_VPATH_WMSG_TRIG_SRPCIM_TO_VPATH_WMSG_TRIG   vxge_mBIT(0)

Definition at line 3850 of file vxge_reg.h.

#define VXGE_HW_TIM_VPATH_ASSIGNMENT_BMAP_ROOT

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 3855 of file vxge_reg.h.

#define VXGE_HW_RQA_TOP_PRTY_FOR_VP_RQA_TOP_PRTY_FOR_VP

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 3859 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_IGNORE_FRAME_ERR   vxge_mBIT(3)

Definition at line 3864 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_SUPPORT_SNAP_AB_N   vxge_mBIT(7)

Definition at line 3865 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_SEARCH_FOR_HAO   vxge_mBIT(18)

Definition at line 3866 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_SUPPORT_MOBILE_IPV6_HDRS   vxge_mBIT(19)

Definition at line 3867 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_IPV6_STOP_SEARCHING   vxge_mBIT(23)

Definition at line 3869 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_NO_PS_IF_UNKNOWN   vxge_mBIT(27)

Definition at line 3871 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_SEARCH_FOR_ETYPE   vxge_mBIT(35)

Definition at line 3872 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_TOSS_ANY_FRM_IF_L3_CSUM_ERR   vxge_mBIT(39)

Definition at line 3873 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_TOSS_OFFLD_FRM_IF_L3_CSUM_ERR   vxge_mBIT(43)

Definition at line 3875 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_TOSS_ANY_FRM_IF_L4_CSUM_ERR   vxge_mBIT(47)

Definition at line 3877 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_TOSS_OFFLD_FRM_IF_L4_CSUM_ERR   vxge_mBIT(51)

Definition at line 3879 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_TOSS_ANY_FRM_IF_RPA_ERR   vxge_mBIT(55)

Definition at line 3881 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_TOSS_OFFLD_FRM_IF_RPA_ERR   vxge_mBIT(59)

Definition at line 3883 of file vxge_reg.h.

#define VXGE_HW_RXMAC_RX_PA_CFG0_VPMGMT_CLONE_JUMBO_SNAP_EN   vxge_mBIT(63)

Definition at line 3885 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_RTS_DP_SP_PRIORITY   vxge_mBIT(3)

Definition at line 3887 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_FLEX_L4PRTCL_VALUE

(

val

)

vxge_vBIT(val, 24, 8)

Definition at line 3888 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_ICMP_TRASH   vxge_mBIT(35)

Definition at line 3890 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_TCPSYN_TRASH   vxge_mBIT(39)

Definition at line 3891 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_ZL4PYLD_TRASH   vxge_mBIT(43)

Definition at line 3892 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_L4PRTCL_TCP_TRASH   vxge_mBIT(47)

Definition at line 3893 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_L4PRTCL_UDP_TRASH   vxge_mBIT(51)

Definition at line 3894 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_L4PRTCL_FLEX_TRASH   vxge_mBIT(55)

Definition at line 3895 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CFG0_VPMGMT_CLONE_IPFRAG_TRASH   vxge_mBIT(59)

Definition at line 3896 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_ETYPE

(

val

)

vxge_vBIT(val, 5, 3)

Definition at line 3898 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_ICMP_TCPSYN

(

val

)

vxge_vBIT(val, 9, 3)

Definition at line 3900 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_L4PN

(

val

)

vxge_vBIT(val, 13, 3)

Definition at line 3902 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_RANGE_L4PN

(

val

)

vxge_vBIT(val, 17, 3)

Definition at line 3904 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_RTH_IT

(

val

)

vxge_vBIT(val, 21, 3)

Definition at line 3906 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_DS

(

val

)

vxge_vBIT(val, 25, 3)

Definition at line 3908 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_QOS

(

val

)

vxge_vBIT(val, 29, 3)

Definition at line 3910 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_ZL4PYLD

(

val

)

vxge_vBIT(val, 33, 3)

Definition at line 3912 of file vxge_reg.h.

#define VXGE_HW_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_L4PRTCL

(

val

)

vxge_vBIT(val, 37, 3)

Definition at line 3914 of file vxge_reg.h.

#define VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_RMAC_EN   vxge_mBIT(3)

Definition at line 3917 of file vxge_reg.h.

#define VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_STRIP_FCS   vxge_mBIT(7)

Definition at line 3918 of file vxge_reg.h.

Referenced by vxge_hw_vpath_strip_fcs_check().

#define VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_DISCARD_PFRM   vxge_mBIT(11)

Definition at line 3919 of file vxge_reg.h.

#define VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_IGNORE_FCS_ERR   vxge_mBIT(15)

Definition at line 3920 of file vxge_reg.h.

#define VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_IGNORE_LONG_ERR   vxge_mBIT(19)

Definition at line 3921 of file vxge_reg.h.

#define VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_IGNORE_USIZED_ERR   vxge_mBIT(23)

Definition at line 3922 of file vxge_reg.h.

#define VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_IGNORE_LEN_MISMATCH   vxge_mBIT(27)

Definition at line 3923 of file vxge_reg.h.

#define VXGE_HW_RXMAC_CFG0_PORT_VPMGMT_CLONE_MAX_PYLD_LEN

(

val

)

vxge_vBIT(val, 50, 14)

Definition at line 3925 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_GEN_EN   vxge_mBIT(3)

Definition at line 3928 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_RCV_EN   vxge_mBIT(7)

Definition at line 3929 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_ACCEL_SEND

(

val

)

vxge_vBIT(val, 9, 3)

Definition at line 3930 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_DUAL_THR   vxge_mBIT(15)

Definition at line 3932 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_HIGH_PTIME

(

val

)

vxge_vBIT(val, 20, 16)

Definition at line 3933 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_IGNORE_PF_FCS_ERR   vxge_mBIT(39)

Definition at line 3935 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_IGNORE_PF_LEN_ERR   vxge_mBIT(43)

Definition at line 3937 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_LIMITER_EN   vxge_mBIT(47)

Definition at line 3939 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_MAX_LIMIT

(

val

)

vxge_vBIT(val, 48, 8)

Definition at line 3940 of file vxge_reg.h.

#define VXGE_HW_RXMAC_PAUSE_CFG_PORT_VPMGMT_CLONE_PERMIT_RATEMGMT_CTRL   vxge_mBIT(59)

Definition at line 3942 of file vxge_reg.h.

#define VXGE_HW_XMAC_VSPORT_CHOICES_VP_VSPORT_VECTOR

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 3947 of file vxge_reg.h.

#define VXGE_HW_XGMAC_GEN_STATUS_VPMGMT_CLONE_XMACJ_NTWK_OK   vxge_mBIT(3)

Definition at line 3951 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_mgmt_read().

#define VXGE_HW_XGMAC_GEN_STATUS_VPMGMT_CLONE_XMACJ_NTWK_DATA_RATE   vxge_mBIT(11)

Definition at line 3952 of file vxge_reg.h.

#define VXGE_HW_XGMAC_STATUS_PORT_VPMGMT_CLONE_RMAC_REMOTE_FAULT   vxge_mBIT(3)

Definition at line 3955 of file vxge_reg.h.

#define VXGE_HW_XGMAC_STATUS_PORT_VPMGMT_CLONE_RMAC_LOCAL_FAULT   vxge_mBIT(7)

Definition at line 3957 of file vxge_reg.h.

#define VXGE_HW_XGMAC_STATUS_PORT_VPMGMT_CLONE_XMACJ_MAC_PHY_LAYER_AVAIL   vxge_mBIT(11)

Definition at line 3958 of file vxge_reg.h.

#define VXGE_HW_XGMAC_STATUS_PORT_VPMGMT_CLONE_XMACJ_PORT_OK   vxge_mBIT(15)

Definition at line 3960 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_CFG_VPMGMT_CLONE_RATEMGMT_MAC_RATE_SEL

(

val

)

vxge_vBIT(val, 2, 2)

Definition at line 3962 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_CFG_VPMGMT_CLONE_TX_HEAD_DROP_WHEN_FAULT   vxge_mBIT(7)

Definition at line 3964 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_CFG_VPMGMT_CLONE_FAULT_BEHAVIOUR   vxge_mBIT(27)

Definition at line 3966 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_CFG_VPMGMT_CLONE_PERIOD_NTWK_UP

(

val

)

vxge_vBIT(val, 28, 4)

Definition at line 3967 of file vxge_reg.h.

#define VXGE_HW_XMAC_GEN_CFG_VPMGMT_CLONE_PERIOD_NTWK_DOWN

(

val

)

vxge_vBIT(val, 32, 4)

Definition at line 3969 of file vxge_reg.h.

#define VXGE_HW_XMAC_TIMESTAMP_VPMGMT_CLONE_EN   vxge_mBIT(3)

Definition at line 3972 of file vxge_reg.h.

#define VXGE_HW_XMAC_TIMESTAMP_VPMGMT_CLONE_USE_LINK_ID

(

val

)

vxge_vBIT(val, 6, 2)

Definition at line 3973 of file vxge_reg.h.

#define VXGE_HW_XMAC_TIMESTAMP_VPMGMT_CLONE_INTERVAL

(

val

)

vxge_vBIT(val, 12, 4)

Definition at line 3975 of file vxge_reg.h.

#define VXGE_HW_XMAC_TIMESTAMP_VPMGMT_CLONE_TIMER_RESTART   vxge_mBIT(19)

Definition at line 3976 of file vxge_reg.h.

#define VXGE_HW_XMAC_TIMESTAMP_VPMGMT_CLONE_XMACJ_ROLLOVER_CNT

(

val

)

vxge_vBIT(val, 32, 16)

Definition at line 3977 of file vxge_reg.h.

#define VXGE_HW_XMAC_STATS_GEN_CFG_VPMGMT_CLONE_PRTAGGR_CUM_TIMER

(

val

)

vxge_vBIT(val, 4, 4)

Definition at line 3980 of file vxge_reg.h.

#define VXGE_HW_XMAC_STATS_GEN_CFG_VPMGMT_CLONE_VPATH_CUM_TIMER

(

val

)

vxge_vBIT(val, 8, 4)

Definition at line 3982 of file vxge_reg.h.

#define VXGE_HW_XMAC_STATS_GEN_CFG_VPMGMT_CLONE_VLAN_HANDLING   vxge_mBIT(15)

Definition at line 3984 of file vxge_reg.h.

#define VXGE_HW_XMAC_CFG_PORT_VPMGMT_CLONE_XGMII_LOOPBACK   vxge_mBIT(3)

Definition at line 3986 of file vxge_reg.h.

#define VXGE_HW_XMAC_CFG_PORT_VPMGMT_CLONE_XGMII_REVERSE_LOOPBACK   vxge_mBIT(7)

Definition at line 3987 of file vxge_reg.h.

#define VXGE_HW_XMAC_CFG_PORT_VPMGMT_CLONE_XGMII_TX_BEHAV   vxge_mBIT(11)

Definition at line 3989 of file vxge_reg.h.

#define VXGE_HW_XMAC_CFG_PORT_VPMGMT_CLONE_XGMII_RX_BEHAV   vxge_mBIT(15)

Definition at line 3990 of file vxge_reg.h.

#define VXGE_HW_TXMAC_GEN_CFG0_VPMGMT_CLONE_CHOSEN_TX_PORT   vxge_mBIT(7)

Definition at line 3994 of file vxge_reg.h.

#define VXGE_HW_TXMAC_CFG0_PORT_VPMGMT_CLONE_TMAC_EN   vxge_mBIT(3)

Definition at line 3996 of file vxge_reg.h.

#define VXGE_HW_TXMAC_CFG0_PORT_VPMGMT_CLONE_APPEND_PAD   vxge_mBIT(7)

Definition at line 3997 of file vxge_reg.h.

#define VXGE_HW_TXMAC_CFG0_PORT_VPMGMT_CLONE_PAD_BYTE

(

val

)

vxge_vBIT(val, 8, 8)

Definition at line 3998 of file vxge_reg.h.

#define VXGE_HW_WOL_MP_CRC_CRC

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 4002 of file vxge_reg.h.

#define VXGE_HW_WOL_MP_CRC_RC_EN   vxge_mBIT(63)

Definition at line 4003 of file vxge_reg.h.

#define VXGE_HW_WOL_MP_MASK_A_MASK

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 4005 of file vxge_reg.h.

#define VXGE_HW_WOL_MP_MASK_B_MASK

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 4007 of file vxge_reg.h.

#define VXGE_HW_FAU_PA_CFG_VPMGMT_CLONE_REPL_L4_COMP_CSUM   vxge_mBIT(3)

Definition at line 4011 of file vxge_reg.h.

#define VXGE_HW_FAU_PA_CFG_VPMGMT_CLONE_REPL_L3_INCL_CF   vxge_mBIT(7)

Definition at line 4012 of file vxge_reg.h.

#define VXGE_HW_FAU_PA_CFG_VPMGMT_CLONE_REPL_L3_COMP_CSUM   vxge_mBIT(11)

Definition at line 4013 of file vxge_reg.h.

#define VXGE_HW_RX_DATAPATH_UTIL_VP_CLONE_FAU_RX_UTILIZATION

(

val

)

vxge_vBIT(val, 7, 9)

Definition at line 4015 of file vxge_reg.h.

#define VXGE_HW_RX_DATAPATH_UTIL_VP_CLONE_RX_UTIL_CFG

(

val

)

vxge_vBIT(val, 16, 4)

Definition at line 4017 of file vxge_reg.h.

#define VXGE_HW_RX_DATAPATH_UTIL_VP_CLONE_FAU_RX_FRAC_UTIL

(

val

)

vxge_vBIT(val, 20, 4)

Definition at line 4019 of file vxge_reg.h.

#define VXGE_HW_RX_DATAPATH_UTIL_VP_CLONE_RX_PKT_WEIGHT

(

val

)

vxge_vBIT(val, 24, 4)

Definition at line 4021 of file vxge_reg.h.

#define VXGE_HW_TX_DATAPATH_UTIL_VP_CLONE_TPA_TX_UTILIZATION

(

val

)

vxge_vBIT(val, 7, 9)

Definition at line 4026 of file vxge_reg.h.

#define VXGE_HW_TX_DATAPATH_UTIL_VP_CLONE_TX_UTIL_CFG

(

val

)

vxge_vBIT(val, 16, 4)

Definition at line 4028 of file vxge_reg.h.

#define VXGE_HW_TX_DATAPATH_UTIL_VP_CLONE_TPA_TX_FRAC_UTIL

(

val

)

vxge_vBIT(val, 20, 4)

Definition at line 4030 of file vxge_reg.h.

#define VXGE_HW_TX_DATAPATH_UTIL_VP_CLONE_TX_PKT_WEIGHT

(

val

)

vxge_vBIT(val, 24, 4)

Definition at line 4032 of file vxge_reg.h.

#define VXGE_HW_USDC_VPATH_SGRP_ASSIGN

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 4042 of file vxge_reg.h.

#define VXGE_HW_WRDMA_ALARM_STATUS_PRC_ALARM_PRC_INT   vxge_mBIT(1)

Definition at line 4046 of file vxge_reg.h.

#define VXGE_HW_PRC_ALARM_REG_PRC_RING_BUMP   vxge_mBIT(0)

Definition at line 4051 of file vxge_reg.h.

Referenced by vxge_hw_vpath_intr_enable().

#define VXGE_HW_PRC_ALARM_REG_PRC_RXDCM_SC_ERR   vxge_mBIT(1)

Definition at line 4052 of file vxge_reg.h.

#define VXGE_HW_PRC_ALARM_REG_PRC_RXDCM_SC_ABORT   vxge_mBIT(2)

Definition at line 4053 of file vxge_reg.h.

#define VXGE_HW_PRC_ALARM_REG_PRC_QUANTA_SIZE_ERR   vxge_mBIT(3)

Definition at line 4054 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG1_RX_TIMER_VAL

(

val

)

vxge_vBIT(val, 3, 29)

Definition at line 4058 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG1_TIM_RING_BUMP_INT_ENABLE   vxge_mBIT(34)

Definition at line 4059 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG1_RTI_TINT_DISABLE   vxge_mBIT(35)

Definition at line 4060 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_prc_configure().

#define VXGE_HW_PRC_CFG1_GREEDY_RETURN   vxge_mBIT(36)

Definition at line 4061 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG1_QUICK_SHOT   vxge_mBIT(37)

Definition at line 4062 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG1_RX_TIMER_CI   vxge_mBIT(39)

Definition at line 4063 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG1_RESET_TIMER_ON_RXD_RET

(

val

)

vxge_vBIT(val, 40, 2)

Definition at line 4064 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG4_IN_SVC   vxge_mBIT(7)

Definition at line 4068 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_prc_configure().

#define VXGE_HW_PRC_CFG4_RING_MODE

(

val

)

vxge_vBIT(val, 14, 2)

Definition at line 4069 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_prc_configure().

#define VXGE_HW_PRC_CFG4_RXD_NO_SNOOP   vxge_mBIT(22)

Definition at line 4070 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG4_FRM_NO_SNOOP   vxge_mBIT(23)

Definition at line 4071 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG4_RTH_DISABLE   vxge_mBIT(31)

Definition at line 4072 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_prc_configure().

#define VXGE_HW_PRC_CFG4_IGNORE_OWNERSHIP   vxge_mBIT(32)

Definition at line 4073 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG4_SIGNAL_BENIGN_OVFLW   vxge_mBIT(36)

Definition at line 4074 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG4_BIMODAL_INTERRUPT   vxge_mBIT(37)

Definition at line 4075 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG4_BACKOFF_INTERVAL

(

val

)

vxge_vBIT(val, 40, 24)

Definition at line 4076 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG5_RXD0_ADD

(

val

)

vxge_vBIT(val, 0, 61)

Definition at line 4078 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_prc_configure().

#define VXGE_HW_PRC_CFG6_FRM_PAD_EN   vxge_mBIT(0)

Definition at line 4080 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG6_QSIZE_ALIGNED_RXD   vxge_mBIT(2)

Definition at line 4081 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG6_DOORBELL_MODE_EN   vxge_mBIT(5)

Definition at line 4082 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_prc_configure().

#define VXGE_HW_PRC_CFG6_L3_CPC_TRSFR_CODE_EN   vxge_mBIT(8)

Definition at line 4083 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG6_L4_CPC_TRSFR_CODE_EN   vxge_mBIT(9)

Definition at line 4084 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG6_RXD_CRXDT

(

val

)

vxge_vBIT(val, 23, 9)

Definition at line 4085 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_prc_configure().

#define VXGE_HW_PRC_CFG6_GET_RXD_CRXDT

(

val

)

vxge_bVALn(val, 23, 9)

Definition at line 4086 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG6_RXD_SPAT

(

val

)

vxge_vBIT(val, 36, 9)

Definition at line 4087 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_prc_configure().

#define VXGE_HW_PRC_CFG6_GET_RXD_SPAT

(

val

)

vxge_bVALn(val, 36, 9)

Definition at line 4088 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG7_SCATTER_MODE

(

val

)

vxge_vBIT(val, 6, 2)

Definition at line 4090 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG7_SMART_SCAT_EN   vxge_mBIT(11)

Definition at line 4091 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG7_RXD_NS_CHG_EN   vxge_mBIT(12)

Definition at line 4092 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG7_NO_HDR_SEPARATION   vxge_mBIT(14)

Definition at line 4093 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG7_RXD_BUFF_SIZE_MASK

(

val

)

vxge_vBIT(val, 20, 4)

Definition at line 4094 of file vxge_reg.h.

#define VXGE_HW_PRC_CFG7_BUFF_SIZE0_MASK

(

val

)

vxge_vBIT(val, 27, 5)

Definition at line 4095 of file vxge_reg.h.

#define VXGE_HW_TIM_DEST_ADDR_TIM_DEST_ADDR

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 4097 of file vxge_reg.h.

#define VXGE_HW_PRC_RXD_DOORBELL_NEW_QW_CNT

(

val

)

vxge_vBIT(val, 48, 16)

Definition at line 4099 of file vxge_reg.h.

Referenced by vxge_hw_vpath_doorbell_rx(), and vxge_hw_vpath_rx_doorbell_init().

#define VXGE_HW_RQA_PRTY_FOR_VP_RQA_PRTY_FOR_VP

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 4101 of file vxge_reg.h.

#define VXGE_HW_RXDMEM_SIZE_PRC_RXDMEM_SIZE

(

val

)

vxge_vBIT(val, 51, 13)

Definition at line 4103 of file vxge_reg.h.

Referenced by vxge_hw_vpath_rx_doorbell_init().

#define VXGE_HW_FRM_IN_PROGRESS_CNT_PRC_FRM_IN_PROGRESS_CNT

(

val

)

vxge_vBIT(val, 59, 5)

Definition at line 4105 of file vxge_reg.h.

#define VXGE_HW_RX_MULTI_CAST_STATS_FRAME_DISCARD

(

val

)

vxge_vBIT(val, 48, 16)

Definition at line 4108 of file vxge_reg.h.

#define VXGE_HW_RX_FRM_TRANSFERRED_RX_FRM_TRANSFERRED

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 4110 of file vxge_reg.h.

#define VXGE_HW_RXD_RETURNED_RXD_RETURNED

(

val

)

vxge_vBIT(val, 48, 16)

Definition at line 4113 of file vxge_reg.h.

#define VXGE_HW_KDFC_FIFO_TRPL_PARTITION_LENGTH_0

(

val

)

vxge_vBIT(val, 17, 15)

Definition at line 4117 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_kdfc_configure().

#define VXGE_HW_KDFC_FIFO_TRPL_PARTITION_LENGTH_1

(

val

)

vxge_vBIT(val, 33, 15)

Definition at line 4118 of file vxge_reg.h.

#define VXGE_HW_KDFC_FIFO_TRPL_PARTITION_LENGTH_2

(

val

)

vxge_vBIT(val, 49, 15)

Definition at line 4119 of file vxge_reg.h.

#define VXGE_HW_KDFC_FIFO_TRPL_CTRL_TRIPLET_ENABLE   vxge_mBIT(7)

Definition at line 4121 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_kdfc_configure().

#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_MODE

(

val

)

vxge_vBIT(val, 14, 2)

Definition at line 4123 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_kdfc_configure().

#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_FLIP_EN   vxge_mBIT(22)

Definition at line 4124 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_SWAP_EN   vxge_mBIT(23)

Definition at line 4125 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_kdfc_configure().

#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_INT_CTRL

(

val

)

vxge_vBIT(val, 26, 2)

Definition at line 4126 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_CTRL_STRUC   vxge_mBIT(28)

Definition at line 4127 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_ADD_PAD   vxge_mBIT(29)

Definition at line 4128 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_NO_SNOOP   vxge_mBIT(30)

Definition at line 4129 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_RLX_ORD   vxge_mBIT(31)

Definition at line 4130 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_SELECT

(

val

)

vxge_vBIT(val, 32, 8)

Definition at line 4131 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_kdfc_configure().

#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_INT_NO

(

val

)

vxge_vBIT(val, 41, 7)

Definition at line 4132 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_BIT_MAP

(

val

)

vxge_vBIT(val, 48, 16)

Definition at line 4133 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_MODE

(

val

)

vxge_vBIT(val, 14, 2)

Definition at line 4135 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_FLIP_EN   vxge_mBIT(22)

Definition at line 4136 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_SWAP_EN   vxge_mBIT(23)

Definition at line 4137 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_INT_CTRL

(

val

)

vxge_vBIT(val, 26, 2)

Definition at line 4138 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_CTRL_STRUC   vxge_mBIT(28)

Definition at line 4139 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_ADD_PAD   vxge_mBIT(29)

Definition at line 4140 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_NO_SNOOP   vxge_mBIT(30)

Definition at line 4141 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_RLX_ORD   vxge_mBIT(31)

Definition at line 4142 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_SELECT

(

val

)

vxge_vBIT(val, 32, 8)

Definition at line 4143 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_INT_NO

(

val

)

vxge_vBIT(val, 41, 7)

Definition at line 4144 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_1_CTRL_BIT_MAP

(

val

)

vxge_vBIT(val, 48, 16)

Definition at line 4145 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_FLIP_EN   vxge_mBIT(22)

Definition at line 4147 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_SWAP_EN   vxge_mBIT(23)

Definition at line 4148 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_INT_CTRL

(

val

)

vxge_vBIT(val, 26, 2)

Definition at line 4149 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_CTRL_STRUC   vxge_mBIT(28)

Definition at line 4150 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_ADD_PAD   vxge_mBIT(29)

Definition at line 4151 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_NO_SNOOP   vxge_mBIT(30)

Definition at line 4152 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_RLX_ORD   vxge_mBIT(31)

Definition at line 4153 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_SELECT

(

val

)

vxge_vBIT(val, 32, 8)

Definition at line 4154 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_INT_NO

(

val

)

vxge_vBIT(val, 41, 7)

Definition at line 4155 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_2_CTRL_BIT_MAP

(

val

)

vxge_vBIT(val, 48, 16)

Definition at line 4156 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_0_WB_ADDRESS_ADD

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 4158 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_1_WB_ADDRESS_ADD

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 4160 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_2_WB_ADDRESS_ADD

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 4162 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_OFFSET_KDFC_RCTR0

(

val

)

vxge_vBIT(val, 1, 15)

Definition at line 4164 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_OFFSET_KDFC_RCTR1

(

val

)

vxge_vBIT(val, 17, 15)

Definition at line 4165 of file vxge_reg.h.

#define VXGE_HW_KDFC_TRPL_FIFO_OFFSET_KDFC_RCTR2

(

val

)

vxge_vBIT(val, 33, 15)

Definition at line 4166 of file vxge_reg.h.

#define VXGE_HW_KDFC_DRBL_TRIPLET_TOTAL_KDFC_MAX_SIZE

(

val

)

vxge_vBIT(val, 17, 15)

Definition at line 4168 of file vxge_reg.h.

#define VXGE_HW_USDC_DRBL_CTRL_FLIP_EN   vxge_mBIT(22)

Definition at line 4173 of file vxge_reg.h.

#define VXGE_HW_USDC_DRBL_CTRL_SWAP_EN   vxge_mBIT(23)

Definition at line 4174 of file vxge_reg.h.

#define VXGE_HW_USDC_VP_READY_USDC_HTN_READY   vxge_mBIT(7)

Definition at line 4176 of file vxge_reg.h.

#define VXGE_HW_USDC_VP_READY_USDC_SRQ_READY   vxge_mBIT(15)

Definition at line 4177 of file vxge_reg.h.

#define VXGE_HW_USDC_VP_READY_USDC_CQRQ_READY   vxge_mBIT(23)

Definition at line 4178 of file vxge_reg.h.

#define VXGE_HW_KDFC_STATUS_KDFC_WRR_0_READY   vxge_mBIT(0)

Definition at line 4180 of file vxge_reg.h.

#define VXGE_HW_KDFC_STATUS_KDFC_WRR_1_READY   vxge_mBIT(1)

Definition at line 4181 of file vxge_reg.h.

#define VXGE_HW_KDFC_STATUS_KDFC_WRR_2_READY   vxge_mBIT(2)

Definition at line 4182 of file vxge_reg.h.

#define VXGE_HW_XMAC_RPA_VCFG_IPV4_TCP_INCL_PH   vxge_mBIT(3)

Definition at line 4186 of file vxge_reg.h.

#define VXGE_HW_XMAC_RPA_VCFG_IPV6_TCP_INCL_PH   vxge_mBIT(7)

Definition at line 4187 of file vxge_reg.h.

#define VXGE_HW_XMAC_RPA_VCFG_IPV4_UDP_INCL_PH   vxge_mBIT(11)

Definition at line 4188 of file vxge_reg.h.

#define VXGE_HW_XMAC_RPA_VCFG_IPV6_UDP_INCL_PH   vxge_mBIT(15)

Definition at line 4189 of file vxge_reg.h.

#define VXGE_HW_XMAC_RPA_VCFG_L4_INCL_CF   vxge_mBIT(19)

Definition at line 4190 of file vxge_reg.h.

#define VXGE_HW_XMAC_RPA_VCFG_STRIP_VLAN_TAG   vxge_mBIT(23)

Definition at line 4191 of file vxge_reg.h.

#define VXGE_HW_RXMAC_VCFG0_RTS_MAX_FRM_LEN

(

val

)

vxge_vBIT(val, 2, 14)

Definition at line 4193 of file vxge_reg.h.

Referenced by vxge_hw_vpath_mtu_set(), and vxge_hw_vpath_set_zero_rx_frm_len().

#define VXGE_HW_RXMAC_VCFG0_RTS_USE_MIN_LEN   vxge_mBIT(19)

Definition at line 4194 of file vxge_reg.h.

#define VXGE_HW_RXMAC_VCFG0_RTS_MIN_FRM_LEN

(

val

)

vxge_vBIT(val, 26, 14)

Definition at line 4195 of file vxge_reg.h.

#define VXGE_HW_RXMAC_VCFG0_UCAST_ALL_ADDR_EN   vxge_mBIT(43)

Definition at line 4196 of file vxge_reg.h.

#define VXGE_HW_RXMAC_VCFG0_MCAST_ALL_ADDR_EN   vxge_mBIT(47)

Definition at line 4197 of file vxge_reg.h.

#define VXGE_HW_RXMAC_VCFG0_BCAST_EN   vxge_mBIT(51)

Definition at line 4198 of file vxge_reg.h.

#define VXGE_HW_RXMAC_VCFG0_ALL_VID_EN   vxge_mBIT(55)

Definition at line 4199 of file vxge_reg.h.

#define VXGE_HW_RXMAC_VCFG1_RTS_RTH_MULTI_IT_BD_MODE

(

val

)

vxge_vBIT(val, 42, 2)

Definition at line 4201 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_mac_configure().

#define VXGE_HW_RXMAC_VCFG1_RTS_RTH_MULTI_IT_EN_MODE   vxge_mBIT(47)

Definition at line 4202 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_mac_configure().

#define VXGE_HW_RXMAC_VCFG1_CONTRIB_L2_FLOW   vxge_mBIT(51)

Definition at line 4203 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION

(

val

)

vxge_vBIT(val, 1, 7)

Definition at line 4205 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_addr_get(), __vxge_hw_vpath_card_info_get(), __vxge_hw_vpath_fw_ver_get(), and vxge_hw_set_fw_api().

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL

(

val

)

vxge_vBIT(val, 8, 4)

Definition at line 4206 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_addr_get(), __vxge_hw_vpath_card_info_get(), __vxge_hw_vpath_fw_ver_get(), and vxge_hw_set_fw_api().

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE   vxge_mBIT(15)

Definition at line 4207 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_addr_get(), __vxge_hw_vpath_card_info_get(), __vxge_hw_vpath_fw_ver_get(), and vxge_hw_set_fw_api().

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_BEHAV_TBL_SEL   vxge_mBIT(23)

Definition at line 4208 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_TABLE_SEL   vxge_mBIT(27)

Definition at line 4209 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS   vxge_mBIT(0)

Definition at line 4210 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_addr_get(), __vxge_hw_vpath_card_info_get(), __vxge_hw_vpath_fw_ver_get(), and vxge_hw_set_fw_api().

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET

(

val

)

vxge_vBIT(val, 40, 8)

Definition at line 4211 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_addr_get(), __vxge_hw_vpath_card_info_get(), __vxge_hw_vpath_fw_ver_get(), and vxge_hw_set_fw_api().

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_VHN

(

val

)

vxge_vBIT(val, 48, 8)

Definition at line 4213 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_CTRL_VFID

(

val

)

vxge_vBIT(val, 56, 8)

Definition at line 4214 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA0_DATA

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 4216 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_DATA

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 4218 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_PRIV_MODE_EN   vxge_mBIT(54)

Definition at line 4219 of file vxge_reg.h.

#define VXGE_HW_RTS_ACCESS_STEER_DATA1_PRIV_MODE_VPN

(

val

)

vxge_vBIT(val, 55, 5)

Definition at line 4220 of file vxge_reg.h.

#define VXGE_HW_XMAC_VSPORT_CHOICE_VSPORT_NUMBER

(

val

)

vxge_vBIT(val, 3, 5)

Definition at line 4224 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_mac_configure().

#define VXGE_HW_XMAC_STATS_ACCESS_CMD_OP

(

val

)

vxge_vBIT(val, 6, 2)

Definition at line 4227 of file vxge_reg.h.

#define VXGE_HW_XMAC_STATS_ACCESS_CMD_STROBE   vxge_mBIT(15)

Definition at line 4228 of file vxge_reg.h.

#define VXGE_HW_XMAC_STATS_ACCESS_CMD_OFFSET_SEL

(

val

)

vxge_vBIT(val, 32, 8)

Definition at line 4229 of file vxge_reg.h.

#define VXGE_HW_XMAC_STATS_ACCESS_DATA_XSMGR_DATA

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 4231 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_VP_CTRL_REQ_TEST_NTWK   vxge_mBIT(3)

Definition at line 4233 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_VP_CTRL_XMACJ_SHOW_PORT_INFO   vxge_mBIT(55)

Definition at line 4234 of file vxge_reg.h.

#define VXGE_HW_ASIC_NTWK_VP_CTRL_XMACJ_PORT_NUM   vxge_mBIT(63)

Definition at line 4235 of file vxge_reg.h.

#define VXGE_HW_XGMAC_VP_INT_STATUS_ASIC_NTWK_VP_ERR_ASIC_NTWK_VP_INT   vxge_mBIT(3)

Definition at line 4239 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_alarm_process().

#define VXGE_HW_ASIC_NW_VP_ERR_REG_XMACJ_STN_FLT   vxge_mBIT(3)

Definition at line 4243 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_alarm_process().

#define VXGE_HW_ASIC_NW_VP_ERR_REG_XMACJ_STN_OK   vxge_mBIT(7)

Definition at line 4244 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_alarm_process().

#define VXGE_HW_ASIC_NW_VP_ERR_REG_XMACJ_STN_FLT_OCCURR   vxge_mBIT(11)

Definition at line 4245 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_alarm_process().

#define VXGE_HW_ASIC_NW_VP_ERR_REG_XMACJ_STN_OK_OCCURR   vxge_mBIT(15)

Definition at line 4247 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_alarm_process().

#define VXGE_HW_ASIC_NTWK_VP_ERR_REG_XMACJ_NTWK_REAFFIRMED_FAULT   vxge_mBIT(19)

Definition at line 4249 of file vxge_reg.h.

Referenced by vxge_hw_vpath_intr_enable().

#define VXGE_HW_ASIC_NTWK_VP_ERR_REG_XMACJ_NTWK_REAFFIRMED_OK   vxge_mBIT(23)

Definition at line 4251 of file vxge_reg.h.

Referenced by vxge_hw_vpath_intr_enable().

#define VXGE_HW_RTDMA_BW_CTRL_BW_CTRL_EN   vxge_mBIT(39)

Definition at line 4257 of file vxge_reg.h.

#define VXGE_HW_RTDMA_BW_CTRL_DESIRED_BW

(

val

)

vxge_vBIT(val, 46, 18)

Definition at line 4258 of file vxge_reg.h.

#define VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_GEN_INT_AFTER_ABORT   vxge_mBIT(3)

Definition at line 4260 of file vxge_reg.h.

#define VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_PAD_MODE

(

val

)

vxge_vBIT(val, 6, 2)

Definition at line 4261 of file vxge_reg.h.

#define VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_PAD_PATTERN

(

val

)

vxge_vBIT(val, 8, 8)

Definition at line 4262 of file vxge_reg.h.

#define VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_WAIT_FOR_SPACE   vxge_mBIT(19)

Definition at line 4263 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_initialize().

#define VXGE_HW_PCI_EXP_DEVCTL_READRQ   0x7000

Definition at line 4264 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_initialize().

#define VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_FILL_THRESH

(

val

)

vxge_vBIT(val, 21, 3)

Definition at line 4265 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_initialize().

#define VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_TXD_PYLD_WMARK_EN   vxge_mBIT(28)

Definition at line 4267 of file vxge_reg.h.

#define VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_TXD_PYLD_WMARK

(

val

)

vxge_vBIT(val, 29, 3)

Definition at line 4268 of file vxge_reg.h.

#define VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_ADDR_BDRY_EN   vxge_mBIT(35)

Definition at line 4270 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_initialize().

#define VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_ADDR_BDRY

(

val

)

vxge_vBIT(val, 37, 3)

Definition at line 4271 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_initialize().

#define VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_TXD_WAIT_FOR_SPACE   vxge_mBIT(43)

Definition at line 4273 of file vxge_reg.h.

#define VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_TXD_FILL_THRESH

(

val

)

vxge_vBIT(val, 51, 5)

Definition at line 4274 of file vxge_reg.h.

#define VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_TXD_ADDR_BDRY_EN   vxge_mBIT(59)

Definition at line 4276 of file vxge_reg.h.

#define VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_TXD_ADDR_BDRY

(

val

)

vxge_vBIT(val, 61, 3)

Definition at line 4277 of file vxge_reg.h.

#define VXGE_HW_PDA_PCC_JOB_MONITOR_PDA_PCC_JOB_STATUS   vxge_mBIT(7)

Definition at line 4280 of file vxge_reg.h.

#define VXGE_HW_TX_PROTOCOL_ASSIST_CFG_LSOV2_EN   vxge_mBIT(6)

Definition at line 4282 of file vxge_reg.h.

#define VXGE_HW_TX_PROTOCOL_ASSIST_CFG_IPV6_KEEP_SEARCHING   vxge_mBIT(7)

Definition at line 4283 of file vxge_reg.h.

#define VXGE_HW_TIM_CFG1_INT_NUM_BTIMER_VAL

(

val

)

vxge_vBIT(val, 6, 26)

Definition at line 4287 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_tim_configure().

#define VXGE_HW_TIM_CFG1_INT_NUM_BITMP_EN   vxge_mBIT(35)

Definition at line 4288 of file vxge_reg.h.

#define VXGE_HW_TIM_CFG1_INT_NUM_TXFRM_CNT_EN   vxge_mBIT(36)

Definition at line 4289 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_tim_configure().

#define VXGE_HW_TIM_CFG1_INT_NUM_TXD_CNT_EN   vxge_mBIT(37)

Definition at line 4290 of file vxge_reg.h.

#define VXGE_HW_TIM_CFG1_INT_NUM_TIMER_AC   vxge_mBIT(38)

Definition at line 4291 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_tim_configure().

#define VXGE_HW_TIM_CFG1_INT_NUM_TIMER_CI   vxge_mBIT(39)

Definition at line 4292 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_tim_configure().

#define VXGE_HW_TIM_CFG1_INT_NUM_URNG_A

(

val

)

vxge_vBIT(val, 41, 7)

Definition at line 4293 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_tim_configure().

#define VXGE_HW_TIM_CFG1_INT_NUM_URNG_B

(

val

)

vxge_vBIT(val, 49, 7)

Definition at line 4294 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_tim_configure().

#define VXGE_HW_TIM_CFG1_INT_NUM_URNG_C

(

val

)

vxge_vBIT(val, 57, 7)

Definition at line 4295 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_tim_configure().

#define VXGE_HW_TIM_CFG2_INT_NUM_UEC_A

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 4297 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_tim_configure().

#define VXGE_HW_TIM_CFG2_INT_NUM_UEC_B

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 4298 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_tim_configure().

#define VXGE_HW_TIM_CFG2_INT_NUM_UEC_C

(

val

)

vxge_vBIT(val, 32, 16)

Definition at line 4299 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_tim_configure().

#define VXGE_HW_TIM_CFG2_INT_NUM_UEC_D

(

val

)

vxge_vBIT(val, 48, 16)

Definition at line 4300 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_tim_configure().

#define VXGE_HW_TIM_CFG3_INT_NUM_TIMER_RI   vxge_mBIT(0)

Definition at line 4302 of file vxge_reg.h.

#define VXGE_HW_TIM_CFG3_INT_NUM_RTIMER_EVENT_SF

(

val

)

vxge_vBIT(val, 1, 4)

Definition at line 4303 of file vxge_reg.h.

#define VXGE_HW_TIM_CFG3_INT_NUM_RTIMER_VAL

(

val

)

vxge_vBIT(val, 6, 26)

Definition at line 4304 of file vxge_reg.h.

#define VXGE_HW_TIM_CFG3_INT_NUM_UTIL_SEL

(

val

)

vxge_vBIT(val, 32, 6)

Definition at line 4305 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_tim_configure().

#define VXGE_HW_TIM_CFG3_INT_NUM_LTIMER_VAL

(

val

)

vxge_vBIT(val, 38, 26)

Definition at line 4306 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_tim_configure().

#define VXGE_HW_TIM_WRKLD_CLC_WRKLD_EVAL_PRD

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 4308 of file vxge_reg.h.

#define VXGE_HW_TIM_WRKLD_CLC_WRKLD_EVAL_DIV

(

val

)

vxge_vBIT(val, 35, 5)

Definition at line 4309 of file vxge_reg.h.

#define VXGE_HW_TIM_WRKLD_CLC_CNT_FRM_BYTE   vxge_mBIT(40)

Definition at line 4310 of file vxge_reg.h.

#define VXGE_HW_TIM_WRKLD_CLC_CNT_RX_TX

(

val

)

vxge_vBIT(val, 41, 2)

Definition at line 4311 of file vxge_reg.h.

#define VXGE_HW_TIM_WRKLD_CLC_CNT_LNK_EN   vxge_mBIT(43)

Definition at line 4312 of file vxge_reg.h.

#define VXGE_HW_TIM_WRKLD_CLC_HOST_UTIL

(

val

)

vxge_vBIT(val, 57, 7)

Definition at line 4313 of file vxge_reg.h.

#define VXGE_HW_TIM_BITMAP_MASK

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 4315 of file vxge_reg.h.

#define VXGE_HW_TIM_BITMAP_LLROOT_RXD_EN   vxge_mBIT(32)

Definition at line 4316 of file vxge_reg.h.

#define VXGE_HW_TIM_BITMAP_LLROOT_TXD_EN   vxge_mBIT(33)

Definition at line 4317 of file vxge_reg.h.

#define VXGE_HW_TIM_RING_ASSN_INT_NUM

(

val

)

vxge_vBIT(val, 6, 2)

Definition at line 4319 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_tim_configure().

#define VXGE_HW_TIM_REMAP_TX_EN   vxge_mBIT(5)

Definition at line 4321 of file vxge_reg.h.

#define VXGE_HW_TIM_REMAP_RX_EN   vxge_mBIT(6)

Definition at line 4322 of file vxge_reg.h.

#define VXGE_HW_TIM_REMAP_OFFLOAD_EN   vxge_mBIT(7)

Definition at line 4323 of file vxge_reg.h.

#define VXGE_HW_TIM_REMAP_TO_VPATH_NUM

(

val

)

vxge_vBIT(val, 11, 5)

Definition at line 4324 of file vxge_reg.h.

#define VXGE_HW_TIM_VPATH_MAP_BMAP_ROOT

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 4326 of file vxge_reg.h.

#define VXGE_HW_TIM_PCI_CFG_ADD_PAD   vxge_mBIT(7)

Definition at line 4328 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_tim_configure().

#define VXGE_HW_TIM_PCI_CFG_NO_SNOOP   vxge_mBIT(15)

Definition at line 4329 of file vxge_reg.h.

#define VXGE_HW_TIM_PCI_CFG_RELAXED   vxge_mBIT(23)

Definition at line 4330 of file vxge_reg.h.

#define VXGE_HW_TIM_PCI_CFG_CTL_STR   vxge_mBIT(31)

Definition at line 4331 of file vxge_reg.h.

#define VXGE_HW_SGRP_ASSIGN_SGRP_ASSIGN

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 4335 of file vxge_reg.h.

#define VXGE_HW_SGRP_AOA_AND_RESULT_PET_SGRP_AOA_AND_RESULT

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 4337 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_PAD_LRO_DATA_ENABLE   vxge_mBIT(7)

Definition at line 4340 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_PAD_LRO_HDR_ENABLE   vxge_mBIT(8)

Definition at line 4341 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_PAD_LRO_CQE_ENABLE   vxge_mBIT(9)

Definition at line 4342 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_PAD_NONLL_CQE_ENABLE   vxge_mBIT(10)

Definition at line 4343 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_PAD_BASE_LL_CQE_ENABLE   vxge_mBIT(11)

Definition at line 4344 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_PAD_LL_CQE_IDATA_ENABLE   vxge_mBIT(12)

Definition at line 4345 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_PAD_CQRQ_IR_ENABLE   vxge_mBIT(13)

Definition at line 4346 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_PAD_CQSQ_IR_ENABLE   vxge_mBIT(14)

Definition at line 4347 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_PAD_CQRR_IR_ENABLE   vxge_mBIT(15)

Definition at line 4348 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_NOSNOOP_DATA   vxge_mBIT(18)

Definition at line 4349 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_NOSNOOP_NONLL_CQE   vxge_mBIT(19)

Definition at line 4350 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_NOSNOOP_LL_CQE   vxge_mBIT(20)

Definition at line 4351 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_NOSNOOP_CQRQ_IR   vxge_mBIT(21)

Definition at line 4352 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_NOSNOOP_CQSQ_IR   vxge_mBIT(22)

Definition at line 4353 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_NOSNOOP_CQRR_IR   vxge_mBIT(23)

Definition at line 4354 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_RELAXED_DATA   vxge_mBIT(26)

Definition at line 4355 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_RELAXED_NONLL_CQE   vxge_mBIT(27)

Definition at line 4356 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_RELAXED_LL_CQE   vxge_mBIT(28)

Definition at line 4357 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_RELAXED_CQRQ_IR   vxge_mBIT(29)

Definition at line 4358 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_RELAXED_CQSQ_IR   vxge_mBIT(30)

Definition at line 4359 of file vxge_reg.h.

#define VXGE_HW_RPE_PCI_CFG_RELAXED_CQRR_IR   vxge_mBIT(31)

Definition at line 4360 of file vxge_reg.h.

#define VXGE_HW_RPE_LRO_CFG_SUPPRESS_LRO_ETH_TRLR   vxge_mBIT(7)

Definition at line 4362 of file vxge_reg.h.

#define VXGE_HW_RPE_LRO_CFG_ALLOW_LRO_SNAP_SNAPJUMBO_MRG   vxge_mBIT(11)

Definition at line 4363 of file vxge_reg.h.

#define VXGE_HW_RPE_LRO_CFG_ALLOW_LRO_LLC_LLCJUMBO_MRG   vxge_mBIT(15)

Definition at line 4364 of file vxge_reg.h.

#define VXGE_HW_RPE_LRO_CFG_INCL_ACK_CNT_IN_CQE   vxge_mBIT(23)

Definition at line 4365 of file vxge_reg.h.

#define VXGE_HW_PE_MR2VP_ACK_BLK_LIMIT_BLK_LIMIT

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 4367 of file vxge_reg.h.

#define VXGE_HW_PE_MR2VP_RIRR_LIRR_BLK_LIMIT_RIRR_BLK_LIMIT

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 4369 of file vxge_reg.h.

#define VXGE_HW_PE_MR2VP_RIRR_LIRR_BLK_LIMIT_LIRR_BLK_LIMIT

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 4371 of file vxge_reg.h.

#define VXGE_HW_TXPE_PCI_NCE_CFG_NCE_THRESH

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 4374 of file vxge_reg.h.

#define VXGE_HW_TXPE_PCI_NCE_CFG_PAD_TOWI_ENABLE   vxge_mBIT(55)

Definition at line 4375 of file vxge_reg.h.

#define VXGE_HW_TXPE_PCI_NCE_CFG_NOSNOOP_TOWI   vxge_mBIT(63)

Definition at line 4376 of file vxge_reg.h.

#define VXGE_HW_MSG_QPAD_EN_CFG_UMQ_BWR_READ   vxge_mBIT(3)

Definition at line 4380 of file vxge_reg.h.

#define VXGE_HW_MSG_QPAD_EN_CFG_DMQ_BWR_READ   vxge_mBIT(7)

Definition at line 4381 of file vxge_reg.h.

#define VXGE_HW_MSG_QPAD_EN_CFG_MXP_GENDMA_READ   vxge_mBIT(11)

Definition at line 4382 of file vxge_reg.h.

#define VXGE_HW_MSG_QPAD_EN_CFG_UXP_GENDMA_READ   vxge_mBIT(15)

Definition at line 4383 of file vxge_reg.h.

#define VXGE_HW_MSG_QPAD_EN_CFG_UMQ_MSG_WRITE   vxge_mBIT(19)

Definition at line 4384 of file vxge_reg.h.

#define VXGE_HW_MSG_QPAD_EN_CFG_UMQDMQ_IR_WRITE   vxge_mBIT(23)

Definition at line 4385 of file vxge_reg.h.

#define VXGE_HW_MSG_QPAD_EN_CFG_MXP_GENDMA_WRITE   vxge_mBIT(27)

Definition at line 4386 of file vxge_reg.h.

#define VXGE_HW_MSG_QPAD_EN_CFG_UXP_GENDMA_WRITE   vxge_mBIT(31)

Definition at line 4387 of file vxge_reg.h.

#define VXGE_HW_MSG_PCI_CFG_GENDMA_NO_SNOOP   vxge_mBIT(3)

Definition at line 4389 of file vxge_reg.h.

#define VXGE_HW_MSG_PCI_CFG_UMQDMQ_IR_NO_SNOOP   vxge_mBIT(7)

Definition at line 4390 of file vxge_reg.h.

#define VXGE_HW_MSG_PCI_CFG_UMQ_NO_SNOOP   vxge_mBIT(11)

Definition at line 4391 of file vxge_reg.h.

#define VXGE_HW_MSG_PCI_CFG_DMQ_NO_SNOOP   vxge_mBIT(15)

Definition at line 4392 of file vxge_reg.h.

#define VXGE_HW_UMQDMQ_IR_INIT_HOST_WRITE_ADD

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 4394 of file vxge_reg.h.

#define VXGE_HW_DMQ_IR_INT_IMMED_ENABLE   vxge_mBIT(6)

Definition at line 4396 of file vxge_reg.h.

#define VXGE_HW_DMQ_IR_INT_EVENT_ENABLE   vxge_mBIT(7)

Definition at line 4397 of file vxge_reg.h.

#define VXGE_HW_DMQ_IR_INT_NUMBER

(

val

)

vxge_vBIT(val, 9, 7)

Definition at line 4398 of file vxge_reg.h.

#define VXGE_HW_DMQ_IR_INT_BITMAP

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 4399 of file vxge_reg.h.

#define VXGE_HW_DMQ_BWR_INIT_ADD_HOST

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 4401 of file vxge_reg.h.

#define VXGE_HW_DMQ_BWR_INIT_BYTE_COUNT

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 4403 of file vxge_reg.h.

#define VXGE_HW_DMQ_IR_POLICY

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 4405 of file vxge_reg.h.

#define VXGE_HW_UMQ_INT_IMMED_ENABLE   vxge_mBIT(6)

Definition at line 4407 of file vxge_reg.h.

#define VXGE_HW_UMQ_INT_EVENT_ENABLE   vxge_mBIT(7)

Definition at line 4408 of file vxge_reg.h.

#define VXGE_HW_UMQ_INT_NUMBER

(

val

)

vxge_vBIT(val, 9, 7)

Definition at line 4409 of file vxge_reg.h.

#define VXGE_HW_UMQ_INT_BITMAP

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 4410 of file vxge_reg.h.

#define VXGE_HW_UMQ_MR2VP_BWR_PFCH_INIT_NUMBER

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 4412 of file vxge_reg.h.

#define VXGE_HW_UMQ_BWR_PFCH_CTRL_POLL_EN   vxge_mBIT(3)

Definition at line 4414 of file vxge_reg.h.

#define VXGE_HW_UMQ_MR2VP_BWR_EOL_POLL_LATENCY

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 4416 of file vxge_reg.h.

#define VXGE_HW_UMQ_BWR_INIT_ADD_HOST

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 4418 of file vxge_reg.h.

#define VXGE_HW_UMQ_BWR_INIT_BYTE_COUNT

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 4420 of file vxge_reg.h.

#define VXGE_HW_UMQDMQ_IR_INIT_NOTIFY_PULSE   vxge_mBIT(3)

Definition at line 4423 of file vxge_reg.h.

#define VXGE_HW_DMQ_INIT_NOTIFY_PULSE   vxge_mBIT(3)

Definition at line 4425 of file vxge_reg.h.

#define VXGE_HW_UMQ_INIT_NOTIFY_PULSE   vxge_mBIT(3)

Definition at line 4427 of file vxge_reg.h.

#define VXGE_HW_TPA_CFG_IGNORE_FRAME_ERR   vxge_mBIT(3)

Definition at line 4431 of file vxge_reg.h.

#define VXGE_HW_TPA_CFG_IPV6_STOP_SEARCHING   vxge_mBIT(7)

Definition at line 4432 of file vxge_reg.h.

#define VXGE_HW_TPA_CFG_L4_PSHDR_PRESENT   vxge_mBIT(11)

Definition at line 4433 of file vxge_reg.h.

#define VXGE_HW_TPA_CFG_SUPPORT_MOBILE_IPV6_HDRS   vxge_mBIT(15)

Definition at line 4434 of file vxge_reg.h.

#define VXGE_HW_TX_VP_RESET_DISCARDED_FRMS_TX_VP_RESET_DISCARDED_FRMS

(

val

)

vxge_vBIT(val, 48, 16)

Definition at line 4438 of file vxge_reg.h.

#define VXGE_HW_FAU_RPA_VCFG_L4_COMP_CSUM   vxge_mBIT(7)

Definition at line 4443 of file vxge_reg.h.

#define VXGE_HW_FAU_RPA_VCFG_L3_INCL_CF   vxge_mBIT(11)

Definition at line 4444 of file vxge_reg.h.

#define VXGE_HW_FAU_RPA_VCFG_L3_COMP_CSUM   vxge_mBIT(15)

Definition at line 4445 of file vxge_reg.h.

#define VXGE_HW_DBG_STATS_RX_MPA_CRC_FAIL_FRMS

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 4449 of file vxge_reg.h.

#define VXGE_HW_DBG_STATS_RX_MPA_MRK_FAIL_FRMS

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 4450 of file vxge_reg.h.

#define VXGE_HW_DBG_STATS_RX_MPA_LEN_FAIL_FRMS

(

val

)

vxge_vBIT(val, 32, 16)

Definition at line 4451 of file vxge_reg.h.

#define VXGE_HW_DBG_STATS_RX_FAU_RX_WOL_FRMS

(

val

)

vxge_vBIT(val, 0, 16)

Definition at line 4453 of file vxge_reg.h.

#define VXGE_HW_DBG_STATS_RX_FAU_RX_VP_RESET_DISCARDED_FRMS

(

val

)

vxge_vBIT(val, 16, 16)

Definition at line 4454 of file vxge_reg.h.

#define VXGE_HW_DBG_STATS_RX_FAU_RX_PERMITTED_FRMS

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 4456 of file vxge_reg.h.

#define VXGE_HW_FBMC_VP_RDY_QUEUE_SPAV_FM   vxge_mBIT(0)

Definition at line 4461 of file vxge_reg.h.

#define VXGE_HW_VPATH_PCIPIF_INT_STATUS_SRPCIM_MSG_TO_VPATH_SRPCIM_MSG_TO_VPATH_INT   vxge_mBIT(3)

Definition at line 4466 of file vxge_reg.h.

#define VXGE_HW_VPATH_PCIPIF_INT_STATUS_VPATH_SPARE_R1_VPATH_SPARE_R1_INT   vxge_mBIT(7)

Definition at line 4468 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_MSG_TO_VPATH_REG_SWIF_SRPCIM_TO_VPATH_RMSG_INT   vxge_mBIT(3)

Definition at line 4474 of file vxge_reg.h.

#define VXGE_HW_VPATH_TO_SRPCIM_WMSG_VPATH_TO_SRPCIM_WMSG

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 4481 of file vxge_reg.h.

#define VXGE_HW_VPATH_TO_SRPCIM_WMSG_TRIG_VPATH_TO_SRPCIM_WMSG_TRIG   vxge_mBIT(0)

Definition at line 4484 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENERAL_INT_STATUS_PIC_INT   vxge_mBIT(3)

Definition at line 4489 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_alarm_process().

#define VXGE_HW_VPATH_GENERAL_INT_STATUS_PCI_INT   vxge_mBIT(7)

Definition at line 4490 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_alarm_process().

#define VXGE_HW_VPATH_GENERAL_INT_STATUS_WRDMA_INT   vxge_mBIT(15)

Definition at line 4491 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_alarm_process().

#define VXGE_HW_VPATH_GENERAL_INT_STATUS_XMAC_INT   vxge_mBIT(19)

Definition at line 4492 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_alarm_process().

#define VXGE_HW_VPATH_GENERAL_INT_MASK_PIC_INT   vxge_mBIT(3)

Definition at line 4494 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENERAL_INT_MASK_PCI_INT   vxge_mBIT(7)

Definition at line 4495 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENERAL_INT_MASK_WRDMA_INT   vxge_mBIT(15)

Definition at line 4496 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENERAL_INT_MASK_XMAC_INT   vxge_mBIT(19)

Definition at line 4497 of file vxge_reg.h.

#define VXGE_HW_VPATH_PPIF_INT_STATUS_KDFCCTL_ERRORS_KDFCCTL_INT   vxge_mBIT(3)

Definition at line 4499 of file vxge_reg.h.

#define VXGE_HW_VPATH_PPIF_INT_STATUS_GENERAL_ERRORS_GENERAL_INT   vxge_mBIT(7)

Definition at line 4501 of file vxge_reg.h.

#define VXGE_HW_VPATH_PPIF_INT_STATUS_PCI_CONFIG_ERRORS_PCI_CONFIG_INT   vxge_mBIT(11)

Definition at line 4503 of file vxge_reg.h.

#define VXGE_HW_VPATH_PPIF_INT_STATUS_MRPCIM_TO_VPATH_ALARM_MRPCIM_TO_VPATH_ALARM_INT   vxge_mBIT(15)

Definition at line 4506 of file vxge_reg.h.

#define VXGE_HW_VPATH_PPIF_INT_STATUS_SRPCIM_TO_VPATH_ALARM_SRPCIM_TO_VPATH_ALARM_INT   vxge_mBIT(19)

Definition at line 4509 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO0_OVRWR   vxge_mBIT(3)

Definition at line 4513 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO1_OVRWR   vxge_mBIT(7)

Definition at line 4514 of file vxge_reg.h.

Referenced by vxge_hw_vpath_intr_enable().

#define VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO2_OVRWR   vxge_mBIT(11)

Definition at line 4515 of file vxge_reg.h.

Referenced by vxge_hw_vpath_intr_enable().

#define VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO0_POISON   vxge_mBIT(15)

Definition at line 4516 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO1_POISON   vxge_mBIT(19)

Definition at line 4517 of file vxge_reg.h.

Referenced by vxge_hw_vpath_intr_enable().

#define VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO2_POISON   vxge_mBIT(23)

Definition at line 4518 of file vxge_reg.h.

Referenced by vxge_hw_vpath_intr_enable().

#define VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO0_DMA_ERR   vxge_mBIT(31)

Definition at line 4519 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO1_DMA_ERR   vxge_mBIT(35)

Definition at line 4520 of file vxge_reg.h.

Referenced by vxge_hw_vpath_intr_enable().

#define VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO2_DMA_ERR   vxge_mBIT(39)

Definition at line 4521 of file vxge_reg.h.

Referenced by vxge_hw_vpath_intr_enable().

#define VXGE_HW_GENERAL_ERRORS_REG_DBLGEN_FIFO0_OVRFLOW   vxge_mBIT(3)

Definition at line 4527 of file vxge_reg.h.

#define VXGE_HW_GENERAL_ERRORS_REG_DBLGEN_FIFO1_OVRFLOW   vxge_mBIT(7)

Definition at line 4528 of file vxge_reg.h.

Referenced by vxge_hw_vpath_intr_enable().

#define VXGE_HW_GENERAL_ERRORS_REG_DBLGEN_FIFO2_OVRFLOW   vxge_mBIT(11)

Definition at line 4529 of file vxge_reg.h.

Referenced by vxge_hw_vpath_intr_enable().

#define VXGE_HW_GENERAL_ERRORS_REG_STATSB_PIF_CHAIN_ERR   vxge_mBIT(15)

Definition at line 4530 of file vxge_reg.h.

Referenced by vxge_hw_vpath_intr_enable().

#define VXGE_HW_GENERAL_ERRORS_REG_STATSB_DROP_TIMEOUT_REQ   vxge_mBIT(19)

Definition at line 4531 of file vxge_reg.h.

Referenced by vxge_hw_vpath_intr_enable().

#define VXGE_HW_GENERAL_ERRORS_REG_TGT_ILLEGAL_ACCESS   vxge_mBIT(27)

Definition at line 4532 of file vxge_reg.h.

#define VXGE_HW_GENERAL_ERRORS_REG_INI_SERR_DET   vxge_mBIT(31)

Definition at line 4533 of file vxge_reg.h.

#define VXGE_HW_PCI_CONFIG_ERRORS_REG_PCICONFIG_STATUS_ERR   vxge_mBIT(3)

Definition at line 4537 of file vxge_reg.h.

#define VXGE_HW_PCI_CONFIG_ERRORS_REG_PCICONFIG_UNCOR_ERR   vxge_mBIT(7)

Definition at line 4538 of file vxge_reg.h.

#define VXGE_HW_PCI_CONFIG_ERRORS_REG_PCICONFIG_COR_ERR   vxge_mBIT(11)

Definition at line 4539 of file vxge_reg.h.

#define VXGE_HW_MRPCIM_TO_VPATH_ALARM_REG_PPIF_MRPCIM_TO_VPATH_ALARM   vxge_mBIT(3)

Definition at line 4543 of file vxge_reg.h.

#define VXGE_HW_SRPCIM_TO_VPATH_ALARM_REG_PPIF_SRPCIM_TO_VPATH_ALARM

(

val

)

vxge_vBIT(val, 0, 17)

Definition at line 4548 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_STATUS_KDFCCTL_FIFO0_PRES

(

val

)

vxge_vBIT(val, 0, 8)

Definition at line 4555 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_STATUS_KDFCCTL_FIFO1_PRES

(

val

)

vxge_vBIT(val, 8, 8)

Definition at line 4556 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_STATUS_KDFCCTL_FIFO2_PRES

(

val

)

vxge_vBIT(val, 16, 8)

Definition at line 4557 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_STATUS_KDFCCTL_FIFO0_OVRWR

(

val

)

vxge_vBIT(val, 24, 8)

Definition at line 4558 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_STATUS_KDFCCTL_FIFO1_OVRWR

(

val

)

vxge_vBIT(val, 32, 8)

Definition at line 4559 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_STATUS_KDFCCTL_FIFO2_OVRWR

(

val

)

vxge_vBIT(val, 40, 8)

Definition at line 4560 of file vxge_reg.h.

#define VXGE_HW_RSTHDLR_STATUS_RSTHDLR_CURRENT_RESET   vxge_mBIT(3)

Definition at line 4562 of file vxge_reg.h.

#define VXGE_HW_RSTHDLR_STATUS_RSTHDLR_CURRENT_VPIN

(

val

)

vxge_vBIT(val, 6, 2)

Definition at line 4563 of file vxge_reg.h.

#define VXGE_HW_FIFO0_STATUS_DBLGEN_FIFO0_RDIDX

(

val

)

vxge_vBIT(val, 0, 12)

Definition at line 4565 of file vxge_reg.h.

#define VXGE_HW_FIFO1_STATUS_DBLGEN_FIFO1_RDIDX

(

val

)

vxge_vBIT(val, 0, 12)

Definition at line 4567 of file vxge_reg.h.

#define VXGE_HW_FIFO2_STATUS_DBLGEN_FIFO2_RDIDX

(

val

)

vxge_vBIT(val, 0, 12)

Definition at line 4569 of file vxge_reg.h.

#define VXGE_HW_TGT_ILLEGAL_ACCESS_SWIF_REGION

(

val

)

vxge_vBIT(val, 1, 7)

Definition at line 4573 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENERAL_CFG1_TC_VALUE

(

val

)

vxge_vBIT(val, 1, 3)

Definition at line 4577 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENERAL_CFG1_DATA_BYTE_SWAPEN   vxge_mBIT(7)

Definition at line 4578 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENERAL_CFG1_DATA_FLIPEN   vxge_mBIT(11)

Definition at line 4579 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENERAL_CFG1_CTL_BYTE_SWAPEN   vxge_mBIT(15)

Definition at line 4580 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_swapper_set().

#define VXGE_HW_VPATH_GENERAL_CFG1_CTL_FLIPEN   vxge_mBIT(23)

Definition at line 4581 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENERAL_CFG1_MSIX_ADDR_SWAPEN   vxge_mBIT(51)

Definition at line 4582 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENERAL_CFG1_MSIX_ADDR_FLIPEN   vxge_mBIT(55)

Definition at line 4583 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENERAL_CFG1_MSIX_DATA_SWAPEN   vxge_mBIT(59)

Definition at line 4584 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENERAL_CFG1_MSIX_DATA_FLIPEN   vxge_mBIT(63)

Definition at line 4585 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENERAL_CFG2_SIZE_QUANTUM

(

val

)

vxge_vBIT(val, 1, 3)

Definition at line 4587 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENERAL_CFG3_IGNORE_VPATH_RST_FOR_INTA   vxge_mBIT(3)

Definition at line 4589 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_SWAPEN_FIFO0   vxge_mBIT(1)

Definition at line 4593 of file vxge_reg.h.

Referenced by __vxge_hw_kdfc_swapper_set().

#define VXGE_HW_KDFCCTL_CFG0_BYTE_SWAPEN_FIFO1   vxge_mBIT(2)

Definition at line 4594 of file vxge_reg.h.

Referenced by __vxge_hw_kdfc_swapper_set().

#define VXGE_HW_KDFCCTL_CFG0_BYTE_SWAPEN_FIFO2   vxge_mBIT(3)

Definition at line 4595 of file vxge_reg.h.

Referenced by __vxge_hw_kdfc_swapper_set().

#define VXGE_HW_KDFCCTL_CFG0_BIT_FLIPEN_FIFO0   vxge_mBIT(5)

Definition at line 4596 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BIT_FLIPEN_FIFO1   vxge_mBIT(6)

Definition at line 4597 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BIT_FLIPEN_FIFO2   vxge_mBIT(7)

Definition at line 4598 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE0_FIFO0   vxge_mBIT(9)

Definition at line 4599 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE0_FIFO1   vxge_mBIT(10)

Definition at line 4600 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE0_FIFO2   vxge_mBIT(11)

Definition at line 4601 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE1_FIFO0   vxge_mBIT(13)

Definition at line 4602 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE1_FIFO1   vxge_mBIT(14)

Definition at line 4603 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE1_FIFO2   vxge_mBIT(15)

Definition at line 4604 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE2_FIFO0   vxge_mBIT(17)

Definition at line 4605 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE2_FIFO1   vxge_mBIT(18)

Definition at line 4606 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE2_FIFO2   vxge_mBIT(19)

Definition at line 4607 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE3_FIFO0   vxge_mBIT(21)

Definition at line 4608 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE3_FIFO1   vxge_mBIT(22)

Definition at line 4609 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE3_FIFO2   vxge_mBIT(23)

Definition at line 4610 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE4_FIFO0   vxge_mBIT(25)

Definition at line 4611 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE4_FIFO1   vxge_mBIT(26)

Definition at line 4612 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE4_FIFO2   vxge_mBIT(27)

Definition at line 4613 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE5_FIFO0   vxge_mBIT(29)

Definition at line 4614 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE5_FIFO1   vxge_mBIT(30)

Definition at line 4615 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE5_FIFO2   vxge_mBIT(31)

Definition at line 4616 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE6_FIFO0   vxge_mBIT(33)

Definition at line 4617 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE6_FIFO1   vxge_mBIT(34)

Definition at line 4618 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE6_FIFO2   vxge_mBIT(35)

Definition at line 4619 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE7_FIFO0   vxge_mBIT(37)

Definition at line 4620 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE7_FIFO1   vxge_mBIT(38)

Definition at line 4621 of file vxge_reg.h.

#define VXGE_HW_KDFCCTL_CFG0_BYTE_MASK_BYTE7_FIFO2   vxge_mBIT(39)

Definition at line 4622 of file vxge_reg.h.

#define VXGE_HW_STATS_CFG_START_HOST_ADDR

(

val

)

vxge_vBIT(val, 0, 57)

Definition at line 4627 of file vxge_reg.h.

#define VXGE_HW_INTERRUPT_CFG0_MSIX_FOR_RXTI

(

val

)

vxge_vBIT(val, 1, 7)

Definition at line 4629 of file vxge_reg.h.

#define VXGE_HW_INTERRUPT_CFG0_GROUP0_MSIX_FOR_TXTI

(

val

)

vxge_vBIT(val, 9, 7)

Definition at line 4630 of file vxge_reg.h.

#define VXGE_HW_INTERRUPT_CFG0_GROUP1_MSIX_FOR_TXTI

(

val

)

vxge_vBIT(val, 17, 7)

Definition at line 4631 of file vxge_reg.h.

#define VXGE_HW_INTERRUPT_CFG0_GROUP2_MSIX_FOR_TXTI

(

val

)

vxge_vBIT(val, 25, 7)

Definition at line 4632 of file vxge_reg.h.

#define VXGE_HW_INTERRUPT_CFG0_GROUP3_MSIX_FOR_TXTI

(

val

)

vxge_vBIT(val, 33, 7)

Definition at line 4633 of file vxge_reg.h.

#define VXGE_HW_INTERRUPT_CFG2_ALARM_MAP_TO_MSG

(

val

)

vxge_vBIT(val, 1, 7)

Definition at line 4637 of file vxge_reg.h.

#define VXGE_HW_ONE_SHOT_VECT0_EN_ONE_SHOT_VECT0_EN   vxge_mBIT(3)

Definition at line 4639 of file vxge_reg.h.

#define VXGE_HW_ONE_SHOT_VECT1_EN_ONE_SHOT_VECT1_EN   vxge_mBIT(3)

Definition at line 4641 of file vxge_reg.h.

#define VXGE_HW_ONE_SHOT_VECT2_EN_ONE_SHOT_VECT2_EN   vxge_mBIT(3)

Definition at line 4643 of file vxge_reg.h.

#define VXGE_HW_ONE_SHOT_VECT3_EN_ONE_SHOT_VECT3_EN   vxge_mBIT(3)

Definition at line 4645 of file vxge_reg.h.

#define VXGE_HW_PCI_CONFIG_ACCESS_CFG1_ADDRESS

(

val

)

vxge_vBIT(val, 0, 12)

Definition at line 4649 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_pci_read().

#define VXGE_HW_PCI_CONFIG_ACCESS_CFG1_SEL_FUNC0   vxge_mBIT(15)

Definition at line 4650 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_pci_read().

#define VXGE_HW_PCI_CONFIG_ACCESS_CFG2_REQ   vxge_mBIT(0)

Definition at line 4652 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_pci_read().

#define VXGE_HW_PCI_CONFIG_ACCESS_STATUS_ACCESS_ERR   vxge_mBIT(0)

Definition at line 4654 of file vxge_reg.h.

Referenced by __vxge_hw_vpath_pci_read().

#define VXGE_HW_PCI_CONFIG_ACCESS_STATUS_DATA

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 4655 of file vxge_reg.h.

#define VXGE_HW_VPATH_DEBUG_STATS0_INI_NUM_MWR_SENT

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 4659 of file vxge_reg.h.

#define VXGE_HW_VPATH_DEBUG_STATS1_INI_NUM_MRD_SENT

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 4661 of file vxge_reg.h.

#define VXGE_HW_VPATH_DEBUG_STATS2_INI_NUM_CPL_RCVD

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 4663 of file vxge_reg.h.

#define VXGE_HW_VPATH_DEBUG_STATS3_INI_NUM_MWR_BYTE_SENT

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 4665 of file vxge_reg.h.

#define VXGE_HW_VPATH_DEBUG_STATS4_INI_NUM_CPL_BYTE_RCVD

(

val

)

vxge_vBIT(val, 0, 64)

Definition at line 4668 of file vxge_reg.h.

#define VXGE_HW_VPATH_DEBUG_STATS5_WRCRDTARB_XOFF

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 4671 of file vxge_reg.h.

#define VXGE_HW_VPATH_DEBUG_STATS6_RDCRDTARB_XOFF

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 4673 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENSTATS_COUNT01_PPIF_VPATH_GENSTATS_COUNT1

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 4675 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENSTATS_COUNT01_PPIF_VPATH_GENSTATS_COUNT0

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 4677 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENSTATS_COUNT23_PPIF_VPATH_GENSTATS_COUNT3

(

val

)

vxge_vBIT(val, 0, 32)

Definition at line 4680 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENSTATS_COUNT23_PPIF_VPATH_GENSTATS_COUNT2

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 4682 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENSTATS_COUNT4_PPIF_VPATH_GENSTATS_COUNT4

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 4685 of file vxge_reg.h.

#define VXGE_HW_VPATH_GENSTATS_COUNT5_PPIF_VPATH_GENSTATS_COUNT5

(

val

)

vxge_vBIT(val, 32, 32)

Definition at line 4688 of file vxge_reg.h.

#define VXGE_HW_EEPROM_SIZE   (0x01 << 11)

Definition at line 4693 of file vxge_reg.h.

#define VXGE_HW_PCI_EXP_LNKCAP_LNK_SPEED   0xf

Definition at line 4696 of file vxge_reg.h.

#define VXGE_HW_PCI_EXP_LNKCAP_LNK_WIDTH   0x3f0

Definition at line 4697 of file vxge_reg.h.

#define VXGE_HW_PCI_EXP_LNKCAP_LW_RES   0x0

Definition at line 4698 of file vxge_reg.h.

---

Function Documentation

FILE_LICENCE

(

GPL2_ONLY

)

---

Variable Documentation

struct vxge_hw_vpath_reg packed