Go to the source code of this file.
Data Structures | |
| struct | tlan_adapter_entry |
Defines | |
| #define | FALSE 0 |
| #define | TRUE 1 |
| #define | TLAN_MIN_FRAME_SIZE 64 |
| #define | TLAN_MAX_FRAME_SIZE 1600 |
| #define | TLAN_NUM_RX_LISTS 4 |
| #define | TLAN_NUM_TX_LISTS 2 |
| #define | TLAN_IGNORE 0 |
| #define | TLAN_RECORD 1 |
| #define | TLAN_DEBUG_GNRL 0x0001 |
| #define | TLAN_DEBUG_TX 0x0002 |
| #define | TLAN_DEBUG_RX 0x0004 |
| #define | TLAN_DEBUG_LIST 0x0008 |
| #define | TLAN_DEBUG_PROBE 0x0010 |
| #define | TX_TIMEOUT (10*HZ) |
| #define | MAX_TLAN_BOARDS 8 |
| #define | PCI_DEVICE_ID_NETELLIGENT_10_T2 0xB012 |
| #define | PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100 0xB030 |
| #define | PCI_DEVICE_ID_OLICOM_OC2183 0x0013 |
| #define | PCI_DEVICE_ID_OLICOM_OC2325 0x0012 |
| #define | PCI_DEVICE_ID_OLICOM_OC2326 0x0014 |
| #define | TLAN_ADAPTER_NONE 0x00000000 |
| #define | TLAN_ADAPTER_UNMANAGED_PHY 0x00000001 |
| #define | TLAN_ADAPTER_BIT_RATE_PHY 0x00000002 |
| #define | TLAN_ADAPTER_USE_INTERN_10 0x00000004 |
| #define | TLAN_ADAPTER_ACTIVITY_LED 0x00000008 |
| #define | TLAN_SPEED_DEFAULT 0 |
| #define | TLAN_SPEED_10 10 |
| #define | TLAN_SPEED_100 100 |
| #define | TLAN_DUPLEX_DEFAULT 0 |
| #define | TLAN_DUPLEX_HALF 1 |
| #define | TLAN_DUPLEX_FULL 2 |
| #define | EISA_ID 0xc80 |
| #define | EISA_ID0 0xc80 |
| #define | EISA_ID1 0xc81 |
| #define | EISA_ID2 0xc82 |
| #define | EISA_ID3 0xc83 |
| #define | EISA_CR 0xc84 |
| #define | EISA_REG0 0xc88 |
| #define | EISA_REG1 0xc89 |
| #define | EISA_REG2 0xc8a |
| #define | EISA_REG3 0xc8f |
| #define | EISA_APROM 0xc90 |
| #define | TLAN_BUFFERS_PER_LIST 10 |
| #define | TLAN_LAST_BUFFER 0x80000000 |
| #define | TLAN_CSTAT_UNUSED 0x8000 |
| #define | TLAN_CSTAT_FRM_CMP 0x4000 |
| #define | TLAN_CSTAT_READY 0x3000 |
| #define | TLAN_CSTAT_EOC 0x0800 |
| #define | TLAN_CSTAT_RX_ERROR 0x0400 |
| #define | TLAN_CSTAT_PASS_CRC 0x0200 |
| #define | TLAN_CSTAT_DP_PR 0x0100 |
| #define | TLAN_PHY_MAX_ADDR 0x1F |
| #define | TLAN_PHY_NONE 0x20 |
| #define | TLAN_TIMER_LINK_BEAT 1 |
| #define | TLAN_TIMER_ACTIVITY 2 |
| #define | TLAN_TIMER_PHY_PDOWN 3 |
| #define | TLAN_TIMER_PHY_PUP 4 |
| #define | TLAN_TIMER_PHY_RESET 5 |
| #define | TLAN_TIMER_PHY_START_LINK 6 |
| #define | TLAN_TIMER_PHY_FINISH_AN 7 |
| #define | TLAN_TIMER_FINISH_RESET 8 |
| #define | TLAN_TIMER_ACT_DELAY (HZ/10) |
| #define | TLAN_EEPROM_ACK 0 |
| #define | TLAN_EEPROM_STOP 1 |
| #define | TLAN_HOST_CMD 0x00 |
| #define | TLAN_HC_GO 0x80000000 |
| #define | TLAN_HC_STOP 0x40000000 |
| #define | TLAN_HC_ACK 0x20000000 |
| #define | TLAN_HC_CS_MASK 0x1FE00000 |
| #define | TLAN_HC_EOC 0x00100000 |
| #define | TLAN_HC_RT 0x00080000 |
| #define | TLAN_HC_NES 0x00040000 |
| #define | TLAN_HC_AD_RST 0x00008000 |
| #define | TLAN_HC_LD_TMR 0x00004000 |
| #define | TLAN_HC_LD_THR 0x00002000 |
| #define | TLAN_HC_REQ_INT 0x00001000 |
| #define | TLAN_HC_INT_OFF 0x00000800 |
| #define | TLAN_HC_INT_ON 0x00000400 |
| #define | TLAN_HC_AC_MASK 0x000000FF |
| #define | TLAN_CH_PARM 0x04 |
| #define | TLAN_DIO_ADR 0x08 |
| #define | TLAN_DA_ADR_INC 0x8000 |
| #define | TLAN_DA_RAM_ADR 0x4000 |
| #define | TLAN_HOST_INT 0x0A |
| #define | TLAN_HI_IV_MASK 0x1FE0 |
| #define | TLAN_HI_IT_MASK 0x001C |
| #define | TLAN_DIO_DATA 0x0C |
| #define | TLAN_NET_CMD 0x00 |
| #define | TLAN_NET_CMD_NRESET 0x80 |
| #define | TLAN_NET_CMD_NWRAP 0x40 |
| #define | TLAN_NET_CMD_CSF 0x20 |
| #define | TLAN_NET_CMD_CAF 0x10 |
| #define | TLAN_NET_CMD_NOBRX 0x08 |
| #define | TLAN_NET_CMD_DUPLEX 0x04 |
| #define | TLAN_NET_CMD_TRFRAM 0x02 |
| #define | TLAN_NET_CMD_TXPACE 0x01 |
| #define | TLAN_NET_SIO 0x01 |
| #define | TLAN_NET_SIO_MINTEN 0x80 |
| #define | TLAN_NET_SIO_ECLOK 0x40 |
| #define | TLAN_NET_SIO_ETXEN 0x20 |
| #define | TLAN_NET_SIO_EDATA 0x10 |
| #define | TLAN_NET_SIO_NMRST 0x08 |
| #define | TLAN_NET_SIO_MCLK 0x04 |
| #define | TLAN_NET_SIO_MTXEN 0x02 |
| #define | TLAN_NET_SIO_MDATA 0x01 |
| #define | TLAN_NET_STS 0x02 |
| #define | TLAN_NET_STS_MIRQ 0x80 |
| #define | TLAN_NET_STS_HBEAT 0x40 |
| #define | TLAN_NET_STS_TXSTOP 0x20 |
| #define | TLAN_NET_STS_RXSTOP 0x10 |
| #define | TLAN_NET_STS_RSRVD 0x0F |
| #define | TLAN_NET_MASK 0x03 |
| #define | TLAN_NET_MASK_MASK7 0x80 |
| #define | TLAN_NET_MASK_MASK6 0x40 |
| #define | TLAN_NET_MASK_MASK5 0x20 |
| #define | TLAN_NET_MASK_MASK4 0x10 |
| #define | TLAN_NET_MASK_RSRVD 0x0F |
| #define | TLAN_NET_CONFIG 0x04 |
| #define | TLAN_NET_CFG_RCLK 0x8000 |
| #define | TLAN_NET_CFG_TCLK 0x4000 |
| #define | TLAN_NET_CFG_BIT 0x2000 |
| #define | TLAN_NET_CFG_RXCRC 0x1000 |
| #define | TLAN_NET_CFG_PEF 0x0800 |
| #define | TLAN_NET_CFG_1FRAG 0x0400 |
| #define | TLAN_NET_CFG_1CHAN 0x0200 |
| #define | TLAN_NET_CFG_MTEST 0x0100 |
| #define | TLAN_NET_CFG_PHY_EN 0x0080 |
| #define | TLAN_NET_CFG_MSMASK 0x007F |
| #define | TLAN_MAN_TEST 0x06 |
| #define | TLAN_DEF_VENDOR_ID 0x08 |
| #define | TLAN_DEF_DEVICE_ID 0x0A |
| #define | TLAN_DEF_REVISION 0x0C |
| #define | TLAN_DEF_SUBCLASS 0x0D |
| #define | TLAN_DEF_MIN_LAT 0x0E |
| #define | TLAN_DEF_MAX_LAT 0x0F |
| #define | TLAN_AREG_0 0x10 |
| #define | TLAN_AREG_1 0x16 |
| #define | TLAN_AREG_2 0x1C |
| #define | TLAN_AREG_3 0x22 |
| #define | TLAN_HASH_1 0x28 |
| #define | TLAN_HASH_2 0x2C |
| #define | TLAN_GOOD_TX_FRMS 0x30 |
| #define | TLAN_TX_UNDERUNS 0x33 |
| #define | TLAN_GOOD_RX_FRMS 0x34 |
| #define | TLAN_RX_OVERRUNS 0x37 |
| #define | TLAN_DEFERRED_TX 0x38 |
| #define | TLAN_CRC_ERRORS 0x3A |
| #define | TLAN_CODE_ERRORS 0x3B |
| #define | TLAN_MULTICOL_FRMS 0x3C |
| #define | TLAN_SINGLECOL_FRMS 0x3E |
| #define | TLAN_EXCESSCOL_FRMS 0x40 |
| #define | TLAN_LATE_COLS 0x41 |
| #define | TLAN_CARRIER_LOSS 0x42 |
| #define | TLAN_ACOMMIT 0x43 |
| #define | TLAN_LED_REG 0x44 |
| #define | TLAN_LED_ACT 0x10 |
| #define | TLAN_LED_LINK 0x01 |
| #define | TLAN_BSIZE_REG 0x45 |
| #define | TLAN_MAX_RX 0x46 |
| #define | TLAN_INT_DIS 0x48 |
| #define | TLAN_ID_TX_EOC 0x04 |
| #define | TLAN_ID_RX_EOF 0x02 |
| #define | TLAN_ID_RX_EOC 0x01 |
| #define | TLAN_INT_NUMBER_OF_INTS 8 |
| #define | TLAN_INT_NONE 0x0000 |
| #define | TLAN_INT_TX_EOF 0x0001 |
| #define | TLAN_INT_STAT_OVERFLOW 0x0002 |
| #define | TLAN_INT_RX_EOF 0x0003 |
| #define | TLAN_INT_DUMMY 0x0004 |
| #define | TLAN_INT_TX_EOC 0x0005 |
| #define | TLAN_INT_STATUS_CHECK 0x0006 |
| #define | TLAN_INT_RX_EOC 0x0007 |
| #define | TLAN_TLPHY_ID 0x10 |
| #define | TLAN_TLPHY_CTL 0x11 |
| #define | TLAN_TC_IGLINK 0x8000 |
| #define | TLAN_TC_SWAPOL 0x4000 |
| #define | TLAN_TC_AUISEL 0x2000 |
| #define | TLAN_TC_SQEEN 0x1000 |
| #define | TLAN_TC_MTEST 0x0800 |
| #define | TLAN_TC_RESERVED 0x07F8 |
| #define | TLAN_TC_NFEW 0x0004 |
| #define | TLAN_TC_INTEN 0x0002 |
| #define | TLAN_TC_TINT 0x0001 |
| #define | TLAN_TLPHY_STS 0x12 |
| #define | TLAN_TS_MINT 0x8000 |
| #define | TLAN_TS_PHOK 0x4000 |
| #define | TLAN_TS_POLOK 0x2000 |
| #define | TLAN_TS_TPENERGY 0x1000 |
| #define | TLAN_TS_RESERVED 0x0FFF |
| #define | TLAN_TLPHY_PAR 0x19 |
| #define | TLAN_PHY_CIM_STAT 0x0020 |
| #define | TLAN_PHY_SPEED_100 0x0040 |
| #define | TLAN_PHY_DUPLEX_FULL 0x0080 |
| #define | TLAN_PHY_AN_EN_STAT 0x0400 |
| #define | NAT_SEM_ID1 0x2000 |
| #define | NAT_SEM_ID2 0x5C01 |
| #define | LEVEL1_ID1 0x7810 |
| #define | LEVEL1_ID2 0x0000 |
| #define | CIRC_INC(a, b) if ( ++a >= b ) a = 0 |
| #define | TLan_ClearBit(bit, port) outb_p(inb_p(port) & ~bit, port) |
| #define | TLan_GetBit(bit, port) ((int) (inb_p(port) & bit)) |
| #define | TLan_SetBit(bit, port) outb_p(inb_p(port) | bit, port) |
| #define | XOR8(a, b, c, d, e, f, g, h) xor( a, xor( b, xor( c, xor( d, xor( e, xor( f, xor( g, h ) ) ) ) ) ) ) |
| #define | DA(a, bit) ( ( (u8) a[bit/8] ) & ( (u8) ( 1 << bit%8 ) ) ) |
Typedefs | |
| typedef struct tlan_adapter_entry | TLanAdapterEntry |
Functions | |
| FILE_LICENCE (GPL2_OR_LATER) | |
| static u8 | TLan_DioRead8 (u16 base_addr, u16 internal_addr) |
| static u16 | TLan_DioRead16 (u16 base_addr, u16 internal_addr) |
| static u32 | TLan_DioRead32 (u16 base_addr, u16 internal_addr) |
| static void | TLan_DioWrite8 (u16 base_addr, u16 internal_addr, u8 data) |
| static void | TLan_DioWrite16 (u16 base_addr, u16 internal_addr, u16 data) |
| static void | TLan_DioWrite32 (u16 base_addr, u16 internal_addr, u32 data) |
| static u32 | xor (u32 a, u32 b) |
| static u32 | TLan_HashFunc (u8 *a) |
| #define TLAN_MAX_FRAME_SIZE 1600 |
Definition at line 48 of file tlan.h.
Referenced by refill_rx(), tlan_poll(), TLan_ResetLists(), and tlan_transmit().
| #define TLAN_NUM_RX_LISTS 4 |
Definition at line 50 of file tlan.h.
Referenced by refill_rx(), tlan_poll(), and TLan_ResetLists().
| #define TLAN_NUM_TX_LISTS 2 |
Definition at line 51 of file tlan.h.
Referenced by refill_rx(), TLan_ResetLists(), and tlan_transmit().
| #define TLAN_ADAPTER_UNMANAGED_PHY 0x00000001 |
Definition at line 94 of file tlan.h.
Referenced by TLan_FinishReset(), TLan_PhyDetect(), and TLan_ResetAdapter().
| #define TLAN_ADAPTER_BIT_RATE_PHY 0x00000002 |
| #define TLAN_ADAPTER_USE_INTERN_10 0x00000004 |
Definition at line 96 of file tlan.h.
Referenced by TLan_PhyFinishAutoNeg(), and TLan_PhyPowerDown().
| #define TLAN_SPEED_10 10 |
| #define TLAN_SPEED_100 100 |
| #define TLAN_DUPLEX_HALF 1 |
| #define TLAN_DUPLEX_FULL 2 |
Definition at line 105 of file tlan.h.
Referenced by TLan_PhyFinishAutoNeg(), TLan_PhyStartLink(), and TLan_ResetAdapter().
| #define TLAN_LAST_BUFFER 0x80000000 |
| #define TLAN_CSTAT_UNUSED 0x8000 |
| #define TLAN_CSTAT_FRM_CMP 0x4000 |
| #define TLAN_CSTAT_READY 0x3000 |
Definition at line 137 of file tlan.h.
Referenced by refill_rx(), tlan_poll(), TLan_ResetLists(), and tlan_transmit().
| #define TLAN_CSTAT_EOC 0x0800 |
| #define TLAN_PHY_MAX_ADDR 0x1F |
| #define TLAN_PHY_NONE 0x20 |
| #define TLAN_EEPROM_ACK 0 |
| #define TLAN_EEPROM_STOP 1 |
| #define TLAN_HOST_CMD 0x00 |
Definition at line 193 of file tlan.h.
Referenced by tlan_disable(), TLan_FinishReset(), tlan_poll(), tlan_probe(), TLan_ResetAdapter(), and tlan_transmit().
| #define TLAN_HC_GO 0x80000000 |
Definition at line 194 of file tlan.h.
Referenced by TLan_FinishReset(), tlan_poll(), and tlan_transmit().
| #define TLAN_HC_ACK 0x20000000 |
| #define TLAN_HC_RT 0x00080000 |
| #define TLAN_HC_AD_RST 0x00008000 |
| #define TLAN_HC_LD_TMR 0x00004000 |
| #define TLAN_HC_LD_THR 0x00002000 |
| #define TLAN_HC_INT_OFF 0x00000800 |
| #define TLAN_HC_INT_ON 0x00000400 |
| #define TLAN_CH_PARM 0x04 |
Definition at line 208 of file tlan.h.
Referenced by TLan_FinishReset(), tlan_poll(), and tlan_transmit().
| #define TLAN_DIO_ADR 0x08 |
Definition at line 209 of file tlan.h.
Referenced by TLan_DioRead16(), TLan_DioRead32(), TLan_DioRead8(), TLan_DioWrite16(), TLan_DioWrite32(), TLan_DioWrite8(), TLan_EeReceiveByte(), TLan_EeSendByte(), TLan_EeSendStart(), TLan_MiiReadReg(), TLan_MiiSendData(), TLan_MiiSync(), TLan_MiiWriteReg(), and TLan_ResetAdapter().
| #define TLAN_HOST_INT 0x0A |
| #define TLAN_DIO_DATA 0x0C |
Definition at line 215 of file tlan.h.
Referenced by TLan_DioRead16(), TLan_DioRead32(), TLan_DioRead8(), TLan_DioWrite16(), TLan_DioWrite32(), TLan_DioWrite8(), TLan_EeReceiveByte(), TLan_EeSendByte(), TLan_EeSendStart(), TLan_MiiReadReg(), TLan_MiiSendData(), TLan_MiiSync(), TLan_MiiWriteReg(), and TLan_ResetAdapter().
| #define TLAN_NET_CMD 0x00 |
Definition at line 220 of file tlan.h.
Referenced by TLan_FinishReset(), and TLan_SetMulticastList().
| #define TLAN_NET_CMD_NRESET 0x80 |
| #define TLAN_NET_CMD_NWRAP 0x40 |
| #define TLAN_NET_CMD_CAF 0x10 |
| #define TLAN_NET_CMD_DUPLEX 0x04 |
| #define TLAN_NET_SIO 0x01 |
Definition at line 229 of file tlan.h.
Referenced by TLan_EeReceiveByte(), TLan_EeSendByte(), TLan_EeSendStart(), TLan_FinishReset(), TLan_MiiReadReg(), TLan_MiiSendData(), TLan_MiiSync(), TLan_MiiWriteReg(), and TLan_ResetAdapter().
| #define TLAN_NET_SIO_MINTEN 0x80 |
Definition at line 230 of file tlan.h.
Referenced by TLan_FinishReset(), TLan_MiiReadReg(), and TLan_MiiWriteReg().
| #define TLAN_NET_SIO_ECLOK 0x40 |
Definition at line 231 of file tlan.h.
Referenced by TLan_EeReceiveByte(), TLan_EeSendByte(), and TLan_EeSendStart().
| #define TLAN_NET_SIO_ETXEN 0x20 |
Definition at line 232 of file tlan.h.
Referenced by TLan_EeReceiveByte(), TLan_EeSendByte(), and TLan_EeSendStart().
| #define TLAN_NET_SIO_EDATA 0x10 |
Definition at line 233 of file tlan.h.
Referenced by TLan_EeReceiveByte(), TLan_EeSendByte(), and TLan_EeSendStart().
| #define TLAN_NET_SIO_NMRST 0x08 |
| #define TLAN_NET_SIO_MCLK 0x04 |
Definition at line 235 of file tlan.h.
Referenced by TLan_MiiReadReg(), TLan_MiiSendData(), TLan_MiiSync(), and TLan_MiiWriteReg().
| #define TLAN_NET_SIO_MTXEN 0x02 |
Definition at line 236 of file tlan.h.
Referenced by TLan_MiiReadReg(), TLan_MiiSendData(), and TLan_MiiSync().
| #define TLAN_NET_SIO_MDATA 0x01 |
| #define TLAN_NET_MASK 0x03 |
| #define TLAN_NET_MASK_MASK7 0x80 |
| #define TLAN_NET_MASK_MASK5 0x20 |
| #define TLAN_NET_MASK_MASK4 0x10 |
| #define TLAN_NET_CONFIG 0x04 |
Definition at line 250 of file tlan.h.
Referenced by TLan_PhyFinishAutoNeg(), TLan_PhyStartLink(), and TLan_ResetAdapter().
| #define TLAN_NET_CFG_BIT 0x2000 |
| #define TLAN_NET_CFG_1FRAG 0x0400 |
Definition at line 256 of file tlan.h.
Referenced by TLan_PhyFinishAutoNeg(), TLan_PhyStartLink(), and TLan_ResetAdapter().
| #define TLAN_NET_CFG_1CHAN 0x0200 |
Definition at line 257 of file tlan.h.
Referenced by TLan_PhyFinishAutoNeg(), TLan_PhyStartLink(), and TLan_ResetAdapter().
| #define TLAN_NET_CFG_PHY_EN 0x0080 |
Definition at line 259 of file tlan.h.
Referenced by TLan_PhyFinishAutoNeg(), TLan_PhyStartLink(), and TLan_ResetAdapter().
| #define TLAN_DEF_REVISION 0x0C |
| #define TLAN_AREG_0 0x10 |
| #define TLAN_HASH_1 0x28 |
| #define TLAN_HASH_2 0x2C |
Definition at line 273 of file tlan.h.
Referenced by TLan_ResetAdapter(), and TLan_SetMulticastList().
| #define TLAN_ACOMMIT 0x43 |
| #define TLAN_LED_REG 0x44 |
| #define TLAN_LED_LINK 0x01 |
| #define TLAN_MAX_RX 0x46 |
| #define TLAN_INT_DIS 0x48 |
| #define TLAN_ID_TX_EOC 0x04 |
| #define TLAN_ID_RX_EOC 0x01 |
| #define TLAN_TLPHY_CTL 0x11 |
| #define TLAN_TC_AUISEL 0x2000 |
| #define TLAN_TC_INTEN 0x0002 |
| #define TLAN_TLPHY_PAR 0x19 |
| #define TLAN_PHY_SPEED_100 0x0040 |
| #define TLAN_PHY_DUPLEX_FULL 0x0080 |
| #define TLAN_PHY_AN_EN_STAT 0x0400 |
| #define NAT_SEM_ID1 0x2000 |
| #define NAT_SEM_ID2 0x5C01 |
| #define CIRC_INC | ( | a, | |||
| b | ) | if ( ++a >= b ) a = 0 |
| #define TLan_ClearBit | ( | bit, | |||
| port | ) | outb_p(inb_p(port) & ~bit, port) |
Definition at line 433 of file tlan.h.
Referenced by TLan_EeReceiveByte(), TLan_EeSendByte(), TLan_EeSendStart(), TLan_MiiReadReg(), TLan_MiiSendData(), TLan_MiiSync(), and TLan_MiiWriteReg().
| #define TLan_GetBit | ( | bit, | |||
| port | ) | ((int) (inb_p(port) & bit)) |
Definition at line 434 of file tlan.h.
Referenced by TLan_EeReceiveByte(), TLan_EeSendByte(), TLan_MiiReadReg(), TLan_MiiSendData(), and TLan_MiiWriteReg().
| #define TLan_SetBit | ( | bit, | |||
| port | ) | outb_p(inb_p(port) | bit, port) |
Definition at line 435 of file tlan.h.
Referenced by TLan_EeReceiveByte(), TLan_EeSendByte(), TLan_EeSendStart(), TLan_MiiReadReg(), TLan_MiiSendData(), TLan_MiiSync(), TLan_MiiWriteReg(), and TLan_ResetAdapter().
| #define XOR8 | ( | a, | |||
| b, | |||||
| c, | |||||
| d, | |||||
| e, | |||||
| f, | |||||
| g, | |||||
| h | ) | xor( a, xor( b, xor( c, xor( d, xor( e, xor( f, xor( g, h ) ) ) ) ) ) ) |
| typedef struct tlan_adapter_entry TLanAdapterEntry |
| FILE_LICENCE | ( | GPL2_OR_LATER | ) |
Definition at line 351 of file tlan.h.
References inb, outw, TLAN_DIO_ADR, and TLAN_DIO_DATA.
Referenced by TLan_FinishReset(), tlan_probe(), and TLan_SetMulticastList().
00352 { 00353 outw(internal_addr, base_addr + TLAN_DIO_ADR); 00354 return (inb((base_addr + TLAN_DIO_DATA) + (internal_addr & 0x3))); 00355 00356 } /* TLan_DioRead8 */
Definition at line 361 of file tlan.h.
References inw, outw, TLAN_DIO_ADR, and TLAN_DIO_DATA.
00362 { 00363 outw(internal_addr, base_addr + TLAN_DIO_ADR); 00364 return (inw((base_addr + TLAN_DIO_DATA) + (internal_addr & 0x2))); 00365 00366 } /* TLan_DioRead16 */
Definition at line 371 of file tlan.h.
References inl, outw, TLAN_DIO_ADR, and TLAN_DIO_DATA.
00372 { 00373 outw(internal_addr, base_addr + TLAN_DIO_ADR); 00374 return (inl(base_addr + TLAN_DIO_DATA)); 00375 00376 } /* TLan_DioRead32 */
Definition at line 381 of file tlan.h.
References outb, outw, TLAN_DIO_ADR, and TLAN_DIO_DATA.
Referenced by TLan_FinishReset(), TLan_ResetAdapter(), TLan_SetMac(), and TLan_SetMulticastList().
00382 { 00383 outw(internal_addr, base_addr + TLAN_DIO_ADR); 00384 outb(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x3)); 00385 00386 }
Definition at line 391 of file tlan.h.
References outw, TLAN_DIO_ADR, and TLAN_DIO_DATA.
Referenced by TLan_FinishReset(), TLan_PhyFinishAutoNeg(), TLan_PhyStartLink(), and TLan_ResetAdapter().
00392 { 00393 outw(internal_addr, base_addr + TLAN_DIO_ADR); 00394 outw(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x2)); 00395 00396 }
Definition at line 401 of file tlan.h.
References outl, outw, TLAN_DIO_ADR, and TLAN_DIO_DATA.
Referenced by TLan_ResetAdapter(), and TLan_SetMulticastList().
00402 { 00403 outw(internal_addr, base_addr + TLAN_DIO_ADR); 00404 outl(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x2)); 00405 00406 }
Definition at line 464 of file tlan.h.
00465 { 00466 u32 hash; 00467 00468 hash = 00469 XOR8(DA(a, 0), DA(a, 6), DA(a, 12), DA(a, 18), DA(a, 24), 00470 DA(a, 30), DA(a, 36), DA(a, 42)); 00471 hash |= 00472 XOR8(DA(a, 1), DA(a, 7), DA(a, 13), DA(a, 19), DA(a, 25), 00473 DA(a, 31), DA(a, 37), DA(a, 43)) << 1; 00474 hash |= 00475 XOR8(DA(a, 2), DA(a, 8), DA(a, 14), DA(a, 20), DA(a, 26), 00476 DA(a, 32), DA(a, 38), DA(a, 44)) << 2; 00477 hash |= 00478 XOR8(DA(a, 3), DA(a, 9), DA(a, 15), DA(a, 21), DA(a, 27), 00479 DA(a, 33), DA(a, 39), DA(a, 45)) << 3; 00480 hash |= 00481 XOR8(DA(a, 4), DA(a, 10), DA(a, 16), DA(a, 22), DA(a, 28), 00482 DA(a, 34), DA(a, 40), DA(a, 46)) << 4; 00483 hash |= 00484 XOR8(DA(a, 5), DA(a, 11), DA(a, 17), DA(a, 23), DA(a, 29), 00485 DA(a, 35), DA(a, 41), DA(a, 47)) << 5; 00486 00487 return hash; 00488 00489 }
1.5.7.1