#include "etherboot.h"#include "nic.h"#include <gpxe/pci.h>#include "mii.h"Go to the source code of this file.
Data Structures | |
| struct | netdev_desc |
| struct | sundance_private |
Defines | |
| #define | drv_version "v1.12" |
| #define | drv_date "2004-03-21" |
| #define | HZ 100 |
| #define | virt_to_le32desc(addr) cpu_to_le32(virt_to_bus(addr)) |
| #define | le32desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr)) |
| #define | TX_RING_SIZE 2 |
| #define | TX_QUEUE_LEN 10 |
| #define | RX_RING_SIZE 4 |
| #define | TX_TIME_OUT (4*HZ) |
| #define | PKT_BUF_SZ 1536 |
| #define | rxb rx_tx_buf.rxb |
| #define | txb rx_tx_buf.txb |
| #define | EEPROM_SIZE 128 |
| #define | PCI_IOTYPE (PCI_USES_MASTER | PCI_USES_IO | PCI_ADDR0) |
| #define | MII_CNT 4 |
| #define | EEPROM_SA_OFFSET 0x10 |
| #define | DEFAULT_INTR |
| #define | mdio_in(mdio_addr) inb(mdio_addr) |
| #define | mdio_out(value, mdio_addr) outb(value, mdio_addr) |
| #define | mdio_delay(mdio_addr) inb(mdio_addr) |
| #define | MDIO_EnbIn (0) |
| #define | MDIO_WRITE0 (MDIO_EnbOutput) |
| #define | MDIO_WRITE1 (MDIO_Data | MDIO_EnbOutput) |
Enumerations | |
| enum | alta_offsets { DMACtrl = 0x00, TxListPtr = 0x04, TxDMABurstThresh = 0x08, TxDMAUrgentThresh = 0x09, TxDMAPollPeriod = 0x0a, RxDMAStatus = 0x0c, RxListPtr = 0x10, DebugCtrl0 = 0x1a, DebugCtrl1 = 0x1c, RxDMABurstThresh = 0x14, RxDMAUrgentThresh = 0x15, RxDMAPollPeriod = 0x16, LEDCtrl = 0x1a, ASICCtrl = 0x30, EEData = 0x34, EECtrl = 0x36, TxStartThresh = 0x3c, RxEarlyThresh = 0x3e, FlashAddr = 0x40, FlashData = 0x44, TxStatus = 0x46, TxFrameId = 0x47, DownCounter = 0x18, IntrClear = 0x4a, IntrEnable = 0x4c, IntrStatus = 0x4e, MACCtrl0 = 0x50, MACCtrl1 = 0x52, StationAddr = 0x54, MaxFrameSize = 0x5A, RxMode = 0x5c, MIICtrl = 0x5e, MulticastFilter0 = 0x60, MulticastFilter1 = 0x64, RxOctetsLow = 0x68, RxOctetsHigh = 0x6a, TxOctetsLow = 0x6c, TxOctetsHigh = 0x6e, TxFramesOK = 0x70, RxFramesOK = 0x72, StatsCarrierError = 0x74, StatsLateColl = 0x75, StatsMultiColl = 0x76, StatsOneColl = 0x77, StatsTxDefer = 0x78, RxMissed = 0x79, StatsTxXSDefer = 0x7a, StatsTxAbort = 0x7b, StatsBcastTx = 0x7c, StatsBcastRx = 0x7d, StatsMcastTx = 0x7e, StatsMcastRx = 0x7f, RxStatus = 0x0c } |
| enum | ASICCtrl_HiWord_bit { GlobalReset = 0x0001, RxReset = 0x0002, TxReset = 0x0004, DMAReset = 0x0008, FIFOReset = 0x0010, NetworkReset = 0x0020, HostReset = 0x0040, ResetBusy = 0x0400 } |
| enum | intr_status_bits { RFCON = 0x00020000, RFCOFF = 0x00010000, LSCStatus = 0x00008000, ANCStatus = 0x00004000, FBE = 0x00002000, FBEMask = 0x00001800, ParityErr = 0x00000000, TargetErr = 0x00001000, MasterErr = 0x00000800, TUNF = 0x00000400, ROVF = 0x00000200, ETI = 0x00000100, ERI = 0x00000080, CNTOVF = 0x00000040, RBU = 0x00000020, TBU = 0x00000010, TI = 0x00000008, RI = 0x00000004, RxErr = 0x00000002, IntrSummary = 0x0001, IntrPCIErr = 0x0002, IntrMACCtrl = 0x0008, IntrTxDone = 0x0004, IntrRxDone = 0x0010, IntrRxStart = 0x0020, IntrDrvRqst = 0x0040, StatsMax = 0x0080, LinkChange = 0x0100, IntrTxDMADone = 0x0200, IntrRxDMADone = 0x0400, IntrRxDone = 0x0001, IntrRxErr = 0x0004, IntrRxEmpty = 0x0020, IntrTxDone = 0x0002, IntrTxError = 0x0008, IntrTxUnderrun = 0x0210, IntrPCIErr = 0x0040, IntrStatsMax = 0x0080, IntrRxEarly = 0x0100, IntrRxOverflow = 0x0400, IntrRxDropped = 0x0800, IntrRxNoBuf = 0x1000, IntrTxAborted = 0x2000, IntrLinkChange = 0x4000, IntrRxWakeUp = 0x8000, IntrNormalSummary = 0x0003, IntrAbnormalSummary = 0xC260, IntrTxDescRace = 0x080000, IntrTxErrSummary = 0x082218, NormalIntr = 0x10000, AbnormalIntr = 0x8000, IntrPCIErr = 0x2000, TimerInt = 0x800, IntrRxDied = 0x100, RxNoBuf = 0x80, IntrRxDone = 0x40, TxFIFOUnderflow = 0x20, RxErrIntr = 0x10, TxIdle = 0x04, IntrTxStopped = 0x02, IntrTxDone = 0x01 } |
| enum | rx_mode_bits { RxModeMask = 0xe0, AcceptAllPhys = 0x80, AcceptBroadcast = 0x40, AcceptMulticast = 0x20, AcceptRunt = 0x08, ALP = 0x04, AcceptErr = 0x02, AcceptMyPhys = 0x00000000, RxEnable = 0x00000001, RxFlowCtrl = 0x00002000, TxEnable = 0x00040000, TxModeFDX = 0x00100000, TxThreshold = 0x00e00000, PS1000 = 0x00010000, PS10 = 0x00080000, FD = 0x00100000, AcceptErr = 0x20, AcceptRunt = 0x10, AcceptBroadcast = 0xC0000000, AcceptMulticast = 0x00200000, AcceptAllMulticast = 0x20000000, AcceptAllPhys = 0x10000000, AcceptMyPhys = 0x08000000, RxFilterEnable = 0x80000000, AcceptAllIPMulti = 0x20, AcceptMultiHash = 0x10, AcceptAll = 0x08, AcceptBroadcast = 0x04, AcceptMulticast = 0x02, AcceptMyPhys, AcceptErr = 0x80, AcceptRunt = 0x40, AcceptBroadcast = 0x20, AcceptMulticast = 0x10, AcceptAllPhys = 0x08, AcceptMyPhys = 0x02 } |
| enum | mac_ctrl0_bits { EnbFullDuplex = 0x20, EnbRcvLargeFrame = 0x40, EnbFlowCtrl = 0x100, EnbPassRxCRC = 0x200 } |
| enum | mac_ctrl1_bits { StatsEnable = 0x0020, StatsDisable = 0x0040, StatsEnabled = 0x0080, TxEnable = 0x0100, TxDisable = 0x0200, TxEnabled = 0x0400, RxEnable = 0x0800, RxDisable = 0x1000, RxEnabled = 0x2000 } |
| enum | desc_status_bits { DescOwn = 0x80000000, DescMore = 0x40000000, DescIntr = 0x20000000, DescNoCRC = 0x10000000, DescPktOK = 0x08000000, RxTooLong = 0x00400000, DescOwn = 0x8000, DescEndPacket = 0x4000, DescEndRing = 0x2000, LastFrag = 0x80000000, DescIntrOnTx = 0x8000, DescIntrOnDMADone = 0x80000000, DisableAlign = 0x00000001, DescOwnded = 0x80000000, RxDescFatalErr = 0x8000, RxWholePkt = 0x0300, DescOwn = 0x80000000, DescEndRing = 0x02000000, DescUseLink = 0x01000000, DescWholePkt = 0x60000000, DescStartPkt = 0x20000000, DescEndPkt = 0x40000000, DescIntr = 0x80000000 } |
| enum | pci_id_flags_bits { PCI_USES_IO = 1, PCI_USES_MEM = 2, PCI_USES_MASTER = 4, PCI_ADDR0 = 0 << 4, PCI_ADDR1 = 1 << 4, PCI_ADDR2, PCI_ADDR3 = 3 << 4, PCI_USES_IO = 1, PCI_USES_MEM = 2, PCI_USES_MASTER = 4, PCI_ADDR0 = 0<<4, PCI_ADDR1 = 1<<4, PCI_ADDR2 = 2<<4, PCI_ADDR3 = 3<<4, PCI_ADDR_64BITS = 0x100, PCI_NO_ACPI_WAKE = 0x200, PCI_NO_MIN_LATENCY = 0x400, PCI_UNUSED_IRQ = 0x800 } |
| enum | chip_capability_flags { HAS_MII_XCVR, HAS_CHIP_XCVR, CanHaveMII = 1, KendinPktDropBug = 2, CanHaveMII = 1, HasBrokenTx = 2 } |
| enum | mii_reg_bits { MDIO_ShiftClk = 0x0001, MDIO_Data = 0x0002, MDIO_EnbOutput, MDIO_ShiftClk = 0x10000, MDIO_DataIn = 0x80000, MDIO_DataOut = 0x20000, MDIO_EnbOutput = 0x40000, MDIO_EnbIn = 0x00000 } |
Functions | |
| FILE_LICENCE (GPL2_OR_LATER) | |
| static int | eeprom_read (long ioaddr, int location) |
| static int | mdio_read (struct nic *nic, int phy_id, unsigned int location) |
| static void | mdio_write (struct nic *nic, int phy_id, unsigned int location, int value) |
| static void | set_rx_mode (struct nic *nic) |
| static void | check_duplex (struct nic *nic) |
| static void | init_ring (struct nic *nic __unused) |
| static void | sundance_reset (struct nic *nic) |
| static void | sundance_irq (struct nic *nic, irq_action_t action) |
| static int | sundance_poll (struct nic *nic, int retreive) |
| static void | sundance_transmit (struct nic *nic, const char *d, unsigned int t, unsigned int s, const char *p) |
| static void | sundance_disable (struct nic *nic __unused) |
| static int | sundance_probe (struct nic *nic, struct pci_device *pci) |
| static void | mdio_sync (long mdio_addr) |
| static int | mdio_read (struct nic *nic __unused, int phy_id, unsigned int location) |
| static void | mdio_write (struct nic *nic __unused, int phy_id, unsigned int location, int value) |
| static void | set_rx_mode (struct nic *nic __unused) |
| PCI_DRIVER (sundance_driver, sundance_nics, PCI_NO_CLASS) | |
| DRIVER ("SUNDANCE/PCI", nic_driver, pci_driver, sundance_driver, sundance_probe, sundance_disable) | |
Variables | |
| static int | mtu = 1514 |
| static int | rx_copybreak = 0 |
| static int | flowctrl = 1 |
| static char | media [] = "autosense" |
| static struct netdev_desc | tx_ring [TX_RING_SIZE] |
| static struct netdev_desc | rx_ring [RX_RING_SIZE] |
| struct { | |
| unsigned char txb [PKT_BUF_SZ *TX_RING_SIZE] | |
| unsigned char rxb [RX_RING_SIZE *PKT_BUF_SZ] | |
| } | __shared |
| static u32 | BASE |
| static struct sundance_private | sdx |
| static struct sundance_private * | sdc |
| static struct nic_operations | sundance_operations |
| static struct pci_device_id | sundance_nics [] |
| #define drv_version "v1.12" |
Definition at line 53 of file sundance.c.
| #define drv_date "2004-03-21" |
Definition at line 54 of file sundance.c.
| #define HZ 100 |
Definition at line 56 of file sundance.c.
| #define virt_to_le32desc | ( | addr | ) | cpu_to_le32(virt_to_bus(addr)) |
Definition at line 59 of file sundance.c.
| #define le32desc_to_virt | ( | addr | ) | bus_to_virt(le32_to_cpu(addr)) |
Definition at line 60 of file sundance.c.
| #define TX_RING_SIZE 2 |
Definition at line 91 of file sundance.c.
| #define TX_QUEUE_LEN 10 |
Definition at line 92 of file sundance.c.
| #define RX_RING_SIZE 4 |
Definition at line 93 of file sundance.c.
| #define TX_TIME_OUT (4*HZ) |
Definition at line 98 of file sundance.c.
| #define PKT_BUF_SZ 1536 |
Definition at line 99 of file sundance.c.
| #define rxb rx_tx_buf.rxb |
Definition at line 239 of file sundance.c.
| #define txb rx_tx_buf.txb |
Definition at line 240 of file sundance.c.
| #define EEPROM_SIZE 128 |
Definition at line 244 of file sundance.c.
| #define PCI_IOTYPE (PCI_USES_MASTER | PCI_USES_IO | PCI_ADDR0) |
Definition at line 253 of file sundance.c.
| #define MII_CNT 4 |
Definition at line 255 of file sundance.c.
| #define EEPROM_SA_OFFSET 0x10 |
| #define DEFAULT_INTR |
Value:
(IntrRxDMADone | IntrPCIErr | \ IntrDrvRqst | IntrTxDone | StatsMax | \ LinkChange)
Definition at line 280 of file sundance.c.
Referenced by rhine_irq(), rhine_poll(), sundance_irq(), and sundance_poll().
| #define mdio_in | ( | mdio_addr | ) | inb(mdio_addr) |
| #define mdio_out | ( | value, | |||
| mdio_addr | ) | outb(value, mdio_addr) |
Definition at line 774 of file sundance.c.
Referenced by mdio_read(), mdio_sync(), and mdio_write().
| #define mdio_delay | ( | mdio_addr | ) | inb(mdio_addr) |
Definition at line 775 of file sundance.c.
Referenced by mdio_read(), mdio_sync(), and mdio_write().
| #define MDIO_EnbIn (0) |
| #define MDIO_WRITE0 (MDIO_EnbOutput) |
| #define MDIO_WRITE1 (MDIO_Data | MDIO_EnbOutput) |
Definition at line 783 of file sundance.c.
Referenced by mdio_read(), mdio_sync(), and mdio_write().
| enum alta_offsets |
Definition at line 109 of file sundance.c.
00109 { 00110 DMACtrl = 0x00, 00111 TxListPtr = 0x04, 00112 TxDMABurstThresh = 0x08, 00113 TxDMAUrgentThresh = 0x09, 00114 TxDMAPollPeriod = 0x0a, 00115 RxDMAStatus = 0x0c, 00116 RxListPtr = 0x10, 00117 DebugCtrl0 = 0x1a, 00118 DebugCtrl1 = 0x1c, 00119 RxDMABurstThresh = 0x14, 00120 RxDMAUrgentThresh = 0x15, 00121 RxDMAPollPeriod = 0x16, 00122 LEDCtrl = 0x1a, 00123 ASICCtrl = 0x30, 00124 EEData = 0x34, 00125 EECtrl = 0x36, 00126 TxStartThresh = 0x3c, 00127 RxEarlyThresh = 0x3e, 00128 FlashAddr = 0x40, 00129 FlashData = 0x44, 00130 TxStatus = 0x46, 00131 TxFrameId = 0x47, 00132 DownCounter = 0x18, 00133 IntrClear = 0x4a, 00134 IntrEnable = 0x4c, 00135 IntrStatus = 0x4e, 00136 MACCtrl0 = 0x50, 00137 MACCtrl1 = 0x52, 00138 StationAddr = 0x54, 00139 MaxFrameSize = 0x5A, 00140 RxMode = 0x5c, 00141 MIICtrl = 0x5e, 00142 MulticastFilter0 = 0x60, 00143 MulticastFilter1 = 0x64, 00144 RxOctetsLow = 0x68, 00145 RxOctetsHigh = 0x6a, 00146 TxOctetsLow = 0x6c, 00147 TxOctetsHigh = 0x6e, 00148 TxFramesOK = 0x70, 00149 RxFramesOK = 0x72, 00150 StatsCarrierError = 0x74, 00151 StatsLateColl = 0x75, 00152 StatsMultiColl = 0x76, 00153 StatsOneColl = 0x77, 00154 StatsTxDefer = 0x78, 00155 RxMissed = 0x79, 00156 StatsTxXSDefer = 0x7a, 00157 StatsTxAbort = 0x7b, 00158 StatsBcastTx = 0x7c, 00159 StatsBcastRx = 0x7d, 00160 StatsMcastTx = 0x7e, 00161 StatsMcastRx = 0x7f, 00162 /* Aliased and bogus values! */ 00163 RxStatus = 0x0c, 00164 };
| enum ASICCtrl_HiWord_bit |
Definition at line 165 of file sundance.c.
00165 { 00166 GlobalReset = 0x0001, 00167 RxReset = 0x0002, 00168 TxReset = 0x0004, 00169 DMAReset = 0x0008, 00170 FIFOReset = 0x0010, 00171 NetworkReset = 0x0020, 00172 HostReset = 0x0040, 00173 ResetBusy = 0x0400, 00174 };
| enum intr_status_bits |
Definition at line 177 of file sundance.c.
00177 { 00178 IntrSummary = 0x0001, IntrPCIErr = 0x0002, IntrMACCtrl = 0x0008, 00179 IntrTxDone = 0x0004, IntrRxDone = 0x0010, IntrRxStart = 0x0020, 00180 IntrDrvRqst = 0x0040, 00181 StatsMax = 0x0080, LinkChange = 0x0100, 00182 IntrTxDMADone = 0x0200, IntrRxDMADone = 0x0400, 00183 };
| enum rx_mode_bits |
Definition at line 186 of file sundance.c.
00186 { 00187 AcceptAllIPMulti = 0x20, AcceptMultiHash = 0x10, AcceptAll = 0x08, 00188 AcceptBroadcast = 0x04, AcceptMulticast = 0x02, AcceptMyPhys = 00189 0x01, 00190 };
| enum mac_ctrl0_bits |
Definition at line 192 of file sundance.c.
00192 { 00193 EnbFullDuplex = 0x20, EnbRcvLargeFrame = 0x40, 00194 EnbFlowCtrl = 0x100, EnbPassRxCRC = 0x200, 00195 };
| enum mac_ctrl1_bits |
| StatsEnable | |
| StatsDisable | |
| StatsEnabled | |
| TxEnable | |
| TxDisable | |
| TxEnabled | |
| RxEnable | |
| RxDisable | |
| RxEnabled |
Definition at line 196 of file sundance.c.
00196 { 00197 StatsEnable = 0x0020, StatsDisable = 0x0040, StatsEnabled = 0x0080, 00198 TxEnable = 0x0100, TxDisable = 0x0200, TxEnabled = 0x0400, 00199 RxEnable = 0x0800, RxDisable = 0x1000, RxEnabled = 0x2000, 00200 };
| enum desc_status_bits |
Definition at line 214 of file sundance.c.
00214 { 00215 DescOwn = 0x8000, 00216 DescEndPacket = 0x4000, 00217 DescEndRing = 0x2000, 00218 LastFrag = 0x80000000, 00219 DescIntrOnTx = 0x8000, 00220 DescIntrOnDMADone = 0x80000000, 00221 DisableAlign = 0x00000001, 00222 };
| enum pci_id_flags_bits |
Definition at line 246 of file sundance.c.
00246 { 00247 PCI_USES_IO = 1, PCI_USES_MEM = 2, PCI_USES_MASTER = 4, 00248 PCI_ADDR0 = 0 << 4, PCI_ADDR1 = 1 << 4, PCI_ADDR2 = 00249 2 << 4, PCI_ADDR3 = 3 << 4, 00250 };
| enum mii_reg_bits |
| MDIO_ShiftClk | |
| MDIO_Data | |
| MDIO_EnbOutput | |
| MDIO_ShiftClk | |
| MDIO_DataIn | |
| MDIO_DataOut | |
| MDIO_EnbOutput | |
| MDIO_EnbIn |
Definition at line 777 of file sundance.c.
00777 { 00778 MDIO_ShiftClk = 0x0001, MDIO_Data = 0x0002, MDIO_EnbOutput = 00779 0x0004, 00780 };
| FILE_LICENCE | ( | GPL2_OR_LATER | ) |
| static int eeprom_read | ( | long | ioaddr, | |
| int | location | |||
| ) | [static] |
Definition at line 750 of file sundance.c.
References EECtrl, EEData, inw, and outw.
Referenced by sundance_probe(), and w89c840_probe().
00751 { 00752 int boguscnt = 10000; /* Typical 1900 ticks */ 00753 outw(0x0200 | (location & 0xff), ioaddr + EECtrl); 00754 do { 00755 if (!(inw(ioaddr + EECtrl) & 0x8000)) { 00756 return inw(ioaddr + EEData); 00757 } 00758 } 00759 while (--boguscnt > 0); 00760 return 0; 00761 }
| static int mdio_read | ( | struct nic * | nic, | |
| int | phy_id, | |||
| unsigned int | location | |||
| ) | [static] |
| static void mdio_write | ( | struct nic * | nic, | |
| int | phy_id, | |||
| unsigned int | location, | |||
| int | value | |||
| ) | [static] |
| static void set_rx_mode | ( | struct nic * | nic | ) | [static] |
| static void check_duplex | ( | struct nic * | nic | ) | [static] |
Definition at line 290 of file sundance.c.
References mii_if_info::advertising, sundance_private::an_enable, BASE, DBG, EnbFullDuplex, mii_if_info::full_duplex, inw, MACCtrl0, mdio_read(), sundance_private::mii_if, MII_LPA, sundance_private::nic_name, outw, and sundance_private::phys.
Referenced by sundance_probe(), and w89c840_reset().
00291 { 00292 int mii_lpa = mdio_read(nic, sdc->phys[0], MII_LPA); 00293 int negotiated = mii_lpa & sdc->mii_if.advertising; 00294 int duplex; 00295 00296 /* Force media */ 00297 if (!sdc->an_enable || mii_lpa == 0xffff) { 00298 if (sdc->mii_if.full_duplex) 00299 outw(inw(BASE + MACCtrl0) | EnbFullDuplex, 00300 BASE + MACCtrl0); 00301 return; 00302 } 00303 00304 /* Autonegotiation */ 00305 duplex = (negotiated & 0x0100) || (negotiated & 0x01C0) == 0x0040; 00306 if (sdc->mii_if.full_duplex != duplex) { 00307 sdc->mii_if.full_duplex = duplex; 00308 DBG ("%s: Setting %s-duplex based on MII #%d " 00309 "negotiated capability %4.4x.\n", sdc->nic_name, 00310 duplex ? "full" : "half", sdc->phys[0], 00311 negotiated ); 00312 outw(inw(BASE + MACCtrl0) | duplex ? 0x20 : 0, 00313 BASE + MACCtrl0); 00314 } 00315 }
Definition at line 321 of file sundance.c.
References cpu_to_le32, sundance_private::cur_rx, LastFrag, PKT_BUF_SZ, rx_ring, RX_RING_SIZE, rxb, tx_ring, txb, virt_to_bus(), and virt_to_le32desc.
00322 { 00323 int i; 00324 00325 sdc->cur_rx = 0; 00326 00327 /* Initialize all the Rx descriptors */ 00328 for (i = 0; i < RX_RING_SIZE; i++) { 00329 rx_ring[i].next_desc = virt_to_le32desc(&rx_ring[i + 1]); 00330 rx_ring[i].status = 0; 00331 rx_ring[i].length = 0; 00332 rx_ring[i].addr = 0; 00333 } 00334 00335 /* Mark the last entry as wrapping the ring */ 00336 rx_ring[i - 1].next_desc = virt_to_le32desc(&rx_ring[0]); 00337 00338 for (i = 0; i < RX_RING_SIZE; i++) { 00339 rx_ring[i].addr = virt_to_le32desc(&rxb[i * PKT_BUF_SZ]); 00340 rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ | LastFrag); 00341 } 00342 00343 /* We only use one transmit buffer, but two 00344 * descriptors so transmit engines have somewhere 00345 * to point should they feel the need */ 00346 tx_ring[0].status = 0x00000000; 00347 tx_ring[0].addr = virt_to_bus(&txb[0]); 00348 tx_ring[0].next_desc = 0; /* virt_to_bus(&tx_ring[1]); */ 00349 00350 /* This descriptor is never used */ 00351 tx_ring[1].status = 0x00000000; 00352 tx_ring[1].addr = 0; /*virt_to_bus(&txb[0]); */ 00353 tx_ring[1].next_desc = 0; 00354 00355 /* Mark the last entry as wrapping the ring, 00356 * though this should never happen */ 00357 tx_ring[1].length = cpu_to_le32(LastFrag | PKT_BUF_SZ); 00358 }
| static void sundance_reset | ( | struct nic * | nic | ) | [static] |
Definition at line 363 of file sundance.c.
References ASICCtrl, BASE, DBG, DebugCtrl1, DownCounter, init_ring(), inl, inw, MACCtrl0, MACCtrl1, MaxFrameSize, sundance_private::mtu, sundance_private::nic_name, nic::node_addr, outb, outl, outw, sundance_private::pci_rev_id, rx_ring, RxDMAPollPeriod, RxEnable, RxListPtr, RxStatus, set_rx_mode(), StationAddr, txb, TxEnable, TxStatus, u16, virt_to_le32desc, and writeb.
Referenced by sundance_probe().
00364 { 00365 int i; 00366 00367 init_ring(nic); 00368 00369 outl(virt_to_le32desc(&rx_ring[0]), BASE + RxListPtr); 00370 /* The Tx List Pointer is written as packets are queued */ 00371 00372 /* Initialize other registers. */ 00373 /* __set_mac_addr(dev); */ 00374 { 00375 u16 addr16; 00376 00377 addr16 = (nic->node_addr[0] | (nic->node_addr[1] << 8)); 00378 outw(addr16, BASE + StationAddr); 00379 addr16 = (nic->node_addr[2] | (nic->node_addr[3] << 8)); 00380 outw(addr16, BASE + StationAddr + 2); 00381 addr16 = (nic->node_addr[4] | (nic->node_addr[5] << 8)); 00382 outw(addr16, BASE + StationAddr + 4); 00383 } 00384 00385 outw(sdc->mtu + 14, BASE + MaxFrameSize); 00386 if (sdc->mtu > 2047) /* this will never happen with default options */ 00387 outl(inl(BASE + ASICCtrl) | 0x0c, BASE + ASICCtrl); 00388 00389 set_rx_mode(nic); 00390 00391 outw(0, BASE + DownCounter); 00392 /* Set the chip to poll every N*30nsec */ 00393 outb(100, BASE + RxDMAPollPeriod); 00394 00395 /* Fix DFE-580TX packet drop issue */ 00396 if (sdc->pci_rev_id >= 0x14) 00397 writeb(0x01, BASE + DebugCtrl1); 00398 00399 outw(RxEnable | TxEnable, BASE + MACCtrl1); 00400 00401 /* Construct a perfect filter frame with the mac address as first match 00402 * and broadcast for all others */ 00403 for (i = 0; i < 192; i++) 00404 txb[i] = 0xFF; 00405 00406 txb[0] = nic->node_addr[0]; 00407 txb[1] = nic->node_addr[1]; 00408 txb[2] = nic->node_addr[2]; 00409 txb[3] = nic->node_addr[3]; 00410 txb[4] = nic->node_addr[4]; 00411 txb[5] = nic->node_addr[5]; 00412 00413 DBG ( "%s: Done sundance_reset, status: Rx %hX Tx %hX " 00414 "MAC Control %hX, %hX %hX\n", 00415 sdc->nic_name, (int) inl(BASE + RxStatus), 00416 (int) inw(BASE + TxStatus), (int) inl(BASE + MACCtrl0), 00417 (int) inw(BASE + MACCtrl1), (int) inw(BASE + MACCtrl0) ); 00418 }
| static void sundance_irq | ( | struct nic * | nic, | |
| irq_action_t | action | |||
| ) | [static] |
Definition at line 423 of file sundance.c.
References ASICCtrl, BASE, DEFAULT_INTR, DISABLE, ENABLE, FORCE, IntrEnable, IntrStatus, inw, nic::ioaddr, and outw.
00423 { 00424 unsigned int intr_status; 00425 00426 switch ( action ) { 00427 case DISABLE : 00428 case ENABLE : 00429 intr_status = inw(nic->ioaddr + IntrStatus); 00430 intr_status = intr_status & ~DEFAULT_INTR; 00431 if ( action == ENABLE ) 00432 intr_status = intr_status | DEFAULT_INTR; 00433 outw(intr_status, nic->ioaddr + IntrEnable); 00434 break; 00435 case FORCE : 00436 outw(0x0200, BASE + ASICCtrl); 00437 break; 00438 } 00439 }
| static int sundance_poll | ( | struct nic * | nic, | |
| int | retreive | |||
| ) | [static] |
Definition at line 443 of file sundance.c.
References cpu_to_le32, sundance_private::cur_rx, DBG, DEFAULT_INTR, DescOwn, entry, IntrRxDMADone, IntrRxDone, IntrStatus, inw, nic::ioaddr, LastFrag, le32_to_cpu, memcpy, outw, nic::packet, nic::packetlen, PKT_BUF_SZ, printf(), rx_copybreak, rx_ring, RX_RING_SIZE, rxb, and u32.
00444 { 00445 /* return true if there's an ethernet packet ready to read */ 00446 /* nic->packet should contain data on return */ 00447 /* nic->packetlen should contain length of data */ 00448 int entry = sdc->cur_rx % RX_RING_SIZE; 00449 u32 frame_status = le32_to_cpu(rx_ring[entry].status); 00450 int intr_status; 00451 int pkt_len = 0; 00452 00453 if (!(frame_status & DescOwn)) 00454 return 0; 00455 00456 /* There is a packet ready */ 00457 if(!retreive) 00458 return 1; 00459 00460 intr_status = inw(nic->ioaddr + IntrStatus); 00461 outw(intr_status, nic->ioaddr + IntrStatus); 00462 00463 pkt_len = frame_status & 0x1fff; 00464 00465 if (frame_status & 0x001f4000) { 00466 DBG ( "Polling frame_status error\n" ); /* Do we really care about this */ 00467 } else { 00468 if (pkt_len < rx_copybreak) { 00469 /* FIXME: What should happen Will this ever occur */ 00470 printf("Poll Error: pkt_len < rx_copybreak"); 00471 } else { 00472 nic->packetlen = pkt_len; 00473 memcpy(nic->packet, rxb + 00474 (sdc->cur_rx * PKT_BUF_SZ), nic->packetlen); 00475 00476 } 00477 } 00478 rx_ring[entry].length = cpu_to_le32(PKT_BUF_SZ | LastFrag); 00479 rx_ring[entry].status = 0; 00480 entry++; 00481 sdc->cur_rx = entry % RX_RING_SIZE; 00482 outw(DEFAULT_INTR & ~(IntrRxDone|IntrRxDMADone), 00483 nic->ioaddr + IntrStatus); 00484 return 1; 00485 }
| static void sundance_transmit | ( | struct nic * | nic, | |
| const char * | d, | |||
| unsigned int | t, | |||
| unsigned int | s, | |||
| const char * | p | |||
| ) | [static] |
Definition at line 490 of file sundance.c.
References BASE, cpu_to_le32, currticks(), ETH_ALEN, ETH_HLEN, ETH_ZLEN, htons, LastFrag, MACCtrl1, memcpy, nic::node_addr, outl, outw, printf(), tx_ring, TX_TIME_OUT, txb, TxDisable, TxEnable, TxListPtr, TxStatus, u16, u32, u8, and virt_to_le32desc.
00494 { /* Packet */ 00495 u16 nstype; 00496 u32 to; 00497 00498 /* Disable the Tx */ 00499 outw(TxDisable, BASE + MACCtrl1); 00500 00501 memcpy(txb, d, ETH_ALEN); 00502 memcpy(txb + ETH_ALEN, nic->node_addr, ETH_ALEN); 00503 nstype = htons((u16) t); 00504 memcpy(txb + 2 * ETH_ALEN, (u8 *) & nstype, 2); 00505 memcpy(txb + ETH_HLEN, p, s); 00506 00507 s += ETH_HLEN; 00508 s &= 0x0FFF; 00509 while (s < ETH_ZLEN) 00510 txb[s++] = '\0'; 00511 00512 /* Setup the transmit descriptor */ 00513 tx_ring[0].length = cpu_to_le32(s | LastFrag); 00514 tx_ring[0].status = cpu_to_le32(0x00000001); 00515 00516 /* Point to transmit descriptor */ 00517 outl(virt_to_le32desc(&tx_ring[0]), BASE + TxListPtr); 00518 00519 /* Enable Tx */ 00520 outw(TxEnable, BASE + MACCtrl1); 00521 /* Trigger an immediate send */ 00522 outw(0, BASE + TxStatus); 00523 00524 to = currticks() + TX_TIME_OUT; 00525 while (!(tx_ring[0].status & 0x00010000) && (currticks() < to)); /* wait */ 00526 00527 if (currticks() >= to) { 00528 printf("TX Time Out"); 00529 } 00530 /* Disable Tx */ 00531 outw(TxDisable, BASE + MACCtrl1); 00532 00533 }
Definition at line 538 of file sundance.c.
References BASE, IntrEnable, MACCtrl1, outw, RxDisable, StatsDisable, and TxDisable.
00538 { 00539 /* put the card in its initial state */ 00540 /* This function serves 3 purposes. 00541 * This disables DMA and interrupts so we don't receive 00542 * unexpected packets or interrupts from the card after 00543 * etherboot has finished. 00544 * This frees resources so etherboot may use 00545 * this driver on another interface 00546 * This allows etherboot to reinitialize the interface 00547 * if something is something goes wrong. 00548 */ 00549 outw(0x0000, BASE + IntrEnable); 00550 /* Stop the Chipchips Tx and Rx Status */ 00551 outw(TxDisable | RxDisable | StatsDisable, BASE + MACCtrl1); 00552 }
| static int sundance_probe | ( | struct nic * | nic, | |
| struct pci_device * | pci | |||
| ) | [static] |
Definition at line 565 of file sundance.c.
References adjust_pci_device(), ADVERTISE_100FULL, ADVERTISE_100HALF, ADVERTISE_10FULL, ADVERTISE_10HALF, mii_if_info::advertising, sundance_private::an_enable, ASICCtrl, BASE, BMCR_FULLDPLX, BMCR_SPEED100, check_duplex(), DBG, pci_device::device, pci_device::driver_name, ee_data, eeprom_read(), EEPROM_SA_OFFSET, EEPROM_SIZE, EnbFlowCtrl, ETH_ALEN, sundance_private::flowctrl, flowctrl, mii_if_info::full_duplex, inl, inw, nic::ioaddr, pci_device::ioaddr, pci_device::irq, nic::irqno, le16_to_cpu, MACCtrl0, mdio_read(), mdio_write(), media, MII_ADVERTISE, MII_BMCR, MII_BMSR, MII_CNT, sundance_private::mii_if, MII_LPA, sundance_private::mii_preamble_required, mtu, sundance_private::mtu, MulticastFilter1, sundance_private::nic_name, nic::nic_op, nic::node_addr, outw, pci_read_config_byte(), sundance_private::pci_rev_id, PCI_REVISION_ID, mii_if_info::phy_id, sundance_private::phys, printf(), ResetBusy, sdx, sundance_private::speed, strcasecmp(), sundance_reset(), u16, u8, udelay(), and pci_device::vendor.
00565 { 00566 00567 u8 ee_data[EEPROM_SIZE]; 00568 u16 mii_ctl; 00569 int i; 00570 int speed; 00571 00572 if (pci->ioaddr == 0) 00573 return 0; 00574 00575 /* BASE is used throughout to address the card */ 00576 BASE = pci->ioaddr; 00577 printf(" sundance.c: Found %s Vendor=0x%hX Device=0x%hX\n", 00578 pci->driver_name, pci->vendor, pci->device); 00579 00580 /* Get the MAC Address by reading the EEPROM */ 00581 for (i = 0; i < 3; i++) { 00582 ((u16 *) ee_data)[i] = 00583 le16_to_cpu(eeprom_read(BASE, i + EEPROM_SA_OFFSET)); 00584 } 00585 /* Update the nic structure with the MAC Address */ 00586 for (i = 0; i < ETH_ALEN; i++) { 00587 nic->node_addr[i] = ee_data[i]; 00588 } 00589 00590 /* Set the card as PCI Bus Master */ 00591 adjust_pci_device(pci); 00592 00593 // sdc->mii_if.dev = pci; 00594 // sdc->mii_if.phy_id_mask = 0x1f; 00595 // sdc->mii_if.reg_num_mask = 0x1f; 00596 00597 /* point to private storage */ 00598 sdc = &sdx; 00599 00600 sdc->nic_name = pci->driver_name; 00601 sdc->mtu = mtu; 00602 00603 pci_read_config_byte(pci, PCI_REVISION_ID, &sdc->pci_rev_id); 00604 00605 DBG ( "Device revision id: %hx\n", sdc->pci_rev_id ); 00606 00607 /* Print out some hardware info */ 00608 DBG ( "%s: %s at ioaddr %hX, ", pci->driver_name, nic->node_addr, (unsigned int) BASE); 00609 00610 sdc->mii_preamble_required = 0; 00611 if (1) { 00612 int phy, phy_idx = 0; 00613 sdc->phys[0] = 1; /* Default Setting */ 00614 sdc->mii_preamble_required++; 00615 for (phy = 1; phy < 32 && phy_idx < MII_CNT; phy++) { 00616 int mii_status = mdio_read(nic, phy, MII_BMSR); 00617 if (mii_status != 0xffff && mii_status != 0x0000) { 00618 sdc->phys[phy_idx++] = phy; 00619 sdc->mii_if.advertising = 00620 mdio_read(nic, phy, MII_ADVERTISE); 00621 if ((mii_status & 0x0040) == 0) 00622 sdc->mii_preamble_required++; 00623 DBG 00624 ( "%s: MII PHY found at address %d, status " "%hX advertising %hX\n", sdc->nic_name, phy, mii_status, sdc->mii_if.advertising ); 00625 } 00626 } 00627 sdc->mii_preamble_required--; 00628 if (phy_idx == 0) 00629 printf("%s: No MII transceiver found!\n", 00630 sdc->nic_name); 00631 sdc->mii_if.phy_id = sdc->phys[0]; 00632 } 00633 00634 /* Parse override configuration */ 00635 sdc->an_enable = 1; 00636 if (strcasecmp(media, "autosense") != 0) { 00637 sdc->an_enable = 0; 00638 if (strcasecmp(media, "100mbps_fd") == 0 || 00639 strcasecmp(media, "4") == 0) { 00640 sdc->speed = 100; 00641 sdc->mii_if.full_duplex = 1; 00642 } else if (strcasecmp(media, "100mbps_hd") == 0 00643 || strcasecmp(media, "3") == 0) { 00644 sdc->speed = 100; 00645 sdc->mii_if.full_duplex = 0; 00646 } else if (strcasecmp(media, "10mbps_fd") == 0 || 00647 strcasecmp(media, "2") == 0) { 00648 sdc->speed = 10; 00649 sdc->mii_if.full_duplex = 1; 00650 } else if (strcasecmp(media, "10mbps_hd") == 0 || 00651 strcasecmp(media, "1") == 0) { 00652 sdc->speed = 10; 00653 sdc->mii_if.full_duplex = 0; 00654 } else { 00655 sdc->an_enable = 1; 00656 } 00657 } 00658 if (flowctrl == 1) 00659 sdc->flowctrl = 1; 00660 00661 /* Fibre PHY? */ 00662 if (inl(BASE + ASICCtrl) & 0x80) { 00663 /* Default 100Mbps Full */ 00664 if (sdc->an_enable) { 00665 sdc->speed = 100; 00666 sdc->mii_if.full_duplex = 1; 00667 sdc->an_enable = 0; 00668 } 00669 } 00670 00671 /* The Linux driver uses flow control and resets the link here. This means the 00672 mii section from above would need to be re done I believe. Since it serves 00673 no real purpose leave it out. */ 00674 00675 /* Force media type */ 00676 if (!sdc->an_enable) { 00677 mii_ctl = 0; 00678 mii_ctl |= (sdc->speed == 100) ? BMCR_SPEED100 : 0; 00679 mii_ctl |= (sdc->mii_if.full_duplex) ? BMCR_FULLDPLX : 0; 00680 mdio_write(nic, sdc->phys[0], MII_BMCR, mii_ctl); 00681 printf("Override speed=%d, %s duplex\n", 00682 sdc->speed, 00683 sdc->mii_if.full_duplex ? "Full" : "Half"); 00684 } 00685 00686 /* Reset the chip to erase previous misconfiguration */ 00687 DBG ( "ASIC Control is %#x\n", inl(BASE + ASICCtrl) ); 00688 outw(0x007f, BASE + ASICCtrl + 2); 00689 00690 /* 00691 * wait for reset to complete 00692 * this is heavily inspired by the linux sundance driver 00693 * according to the linux driver it can take up to 1ms for the reset 00694 * to complete 00695 */ 00696 i = 0; 00697 while(inl(BASE + ASICCtrl) & (ResetBusy << 16)) { 00698 if(i++ >= 10) { 00699 DBG("sundance: NIC reset did not complete.\n"); 00700 break; 00701 } 00702 udelay(100); 00703 } 00704 00705 DBG ( "ASIC Control is now %#x.\n", inl(BASE + ASICCtrl) ); 00706 00707 sundance_reset(nic); 00708 if (sdc->an_enable) { 00709 u16 mii_advertise, mii_lpa; 00710 mii_advertise = 00711 mdio_read(nic, sdc->phys[0], MII_ADVERTISE); 00712 mii_lpa = mdio_read(nic, sdc->phys[0], MII_LPA); 00713 mii_advertise &= mii_lpa; 00714 if (mii_advertise & ADVERTISE_100FULL) 00715 sdc->speed = 100; 00716 else if (mii_advertise & ADVERTISE_100HALF) 00717 sdc->speed = 100; 00718 else if (mii_advertise & ADVERTISE_10FULL) 00719 sdc->speed = 10; 00720 else if (mii_advertise & ADVERTISE_10HALF) 00721 sdc->speed = 10; 00722 } else { 00723 mii_ctl = mdio_read(nic, sdc->phys[0], MII_BMCR); 00724 speed = (mii_ctl & BMCR_SPEED100) ? 100 : 10; 00725 sdc->speed = speed; 00726 printf("%s: Link changed: %dMbps ,", sdc->nic_name, speed); 00727 printf("%s duplex.\n", (mii_ctl & BMCR_FULLDPLX) ? 00728 "full" : "half"); 00729 } 00730 check_duplex(nic); 00731 if (sdc->flowctrl && sdc->mii_if.full_duplex) { 00732 outw(inw(BASE + MulticastFilter1 + 2) | 0x0200, 00733 BASE + MulticastFilter1 + 2); 00734 outw(inw(BASE + MACCtrl0) | EnbFlowCtrl, BASE + MACCtrl0); 00735 } 00736 printf("%dMbps, %s-Duplex\n", sdc->speed, 00737 sdc->mii_if.full_duplex ? "Full" : "Half"); 00738 00739 /* point to NIC specific routines */ 00740 nic->nic_op = &sundance_operations; 00741 00742 nic->irqno = pci->irq; 00743 nic->ioaddr = BASE; 00744 00745 return 1; 00746 }
| static void mdio_sync | ( | long | mdio_addr | ) | [static] |
Definition at line 787 of file sundance.c.
References mdio_delay, mdio_out, MDIO_ShiftClk, and MDIO_WRITE1.
Referenced by mdio_read(), and mdio_write().
00788 { 00789 int bits = 32; 00790 00791 /* Establish sync by sending at least 32 logic ones. */ 00792 while (--bits >= 0) { 00793 mdio_out(MDIO_WRITE1, mdio_addr); 00794 mdio_delay(mdio_addr); 00795 mdio_out(MDIO_WRITE1 | MDIO_ShiftClk, mdio_addr); 00796 mdio_delay(mdio_addr); 00797 } 00798 }
Definition at line 801 of file sundance.c.
References BASE, MDIO_Data, mdio_delay, MDIO_EnbIn, mdio_in, mdio_out, MDIO_ShiftClk, mdio_sync(), MDIO_WRITE0, MDIO_WRITE1, sundance_private::mii_preamble_required, and MIICtrl.
00802 { 00803 long mdio_addr = BASE + MIICtrl; 00804 int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location; 00805 int i, retval = 0; 00806 00807 if (sdc->mii_preamble_required) 00808 mdio_sync(mdio_addr); 00809 00810 /* Shift the read command bits out. */ 00811 for (i = 15; i >= 0; i--) { 00812 int dataval = 00813 (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0; 00814 00815 mdio_out(dataval, mdio_addr); 00816 mdio_delay(mdio_addr); 00817 mdio_out(dataval | MDIO_ShiftClk, mdio_addr); 00818 mdio_delay(mdio_addr); 00819 } 00820 /* Read the two transition, 16 data, and wire-idle bits. */ 00821 for (i = 19; i > 0; i--) { 00822 mdio_out(MDIO_EnbIn, mdio_addr); 00823 mdio_delay(mdio_addr); 00824 retval = (retval << 1) | ((mdio_in(mdio_addr) & MDIO_Data) 00825 ? 1 : 0); 00826 mdio_out(MDIO_EnbIn | MDIO_ShiftClk, mdio_addr); 00827 mdio_delay(mdio_addr); 00828 } 00829 return (retval >> 1) & 0xffff; 00830 }
| static void mdio_write | ( | struct nic *nic | __unused, | |
| int | phy_id, | |||
| unsigned int | location, | |||
| int | value | |||
| ) | [static] |
Definition at line 833 of file sundance.c.
References BASE, mdio_delay, MDIO_EnbIn, mdio_out, MDIO_ShiftClk, mdio_sync(), MDIO_WRITE0, MDIO_WRITE1, sundance_private::mii_preamble_required, and MIICtrl.
00835 { 00836 long mdio_addr = BASE + MIICtrl; 00837 int mii_cmd = 00838 (0x5002 << 16) | (phy_id << 23) | (location << 18) | value; 00839 int i; 00840 00841 if (sdc->mii_preamble_required) 00842 mdio_sync(mdio_addr); 00843 00844 /* Shift the command bits out. */ 00845 for (i = 31; i >= 0; i--) { 00846 int dataval = 00847 (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0; 00848 mdio_out(dataval, mdio_addr); 00849 mdio_delay(mdio_addr); 00850 mdio_out(dataval | MDIO_ShiftClk, mdio_addr); 00851 mdio_delay(mdio_addr); 00852 } 00853 /* Clear out extra bits. */ 00854 for (i = 2; i > 0; i--) { 00855 mdio_out(MDIO_EnbIn, mdio_addr); 00856 mdio_delay(mdio_addr); 00857 mdio_out(MDIO_EnbIn | MDIO_ShiftClk, mdio_addr); 00858 mdio_delay(mdio_addr); 00859 } 00860 return; 00861 }
Definition at line 863 of file sundance.c.
References AcceptBroadcast, AcceptMulticast, AcceptMyPhys, BASE, sundance_private::flowctrl, mii_if_info::full_duplex, memset(), sundance_private::mii_if, MulticastFilter0, outb, outw, RxMode, u16, and u32.
00864 { 00865 int i; 00866 u16 mc_filter[4]; /* Multicast hash filter */ 00867 u32 rx_mode; 00868 00869 memset(mc_filter, 0xff, sizeof(mc_filter)); 00870 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys; 00871 00872 if (sdc->mii_if.full_duplex && sdc->flowctrl) 00873 mc_filter[3] |= 0x0200; 00874 for (i = 0; i < 4; i++) 00875 outw(mc_filter[i], BASE + MulticastFilter0 + i * 2); 00876 outb(rx_mode, BASE + RxMode); 00877 return; 00878 }
| PCI_DRIVER | ( | sundance_driver | , | |
| sundance_nics | , | |||
| PCI_NO_CLASS | ||||
| ) |
| DRIVER | ( | "SUNDANCE/PCI" | , | |
| nic_driver | , | |||
| pci_driver | , | |||
| sundance_driver | , | |||
| sundance_probe | , | |||
| sundance_disable | ||||
| ) |
int mtu = 1514 [static] |
Definition at line 63 of file sundance.c.
Referenced by __vxge_hw_vpath_mgmt_read(), hermon_open(), and sundance_probe().
int rx_copybreak = 0 [static] |
int flowctrl = 1 [static] |
char media[] = "autosense" [static] |
Definition at line 84 of file sundance.c.
Referenced by mii_check_media(), parse_eeprom(), pcnet32_probe(), smc9000_probe(), sundance_probe(), and TLan_FinishReset().
struct netdev_desc tx_ring[TX_RING_SIZE] [static] |
Definition at line 228 of file sundance.c.
struct netdev_desc rx_ring[RX_RING_SIZE] [static] |
Definition at line 231 of file sundance.c.
| unsigned char txb[PKT_BUF_SZ *TX_RING_SIZE] |
Definition at line 236 of file sundance.c.
| unsigned char rxb[RX_RING_SIZE *PKT_BUF_SZ] |
Definition at line 237 of file sundance.c.
| struct { ... } __shared |
Definition at line 243 of file sundance.c.
struct sundance_private sdx [static] |
Referenced by sundance_probe().
struct sundance_private* sdc [static] |
Definition at line 276 of file sundance.c.
struct nic_operations sundance_operations [static] |
Initial value:
{
.connect = dummy_connect,
.poll = sundance_poll,
.transmit = sundance_transmit,
.irq = sundance_irq,
}
Definition at line 554 of file sundance.c.
struct pci_device_id sundance_nics[] [static] |
Initial value:
{
PCI_ROM(0x13f0, 0x0201, "sundance", "ST201 Sundance 'Alta' based Adaptor", 0),
PCI_ROM(0x1186, 0x1002, "dfe530txs", "D-Link DFE530TXS (Sundance ST201 Alta)", 0),
PCI_ROM(0x13f0, 0x0200, "ip100a", "IC+ IP100A", 0),
}
Definition at line 880 of file sundance.c.
1.5.7.1