PCI_CARDBUS_CONTROL_REGISTER Struct Reference

CardBus Conroller Configuration Space, defined in PC Card Standard. More...

#include <Pci22.h>

Data Fields
UINT32	CardBusSocketReg
	Cardus Socket/ExCA Base.
UINT8	Cap_Ptr
UINT8	Reserved
UINT16	SecondaryStatus
	Secondary Status.
UINT8	PciBusNumber
	PCI Bus Number.
UINT8	CardBusBusNumber
	CardBus Bus Number.
UINT8	SubordinateBusNumber
	Subordinate Bus Number.
UINT8	CardBusLatencyTimer
	CardBus Latency Timer.
UINT32	MemoryBase0
	Memory Base Register 0.
UINT32	MemoryLimit0
	Memory Limit Register 0.
UINT32	MemoryBase1
UINT32	MemoryLimit1
UINT32	IoBase0
UINT32	IoLimit0
	I/O Base Register 0.
UINT32	IoBase1
	I/O Limit Register 0.
UINT32	IoLimit1
UINT8	InterruptLine
	Interrupt Line.
UINT8	InterruptPin
	Interrupt Pin.
UINT16	BridgeControl
	Bridge Control.

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Detailed Description

CardBus Conroller Configuration Space, defined in PC Card Standard.

8.0

Definition at line 104 of file Pci22.h.

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Field Documentation

UINT32 PCI_CARDBUS_CONTROL_REGISTER::CardBusSocketReg

Cardus Socket/ExCA Base.

Definition at line 105 of file Pci22.h.

UINT8 PCI_CARDBUS_CONTROL_REGISTER::Cap_Ptr

Definition at line 106 of file Pci22.h.

UINT8 PCI_CARDBUS_CONTROL_REGISTER::Reserved

Definition at line 107 of file Pci22.h.

UINT16 PCI_CARDBUS_CONTROL_REGISTER::SecondaryStatus

Secondary Status.

Definition at line 108 of file Pci22.h.

UINT8 PCI_CARDBUS_CONTROL_REGISTER::PciBusNumber

PCI Bus Number.

Definition at line 109 of file Pci22.h.

UINT8 PCI_CARDBUS_CONTROL_REGISTER::CardBusBusNumber

CardBus Bus Number.

Definition at line 110 of file Pci22.h.

UINT8 PCI_CARDBUS_CONTROL_REGISTER::SubordinateBusNumber

Subordinate Bus Number.

Definition at line 111 of file Pci22.h.

UINT8 PCI_CARDBUS_CONTROL_REGISTER::CardBusLatencyTimer

CardBus Latency Timer.

Definition at line 112 of file Pci22.h.

UINT32 PCI_CARDBUS_CONTROL_REGISTER::MemoryBase0

Memory Base Register 0.

Definition at line 113 of file Pci22.h.

UINT32 PCI_CARDBUS_CONTROL_REGISTER::MemoryLimit0

Memory Limit Register 0.

Definition at line 114 of file Pci22.h.

UINT32 PCI_CARDBUS_CONTROL_REGISTER::MemoryBase1

Definition at line 115 of file Pci22.h.

UINT32 PCI_CARDBUS_CONTROL_REGISTER::MemoryLimit1

Definition at line 116 of file Pci22.h.

UINT32 PCI_CARDBUS_CONTROL_REGISTER::IoBase0

Definition at line 117 of file Pci22.h.

UINT32 PCI_CARDBUS_CONTROL_REGISTER::IoLimit0

I/O Base Register 0.

Definition at line 118 of file Pci22.h.

UINT32 PCI_CARDBUS_CONTROL_REGISTER::IoBase1

I/O Limit Register 0.

Definition at line 119 of file Pci22.h.

UINT32 PCI_CARDBUS_CONTROL_REGISTER::IoLimit1

Definition at line 120 of file Pci22.h.

UINT8 PCI_CARDBUS_CONTROL_REGISTER::InterruptLine

Interrupt Line.

Definition at line 121 of file Pci22.h.

UINT8 PCI_CARDBUS_CONTROL_REGISTER::InterruptPin

Interrupt Pin.

Definition at line 122 of file Pci22.h.

UINT16 PCI_CARDBUS_CONTROL_REGISTER::BridgeControl

Bridge Control.

Definition at line 123 of file Pci22.h.

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The documentation for this struct was generated from the following file:

• include/gpxe/efi/IndustryStandard/Pci22.h