PCI_BRIDGE_CONTROL_REGISTER Struct Reference

defined in PCI-to-PCI Bridge Architecture Specification More...

#include <Pci22.h>

Data Fields
UINT32	Bar [2]
UINT8	PrimaryBus
UINT8	SecondaryBus
UINT8	SubordinateBus
UINT8	SecondaryLatencyTimer
UINT8	IoBase
UINT8	IoLimit
UINT16	SecondaryStatus
UINT16	MemoryBase
UINT16	MemoryLimit
UINT16	PrefetchableMemoryBase
UINT16	PrefetchableMemoryLimit
UINT32	PrefetchableBaseUpper32
UINT32	PrefetchableLimitUpper32
UINT16	IoBaseUpper16
UINT16	IoLimitUpper16
UINT8	CapabilityPtr
UINT8	Reserved [3]
UINT32	ExpansionRomBAR
UINT8	InterruptLine
UINT8	InterruptPin
UINT16	BridgeControl

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Detailed Description

defined in PCI-to-PCI Bridge Architecture Specification

Definition at line 66 of file Pci22.h.

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Field Documentation

UINT32 PCI_BRIDGE_CONTROL_REGISTER::Bar[2]

Definition at line 67 of file Pci22.h.

UINT8 PCI_BRIDGE_CONTROL_REGISTER::PrimaryBus

Definition at line 68 of file Pci22.h.

UINT8 PCI_BRIDGE_CONTROL_REGISTER::SecondaryBus

Definition at line 69 of file Pci22.h.

UINT8 PCI_BRIDGE_CONTROL_REGISTER::SubordinateBus

Definition at line 70 of file Pci22.h.

UINT8 PCI_BRIDGE_CONTROL_REGISTER::SecondaryLatencyTimer

Definition at line 71 of file Pci22.h.

UINT8 PCI_BRIDGE_CONTROL_REGISTER::IoBase

Definition at line 72 of file Pci22.h.

UINT8 PCI_BRIDGE_CONTROL_REGISTER::IoLimit

Definition at line 73 of file Pci22.h.

UINT16 PCI_BRIDGE_CONTROL_REGISTER::SecondaryStatus

Definition at line 74 of file Pci22.h.

UINT16 PCI_BRIDGE_CONTROL_REGISTER::MemoryBase

Definition at line 75 of file Pci22.h.

UINT16 PCI_BRIDGE_CONTROL_REGISTER::MemoryLimit

Definition at line 76 of file Pci22.h.

UINT16 PCI_BRIDGE_CONTROL_REGISTER::PrefetchableMemoryBase

Definition at line 77 of file Pci22.h.

UINT16 PCI_BRIDGE_CONTROL_REGISTER::PrefetchableMemoryLimit

Definition at line 78 of file Pci22.h.

UINT32 PCI_BRIDGE_CONTROL_REGISTER::PrefetchableBaseUpper32

Definition at line 79 of file Pci22.h.

UINT32 PCI_BRIDGE_CONTROL_REGISTER::PrefetchableLimitUpper32

Definition at line 80 of file Pci22.h.

UINT16 PCI_BRIDGE_CONTROL_REGISTER::IoBaseUpper16

Definition at line 81 of file Pci22.h.

UINT16 PCI_BRIDGE_CONTROL_REGISTER::IoLimitUpper16

Definition at line 82 of file Pci22.h.

UINT8 PCI_BRIDGE_CONTROL_REGISTER::CapabilityPtr

Definition at line 83 of file Pci22.h.

UINT8 PCI_BRIDGE_CONTROL_REGISTER::Reserved[3]

Definition at line 84 of file Pci22.h.

UINT32 PCI_BRIDGE_CONTROL_REGISTER::ExpansionRomBAR

Definition at line 85 of file Pci22.h.

UINT8 PCI_BRIDGE_CONTROL_REGISTER::InterruptLine

Definition at line 86 of file Pci22.h.

UINT8 PCI_BRIDGE_CONTROL_REGISTER::InterruptPin

Definition at line 87 of file Pci22.h.

UINT16 PCI_BRIDGE_CONTROL_REGISTER::BridgeControl

Definition at line 88 of file Pci22.h.

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The documentation for this struct was generated from the following file:

• include/gpxe/efi/IndustryStandard/Pci22.h