sis900.h File Reference

Go to the source code of this file.

Data Structures

struct  _BufferDesc

Defines

#define SIS900_TOTAL_SIZE   0x100
#define MAX_DMA_RANGE   7
#define TxMXDMA_shift   20
#define RxMXDMA_shift   20
#define TX_DMA_BURST   0
#define RX_DMA_BURST   0
#define TX_FILL_THRESH   16
#define TxFILLT_shift   8
#define TxDRNT_shift   0
#define TxDRNT_100   48
#define TxDRNT_10   16
#define RxDRNT_shift   1
#define RxDRNT_100   16
#define RxDRNT_10   24
#define RFAA_shift   28
#define RFADDR_shift   16
#define MIIread   0x6000
#define MIIwrite   0x5002
#define MIIpmdShift   7
#define MIIregShift   2
#define MIIcmdLen   16
#define MIIcmdShift   16
#define MII_ID1_OUI_LO   0xFC00
#define MII_ID1_MODEL   0x03F0
#define MII_ID1_REV   0x000F
#define FDX_CAPABLE_DUPLEX_UNKNOWN   0
#define FDX_CAPABLE_HALF_SELECTED   1
#define FDX_CAPABLE_FULL_SELECTED   2
#define HW_SPEED_UNCONFIG   0
#define HW_SPEED_HOME   1
#define HW_SPEED_10_MBPS   10
#define HW_SPEED_100_MBPS   100
#define HW_SPEED_DEFAULT   (HW_SPEED_100_MBPS)
#define CRC_SIZE   4
#define MAC_HEADER_SIZE   14
#define TX_BUF_SIZE   1536
#define RX_BUF_SIZE   1536
#define NUM_RX_DESC   4
#define TX_TIMEOUT   (4*TICKS_PER_SEC)

Typedefs

typedef struct _BufferDesc BufferDesc

Enumerations

enum  sis900_registers {
  cr = 0x0, cfg = 0x4, mear = 0x8, ptscr = 0xc,
  isr = 0x10, imr = 0x14, ier = 0x18, epar = 0x18,
  txdp = 0x20, txcfg = 0x24, rxdp = 0x30, rxcfg = 0x34,
  flctrl = 0x38, rxlen = 0x3c, rfcr = 0x48, rfdr = 0x4C,
  pmctrl = 0xB0, pmer = 0xB4
}
enum  sis900_command_register_bits {
  RELOAD = 0x00000400, ACCESSMODE = 0x00000200, RESET = 0x00000100, SWI = 0x00000080,
  RxRESET = 0x00000020, TxRESET = 0x00000010, RxDIS = 0x00000008, RxENA = 0x00000004,
  TxDIS = 0x00000002, TxENA = 0x00000001
}
enum  sis900_configuration_register_bits {
  DESCRFMT = 0x00000100, REQALG = 0x00000080, SB = 0x00000040, POW = 0x00000020,
  EXD = 0x00000010, PESEL = 0x00000008, LPM = 0x00000004, BEM = 0x00000001,
  RND_CNT = 0x00000400, FAIR_BACKOFF = 0x00000200, EDB_MASTER_EN = 0x00002000
}
enum  sis900_eeprom_access_reigster_bits {
  MDC = 0x00000040, MDDIR = 0x00000020, MDIO = 0x00000010, EECS = 0x00000008,
  EECLK = 0x00000004, EEDO = 0x00000002, EEDI = 0x00000001
}
enum  sis900_interrupt_register_bits {
  WKEVT = 0x10000000, TxPAUSEEND = 0x08000000, TxPAUSE = 0x04000000, TxRCMP = 0x02000000,
  RxRCMP = 0x01000000, DPERR = 0x00800000, SSERR = 0x00400000, RMABT = 0x00200000,
  RTABT = 0x00100000, RxSOVR = 0x00010000, HIBERR = 0x00008000, SWINT = 0x00001000,
  MIBINT = 0x00000800, TxURN = 0x00000400, TxIDLE = 0x00000200, TxERR = 0x00000100,
  TxDESC = 0x00000080, TxOK = 0x00000040, RxORN = 0x00000020, RxIDLE = 0x00000010,
  RxEARLY = 0x00000008, RxERR = 0x00000004, RxDESC = 0x00000002, RxOK = 0x00000001
}
enum  sis900_interrupt_enable_reigster_bits { IE = 0x00000001 }
enum  sis900_tx_rx_dma { DMA_BURST_512 = 0, DMA_BURST_64 = 5 }
enum  sis900_transmit_config_register_bits {
  TxCSI = 0x80000000, TxHBI = 0x40000000, TxMLB = 0x20000000, TxATP = 0x10000000,
  TxIFG = 0x0C000000, TxFILLT = 0x00003F00, TxDRNT = 0x0000003F
}
enum  sis900_reveive_config_register_bits {
  RxAEP = 0x80000000, RxARP = 0x40000000, RxATX = 0x10000000, RxAJAB = 0x08000000,
  RxDRNT = 0x0000007F
}
enum  sis900_receive_filter_control_register_bits {
  RFEN = 0x80000000, RFAAB = 0x40000000, RFAAM = 0x20000000, RFAAP = 0x10000000,
  RFPromiscuous = (RFAAB|RFAAM|RFAAP)
}
enum  sis900_reveive_filter_data_mask { RFDAT = 0x0000FFFF }
enum  sis900_eeprom_address {
  EEPROMSignature = 0x00, EEPROMVendorID = 0x02, EEPROMDeviceID = 0x03, EEPROMMACAddr = 0x08,
  EEPROMChecksum = 0x0b
}
enum  sis900_eeprom_command {
  EEread = 0x0180, EEwrite = 0x0140, EEerase = 0x01C0, EEwriteEnable = 0x0130,
  EEwriteDisable = 0x0100, EEeraseAll = 0x0120, EEwriteAll = 0x0110, EEaddrMask = 0x013F,
  EEcmdShift = 16
}
enum  sis96x_eeprom_command { EEREQ = 0x00000400, EEDONE = 0x00000200, EEGNT = 0x00000100 }
enum  sis900_buffer_status {
  OWN = 0x80000000, MORE = 0x40000000, INTR = 0x20000000, SUPCRC = 0x10000000,
  INCCRC = 0x10000000, OK = 0x08000000, DSIZE = 0x00000FFF
}
enum  sis900_tx_buffer_status {
  ABORT = 0x04000000, UNDERRUN = 0x02000000, NOCARRIER = 0x01000000, DEFERD = 0x00800000,
  EXCDEFER = 0x00400000, OWCOLL = 0x00200000, EXCCOLL = 0x00100000, COLCNT = 0x000F0000
}
enum  sis900_rx_bufer_status {
  OVERRUN = 0x02000000, DEST = 0x00800000, BCAST = 0x01800000, MCAST = 0x01000000,
  UNIMATCH = 0x00800000, TOOLONG = 0x00400000, RUNT = 0x00200000, RXISERR = 0x00100000,
  CRCERR = 0x00080000, FAERR = 0x00040000, LOOPBK = 0x00020000, RXCOL = 0x00010000
}
enum  mii_registers {
  MII_CONTROL = 0x0000, MII_STATUS = 0x0001, MII_PHY_ID0 = 0x0002, MII_PHY_ID1 = 0x0003,
  MII_ANADV = 0x0004, MII_ANLPAR = 0x0005, MII_ANEXT = 0x0006
}
enum  sis_mii_registers {
  MII_CONFIG1 = 0x0010, MII_CONFIG2 = 0x0011, MII_STSOUT = 0x0012, MII_MASK = 0x0013,
  MII_RESV = 0x0014
}
enum  amd_mii_registers { MII_STATUS_SUMMARY = 0x0018 }
enum  ics_mii_registers { MII_EXTCTRL = 0x0010, MII_QPDSTS = 0x0011, MII_10BTOP = 0x0012, MII_EXTCTRL2 = 0x0013 }
enum  mii_control_register_bits {
  MII_CNTL_FDX = 0x0100, MII_CNTL_RST_AUTO = 0x0200, MII_CNTL_ISOLATE = 0x0400, MII_CNTL_PWRDWN = 0x0800,
  MII_CNTL_AUTO = 0x1000, MII_CNTL_SPEED = 0x2000, MII_CNTL_LPBK = 0x4000, MII_CNTL_RESET = 0x8000
}
enum  mii_status_register_bits {
  MII_STAT_EXT = 0x0001, MII_STAT_JAB = 0x0002, MII_STAT_LINK = 0x0004, MII_STAT_CAN_AUTO = 0x0008,
  MII_STAT_FAULT = 0x0010, MII_STAT_AUTO_DONE = 0x0020, MII_STAT_CAN_T = 0x0800, MII_STAT_CAN_T_FDX = 0x1000,
  MII_STAT_CAN_TX = 0x2000, MII_STAT_CAN_TX_FDX = 0x4000, MII_STAT_CAN_T4 = 0x8000
}
enum  mii_nway_register_bits {
  MII_NWAY_NODE_SEL = 0x001f, MII_NWAY_CSMA_CD = 0x0001, MII_NWAY_T = 0x0020, MII_NWAY_T_FDX = 0x0040,
  MII_NWAY_TX = 0x0080, MII_NWAY_TX_FDX = 0x0100, MII_NWAY_T4 = 0x0200, MII_NWAY_PAUSE = 0x0400,
  MII_NWAY_RF = 0x2000, MII_NWAY_ACK = 0x4000, MII_NWAY_NP = 0x8000
}
enum  mii_stsout_register_bits { MII_STSOUT_LINK_FAIL = 0x4000, MII_STSOUT_SPD = 0x0080, MII_STSOUT_DPLX = 0x0040 }
enum  mii_stsics_register_bits { MII_STSICS_SPD = 0x8000, MII_STSICS_DPLX = 0x4000, MII_STSICS_LINKSTS = 0x0001 }
enum  mii_stssum_register_bits { MII_STSSUM_LINK = 0x0008, MII_STSSUM_DPLX = 0x0004, MII_STSSUM_AUTO = 0x0002, MII_STSSUM_SPD = 0x0001 }
enum  sis900_revision_id {
  SIS630A_900_REV = 0x80, SIS630E_900_REV = 0x81, SIS630S_900_REV = 0x82, SIS630EA1_900_REV = 0x83,
  SIS630ET_900_REV = 0x84, SIS635A_900_REV = 0x90, SIS96x_900_REV = 0X91, SIS900B_900_REV = 0x03
}
enum  sis630_revision_id { SIS630A0 = 0x00, SIS630A1 = 0x01, SIS630B0 = 0x10, SIS630B1 = 0x11 }

Functions

 FILE_LICENCE (GPL_ANY)

Define Documentation

#define SIS900_TOTAL_SIZE   0x100

Definition at line 18 of file sis900.h.

#define MAX_DMA_RANGE   7

Definition at line 112 of file sis900.h.

#define TxMXDMA_shift   20

Definition at line 113 of file sis900.h.

Referenced by sis900_check_mode().

#define RxMXDMA_shift   20

Definition at line 114 of file sis900.h.

Referenced by sis900_check_mode().

#define TX_DMA_BURST   0

Definition at line 115 of file sis900.h.

#define RX_DMA_BURST   0

Definition at line 116 of file sis900.h.

#define TX_FILL_THRESH   16

Definition at line 123 of file sis900.h.

Referenced by sis900_check_mode().

#define TxFILLT_shift   8

Definition at line 124 of file sis900.h.

Referenced by sis900_check_mode().

#define TxDRNT_shift   0

Definition at line 125 of file sis900.h.

Referenced by sis900_check_mode().

#define TxDRNT_100   48

Definition at line 126 of file sis900.h.

Referenced by sis900_check_mode().

#define TxDRNT_10   16

Definition at line 127 of file sis900.h.

Referenced by sis900_check_mode().

#define RxDRNT_shift   1

Definition at line 140 of file sis900.h.

Referenced by sis900_check_mode().

#define RxDRNT_100   16

Definition at line 141 of file sis900.h.

Referenced by sis900_check_mode().

#define RxDRNT_10   24

Definition at line 142 of file sis900.h.

Referenced by sis900_check_mode().

#define RFAA_shift   28

Definition at line 152 of file sis900.h.

#define RFADDR_shift   16

Definition at line 153 of file sis900.h.

Referenced by sis635_get_mac_addr(), sis900_init_rxfilter(), and sis900_set_rx_mode().

#define MIIread   0x6000

Definition at line 194 of file sis900.h.

Referenced by sis900_mdio_read().

#define MIIwrite   0x5002

Definition at line 195 of file sis900.h.

#define MIIpmdShift   7

Definition at line 196 of file sis900.h.

Referenced by sis900_mdio_read().

#define MIIregShift   2

Definition at line 197 of file sis900.h.

Referenced by sis900_mdio_read().

#define MIIcmdLen   16

Definition at line 198 of file sis900.h.

#define MIIcmdShift   16

Definition at line 199 of file sis900.h.

#define MII_ID1_OUI_LO   0xFC00

Definition at line 299 of file sis900.h.

#define MII_ID1_MODEL   0x03F0

Definition at line 300 of file sis900.h.

#define MII_ID1_REV   0x000F

Definition at line 301 of file sis900.h.

#define FDX_CAPABLE_DUPLEX_UNKNOWN   0

Definition at line 350 of file sis900.h.

#define FDX_CAPABLE_HALF_SELECTED   1

Definition at line 351 of file sis900.h.

Referenced by amd79c901_read_mode(), ics1893_read_mode(), rtl8201_read_mode(), sis900_read_mode(), and vt6103_read_mode().

#define FDX_CAPABLE_FULL_SELECTED   2

Definition at line 352 of file sis900.h.

Referenced by amd79c901_read_mode(), ics1893_read_mode(), rtl8201_read_mode(), sis900_check_mode(), sis900_read_mode(), and vt6103_read_mode().

#define HW_SPEED_UNCONFIG   0

Definition at line 354 of file sis900.h.

#define HW_SPEED_HOME   1

Definition at line 355 of file sis900.h.

Referenced by amd79c901_read_mode(), and sis900_check_mode().

#define HW_SPEED_10_MBPS   10

Definition at line 356 of file sis900.h.

Referenced by amd79c901_read_mode(), ics1893_read_mode(), rtl8201_read_mode(), sis900_check_mode(), sis900_read_mode(), and vt6103_read_mode().

#define HW_SPEED_100_MBPS   100

Definition at line 357 of file sis900.h.

Referenced by amd79c901_read_mode(), ics1893_read_mode(), rtl8201_read_mode(), sis900_read_mode(), and vt6103_read_mode().

#define HW_SPEED_DEFAULT   (HW_SPEED_100_MBPS)

Definition at line 358 of file sis900.h.

#define CRC_SIZE   4

Definition at line 360 of file sis900.h.

#define MAC_HEADER_SIZE   14

Definition at line 361 of file sis900.h.

#define TX_BUF_SIZE   1536

Definition at line 363 of file sis900.h.

#define RX_BUF_SIZE   1536

Definition at line 364 of file sis900.h.

#define NUM_RX_DESC   4

Definition at line 366 of file sis900.h.

#define TX_TIMEOUT   (4*TICKS_PER_SEC)

Definition at line 369 of file sis900.h.

Typedef Documentation

typedef struct _BufferDesc BufferDesc

Enumeration Type Documentation

enum sis900_registers

Enumerator:
cr 
cfg 
mear 
ptscr 
isr 
imr 
ier 
epar 
txdp 
txcfg 
rxdp 
rxcfg 
flctrl 
rxlen 
rfcr 
rfdr 
pmctrl 
pmer 

Definition at line 21 of file sis900.h.

00021                       {
00022     cr=0x0,                 /* Command Register */
00023     cfg=0x4,                /* Configuration Register */
00024     mear=0x8,               /* EEPROM Access Register */
00025     ptscr=0xc,              /* PCI Test Control Register */
00026     isr=0x10,               /* Interrupt Status Register */
00027     imr=0x14,               /* Interrupt Mask Register */
00028     ier=0x18,               /* Interrupt Enable Register */
00029     epar=0x18,              /* Enhanced PHY Access Register */
00030     txdp=0x20,              /* Transmit Descriptor Pointer Register */
00031     txcfg=0x24,             /* Transmit Configuration Register */
00032     rxdp=0x30,              /* Receive Descriptor Pointer Register */
00033     rxcfg=0x34,             /* Receive Configuration Register */
00034     flctrl=0x38,            /* Flow Control Register */
00035     rxlen=0x3c,             /* Receive Packet Length Register */
00036     rfcr=0x48,              /* Receive Filter Control Register */
00037     rfdr=0x4C,              /* Receive Filter Data Register */
00038     pmctrl=0xB0,            /* Power Management Control Register */
00039     pmer=0xB4               /* Power Management Wake-up Event Register */
00040 };

enum sis900_command_register_bits

Enumerator:
RELOAD 
ACCESSMODE 
RESET 
SWI 
RxRESET 
TxRESET 
RxDIS 
RxENA 
TxDIS 
TxENA 

Definition at line 43 of file sis900.h.

00043                                   {
00044     RELOAD     = 0x00000400,
00045     ACCESSMODE = 0x00000200,
00046     RESET      = 0x00000100, 
00047     SWI        = 0x00000080, 
00048     RxRESET    = 0x00000020,
00049     TxRESET    = 0x00000010, 
00050     RxDIS      = 0x00000008, 
00051     RxENA      = 0x00000004,
00052     TxDIS      = 0x00000002, 
00053     TxENA      = 0x00000001
00054 };

enum sis900_configuration_register_bits

Enumerator:
DESCRFMT 
REQALG 
SB 
POW 
EXD 
PESEL 
LPM 
BEM 
RND_CNT 
FAIR_BACKOFF 
EDB_MASTER_EN 

Definition at line 56 of file sis900.h.

00056                                         {
00057     DESCRFMT = 0x00000100, /* 7016 specific */
00058     REQALG   = 0x00000080, 
00059     SB       = 0x00000040, 
00060     POW      = 0x00000020, 
00061     EXD      = 0x00000010, 
00062     PESEL    = 0x00000008, 
00063     LPM      = 0x00000004, 
00064     BEM      = 0x00000001,
00065     RND_CNT  = 0x00000400,
00066     FAIR_BACKOFF = 0x00000200,
00067     EDB_MASTER_EN = 0x00002000
00068 };

enum sis900_eeprom_access_reigster_bits

Enumerator:
MDC 
MDDIR 
MDIO 
EECS 
EECLK 
EEDO 
EEDI 

Definition at line 70 of file sis900.h.

00070                                         {
00071     MDC   = 0x00000040, 
00072     MDDIR = 0x00000020, 
00073     MDIO  = 0x00000010, /* 7016 specific */ 
00074     EECS  = 0x00000008, 
00075     EECLK = 0x00000004, 
00076     EEDO  = 0x00000002,
00077     EEDI  = 0x00000001
00078 };

enum sis900_interrupt_register_bits

Enumerator:
WKEVT 
TxPAUSEEND 
TxPAUSE 
TxRCMP 
RxRCMP 
DPERR 
SSERR 
RMABT 
RTABT 
RxSOVR 
HIBERR 
SWINT 
MIBINT 
TxURN 
TxIDLE 
TxERR 
TxDESC 
TxOK 
RxORN 
RxIDLE 
RxEARLY 
RxERR 
RxDESC 
RxOK 

Definition at line 80 of file sis900.h.

00080                                     {
00081     WKEVT      = 0x10000000, 
00082     TxPAUSEEND = 0x08000000,
00083     TxPAUSE    = 0x04000000,
00084     TxRCMP     = 0x02000000,
00085     RxRCMP     = 0x01000000,
00086     DPERR      = 0x00800000,
00087     SSERR      = 0x00400000,
00088     RMABT      = 0x00200000,
00089     RTABT      = 0x00100000,
00090     RxSOVR     = 0x00010000, 
00091     HIBERR     = 0x00008000, 
00092     SWINT      = 0x00001000,
00093     MIBINT     = 0x00000800, 
00094     TxURN      = 0x00000400,
00095     TxIDLE     = 0x00000200,
00096     TxERR      = 0x00000100,
00097     TxDESC     = 0x00000080,
00098     TxOK       = 0x00000040,
00099     RxORN      = 0x00000020, 
00100     RxIDLE     = 0x00000010,
00101     RxEARLY    = 0x00000008,
00102     RxERR      = 0x00000004,
00103     RxDESC     = 0x00000002,
00104     RxOK       = 0x00000001
00105 };

enum sis900_interrupt_enable_reigster_bits

Enumerator:
IE 

Definition at line 107 of file sis900.h.

00107                                            {
00108     IE = 0x00000001
00109 };

enum sis900_tx_rx_dma

Enumerator:
DMA_BURST_512 
DMA_BURST_64 

Definition at line 118 of file sis900.h.

00118                      {
00119                 DMA_BURST_512 = 0,      DMA_BURST_64 = 5
00120 };

enum sis900_transmit_config_register_bits

Enumerator:
TxCSI 
TxHBI 
TxMLB 
TxATP 
TxIFG 
TxFILLT 
TxDRNT 

Definition at line 129 of file sis900.h.

00129                                           {
00130     TxCSI   = 0x80000000,
00131     TxHBI   = 0x40000000,
00132     TxMLB   = 0x20000000,
00133     TxATP   = 0x10000000,
00134     TxIFG   = 0x0C000000,
00135     TxFILLT = 0x00003F00,
00136     TxDRNT  = 0x0000003F
00137 };

enum sis900_reveive_config_register_bits

Enumerator:
RxAEP 
RxARP 
RxATX 
RxAJAB 
RxDRNT 

Definition at line 144 of file sis900.h.

00144                                          {
00145     RxAEP  = 0x80000000, 
00146     RxARP  = 0x40000000, 
00147     RxATX  = 0x10000000,
00148     RxAJAB = 0x08000000, 
00149     RxDRNT = 0x0000007F
00150 };

enum sis900_receive_filter_control_register_bits

Enumerator:
RFEN 
RFAAB 
RFAAM 
RFAAP 
RFPromiscuous 

Definition at line 155 of file sis900.h.

00155                                                  {
00156     RFEN  = 0x80000000, 
00157     RFAAB = 0x40000000, 
00158     RFAAM = 0x20000000,
00159     RFAAP = 0x10000000, 
00160     RFPromiscuous = (RFAAB|RFAAM|RFAAP)
00161 };

enum sis900_reveive_filter_data_mask

Enumerator:
RFDAT 

Definition at line 163 of file sis900.h.

00163                                      {
00164     RFDAT =  0x0000FFFF
00165 };

enum sis900_eeprom_address

Enumerator:
EEPROMSignature 
EEPROMVendorID 
EEPROMDeviceID 
EEPROMMACAddr 
EEPROMChecksum 

Definition at line 168 of file sis900.h.

00168                            {
00169     EEPROMSignature = 0x00, 
00170     EEPROMVendorID  = 0x02, 
00171     EEPROMDeviceID  = 0x03,
00172     EEPROMMACAddr   = 0x08, 
00173     EEPROMChecksum  = 0x0b
00174 };

enum sis900_eeprom_command

Enumerator:
EEread 
EEwrite 
EEerase 
EEwriteEnable 
EEwriteDisable 
EEeraseAll 
EEwriteAll 
EEaddrMask 
EEcmdShift 

Definition at line 177 of file sis900.h.

00177                            {
00178     EEread          = 0x0180, 
00179     EEwrite         = 0x0140, 
00180     EEerase         = 0x01C0, 
00181     EEwriteEnable   = 0x0130,
00182     EEwriteDisable  = 0x0100,
00183     EEeraseAll      = 0x0120,
00184     EEwriteAll      = 0x0110, 
00185     EEaddrMask      = 0x013F, 
00186     EEcmdShift      = 16
00187 };

enum sis96x_eeprom_command

Enumerator:
EEREQ 
EEDONE 
EEGNT 

Definition at line 189 of file sis900.h.

00189                            {
00190         EEREQ = 0x00000400, EEDONE = 0x00000200, EEGNT = 0x00000100
00191 };

enum sis900_buffer_status

Enumerator:
OWN 
MORE 
INTR 
SUPCRC 
INCCRC 
OK 
DSIZE 

Definition at line 202 of file sis900.h.

00202                           {
00203     OWN    = 0x80000000, 
00204     MORE   = 0x40000000, 
00205     INTR   = 0x20000000,
00206     SUPCRC = 0x10000000, 
00207     INCCRC = 0x10000000,
00208     OK     = 0x08000000, 
00209     DSIZE  = 0x00000FFF
00210 };

enum sis900_tx_buffer_status

Enumerator:
ABORT 
UNDERRUN 
NOCARRIER 
DEFERD 
EXCDEFER 
OWCOLL 
EXCCOLL 
COLCNT 

Definition at line 213 of file sis900.h.

00213                              {
00214     ABORT      = 0x04000000,
00215     UNDERRUN   = 0x02000000, 
00216     NOCARRIER  = 0x01000000,
00217     DEFERD     = 0x00800000, 
00218     EXCDEFER   = 0x00400000, 
00219     OWCOLL     = 0x00200000,
00220     EXCCOLL    = 0x00100000, 
00221     COLCNT     = 0x000F0000
00222 };

enum sis900_rx_bufer_status

Enumerator:
OVERRUN 
DEST 
BCAST 
MCAST 
UNIMATCH 
TOOLONG 
RUNT 
RXISERR 
CRCERR 
FAERR 
LOOPBK 
RXCOL 

Definition at line 224 of file sis900.h.

00224                             {
00225     OVERRUN    = 0x02000000,
00226     DEST       = 0x00800000,
00227     BCAST      = 0x01800000,
00228     MCAST      = 0x01000000,
00229     UNIMATCH   = 0x00800000,
00230     TOOLONG    = 0x00400000,
00231     RUNT       = 0x00200000,
00232     RXISERR    = 0x00100000,
00233     CRCERR     = 0x00080000,
00234     FAERR      = 0x00040000,
00235     LOOPBK     = 0x00020000,
00236     RXCOL      = 0x00010000
00237 };

enum mii_registers

Enumerator:
MII_CONTROL 
MII_STATUS 
MII_PHY_ID0 
MII_PHY_ID1 
MII_ANADV 
MII_ANLPAR 
MII_ANEXT 

Definition at line 240 of file sis900.h.

00240                    {
00241     MII_CONTROL = 0x0000, 
00242     MII_STATUS  = 0x0001,
00243     MII_PHY_ID0 = 0x0002,
00244     MII_PHY_ID1 = 0x0003,
00245     MII_ANADV   = 0x0004,
00246     MII_ANLPAR  = 0x0005,
00247     MII_ANEXT   = 0x0006
00248 };

enum sis_mii_registers

Enumerator:
MII_CONFIG1 
MII_CONFIG2 
MII_STSOUT 
MII_MASK 
MII_RESV 

Definition at line 251 of file sis900.h.

00251                        {
00252     MII_CONFIG1 = 0x0010,
00253     MII_CONFIG2 = 0x0011,
00254     MII_STSOUT  = 0x0012,
00255     MII_MASK    = 0x0013,
00256     MII_RESV    = 0x0014
00257 };

enum amd_mii_registers

Enumerator:
MII_STATUS_SUMMARY 

Definition at line 260 of file sis900.h.

00260                        {
00261     MII_STATUS_SUMMARY = 0x0018
00262 };

enum ics_mii_registers

Enumerator:
MII_EXTCTRL 
MII_QPDSTS 
MII_10BTOP 
MII_EXTCTRL2 

Definition at line 265 of file sis900.h.

00265                        {
00266         MII_EXTCTRL  = 0x0010, MII_QPDSTS = 0x0011, MII_10BTOP = 0x0012,
00267         MII_EXTCTRL2 = 0x0013
00268 };

enum mii_control_register_bits

Enumerator:
MII_CNTL_FDX 
MII_CNTL_RST_AUTO 
MII_CNTL_ISOLATE 
MII_CNTL_PWRDWN 
MII_CNTL_AUTO 
MII_CNTL_SPEED 
MII_CNTL_LPBK 
MII_CNTL_RESET 

Definition at line 273 of file sis900.h.

00273                                {
00274     MII_CNTL_FDX      = 0x0100,
00275     MII_CNTL_RST_AUTO = 0x0200, 
00276     MII_CNTL_ISOLATE  = 0x0400,
00277     MII_CNTL_PWRDWN   = 0x0800,
00278     MII_CNTL_AUTO     = 0x1000,
00279     MII_CNTL_SPEED    = 0x2000,
00280     MII_CNTL_LPBK     = 0x4000,
00281     MII_CNTL_RESET    = 0x8000
00282 };

enum mii_status_register_bits

Enumerator:
MII_STAT_EXT 
MII_STAT_JAB 
MII_STAT_LINK 
MII_STAT_CAN_AUTO 
MII_STAT_FAULT 
MII_STAT_AUTO_DONE 
MII_STAT_CAN_T 
MII_STAT_CAN_T_FDX 
MII_STAT_CAN_TX 
MII_STAT_CAN_TX_FDX 
MII_STAT_CAN_T4 

Definition at line 285 of file sis900.h.

00285                               {
00286     MII_STAT_EXT        = 0x0001,
00287     MII_STAT_JAB        = 0x0002, 
00288     MII_STAT_LINK       = 0x0004,
00289     MII_STAT_CAN_AUTO   = 0x0008, 
00290     MII_STAT_FAULT      = 0x0010,
00291     MII_STAT_AUTO_DONE  = 0x0020,
00292     MII_STAT_CAN_T      = 0x0800, 
00293     MII_STAT_CAN_T_FDX  = 0x1000,
00294     MII_STAT_CAN_TX     = 0x2000, 
00295     MII_STAT_CAN_TX_FDX = 0x4000,
00296     MII_STAT_CAN_T4     = 0x8000
00297 };

enum mii_nway_register_bits

Enumerator:
MII_NWAY_NODE_SEL 
MII_NWAY_CSMA_CD 
MII_NWAY_T 
MII_NWAY_T_FDX 
MII_NWAY_TX 
MII_NWAY_TX_FDX 
MII_NWAY_T4 
MII_NWAY_PAUSE 
MII_NWAY_RF 
MII_NWAY_ACK 
MII_NWAY_NP 

Definition at line 306 of file sis900.h.

00306                             {
00307     MII_NWAY_NODE_SEL = 0x001f,
00308     MII_NWAY_CSMA_CD  = 0x0001,
00309     MII_NWAY_T        = 0x0020,
00310     MII_NWAY_T_FDX    = 0x0040,
00311     MII_NWAY_TX       = 0x0080,
00312     MII_NWAY_TX_FDX   = 0x0100,
00313     MII_NWAY_T4       = 0x0200,
00314     MII_NWAY_PAUSE    = 0x0400,
00315     MII_NWAY_RF       = 0x2000,
00316     MII_NWAY_ACK      = 0x4000,
00317     MII_NWAY_NP       = 0x8000
00318 };

enum mii_stsout_register_bits

Enumerator:
MII_STSOUT_LINK_FAIL 
MII_STSOUT_SPD 
MII_STSOUT_DPLX 

Definition at line 320 of file sis900.h.

00320                               {
00321     MII_STSOUT_LINK_FAIL = 0x4000,
00322     MII_STSOUT_SPD       = 0x0080,
00323     MII_STSOUT_DPLX      = 0x0040
00324 };

enum mii_stsics_register_bits

Enumerator:
MII_STSICS_SPD 
MII_STSICS_DPLX 
MII_STSICS_LINKSTS 

Definition at line 326 of file sis900.h.

00326                               {
00327         MII_STSICS_SPD  = 0x8000, MII_STSICS_DPLX = 0x4000,
00328         MII_STSICS_LINKSTS = 0x0001
00329 };

enum mii_stssum_register_bits

Enumerator:
MII_STSSUM_LINK 
MII_STSSUM_DPLX 
MII_STSSUM_AUTO 
MII_STSSUM_SPD 

Definition at line 331 of file sis900.h.

00331                               {
00332     MII_STSSUM_LINK = 0x0008,
00333     MII_STSSUM_DPLX = 0x0004,
00334     MII_STSSUM_AUTO = 0x0002,
00335     MII_STSSUM_SPD  = 0x0001
00336 };

enum sis900_revision_id

Enumerator:
SIS630A_900_REV 
SIS630E_900_REV 
SIS630S_900_REV 
SIS630EA1_900_REV 
SIS630ET_900_REV 
SIS635A_900_REV 
SIS96x_900_REV 
SIS900B_900_REV 

Definition at line 338 of file sis900.h.

00338                         {
00339         SIS630A_900_REV = 0x80,         SIS630E_900_REV = 0x81,
00340         SIS630S_900_REV = 0x82,         SIS630EA1_900_REV = 0x83,
00341         SIS630ET_900_REV = 0x84,        SIS635A_900_REV = 0x90,
00342         SIS96x_900_REV = 0X91,          SIS900B_900_REV = 0x03
00343 };

enum sis630_revision_id

Enumerator:
SIS630A0 
SIS630A1 
SIS630B0 
SIS630B1 

Definition at line 345 of file sis900.h.

00345                         {
00346         SIS630A0    = 0x00, SIS630A1      = 0x01,
00347         SIS630B0    = 0x10, SIS630B1      = 0x11
00348 };

Function Documentation

FILE_LICENCE ( GPL_ANY   ) 

Generated on Tue Apr 6 20:01:39 2010 for gPXE by  doxygen 1.5.7.1