#include <stdint.h>#include <errno.h>#include <stdio.h>#include <unistd.h>#include <byteswap.h>#include <gpxe/iobuf.h>#include <gpxe/malloc.h>#include <gpxe/pci.h>#include <gpxe/net80211.h>#include <gpxe/netdevice.h>#include <gpxe/threewire.h>#include "rtl818x.h"Go to the source code of this file.
Defines | |
| #define | RTL818X_NR_B_RATES 4 |
| #define | RTL818X_NR_RATES 12 |
| #define | DIV_ROUND_UP(n, d) (((n)+(d)-1)/(d)) |
| #define | RTL_ROM PCI_ROM |
Functions | |
| FILE_LICENCE (GPL2_ONLY) | |
| void | rtl818x_write_phy (struct net80211_device *dev, u8 addr, u32 data) |
| static void | rtl818x_handle_rx (struct net80211_device *dev) |
| static void | rtl818x_handle_tx (struct net80211_device *dev) |
| static void | rtl818x_poll (struct net80211_device *dev) |
| static int | rtl818x_tx (struct net80211_device *dev, struct io_buffer *iob) |
| void | rtl818x_set_anaparam (struct rtl818x_priv *priv, u32 anaparam) |
| static int | rtl818x_init_hw (struct net80211_device *dev) |
| static int | rtl818x_init_rx_ring (struct net80211_device *dev) |
| static void | rtl818x_free_rx_ring (struct net80211_device *dev) |
| static int | rtl818x_init_tx_ring (struct net80211_device *dev) |
| static void | rtl818x_free_tx_ring (struct net80211_device *dev) |
| static void | rtl818x_irq (struct net80211_device *dev, int enable) |
| static void | rtl818x_set_hwaddr (struct net80211_device *dev, u8 *hwaddr) |
| static int | rtl818x_start (struct net80211_device *dev) |
| static void | rtl818x_stop (struct net80211_device *dev) |
| static int | rtl818x_config (struct net80211_device *dev, int changed) |
| static int | rtl818x_spi_read_bit (struct bit_basher *basher, unsigned int bit_id) |
| static void | rtl818x_spi_write_bit (struct bit_basher *basher, unsigned int bit_id, unsigned long data) |
| static int | rtl818x_probe (struct pci_device *pdev, const struct pci_device_id *id __unused) |
| static void | rtl818x_remove (struct pci_device *pdev) |
Variables | |
| static const u16 | rtl818x_rates [] |
| static const u8 | rtl818x_eeprom_bits [] |
| static struct bit_basher_operations | rtl818x_basher_ops |
| struct net80211_device_operations | rtl818x_operations |
| static struct pci_device_id | rtl818x_nics [] |
| struct pci_driver rtl818x_driver | __pci_driver |
| #define RTL818X_NR_B_RATES 4 |
| #define RTL818X_NR_RATES 12 |
| #define DIV_ROUND_UP | ( | n, | |||
| d | ) | (((n)+(d)-1)/(d)) |
| FILE_LICENCE | ( | GPL2_ONLY | ) |
| void rtl818x_write_phy | ( | struct net80211_device * | dev, | |
| u8 | addr, | |||
| u32 | data | |||
| ) |
Definition at line 46 of file rtl818x.c.
References rtl818x_priv::map, rtl818x_csr::PHY, net80211_device::priv, priv, rtl818x_ioread8(), rtl818x_iowrite32(), and u32.
Referenced by grf5101_rf_init(), grf5101_write_phy_antenna(), max2820_rf_init(), max2820_rf_set_channel(), max2820_rf_stop(), max2820_write_phy_antenna(), rtl8225_write_phy_cck(), rtl8225_write_phy_ofdm(), sa2400_rf_init(), and sa2400_write_phy_antenna().
00047 { 00048 struct rtl818x_priv *priv = dev->priv; 00049 int i = 10; 00050 u32 buf; 00051 00052 buf = (data << 8) | addr; 00053 00054 rtl818x_iowrite32(priv, (u32 *)&priv->map->PHY[0], buf | 0x80); 00055 while (i--) { 00056 rtl818x_iowrite32(priv, (u32 *)&priv->map->PHY[0], buf); 00057 if (rtl818x_ioread8(priv, &priv->map->PHY[2]) == (data & 0xFF)) 00058 return; 00059 } 00060 }
| static void rtl818x_handle_rx | ( | struct net80211_device * | dev | ) | [static] |
Definition at line 62 of file rtl818x.c.
References alloc_iob(), cpu_to_le32, io_buffer::data, DBG2, DBGP, EIO, ENOMEM, entry, rtl818x_rx_desc::flags, rtl818x_rx_desc::flags2, iob_put, le32_to_cpu, MAX_RX_SIZE, net80211_rx(), net80211_rx_err(), NULL, net80211_device::priv, priv, rtl818x_rates, RTL818X_RX_DESC_FLAG_CRC32_ERR, RTL818X_RX_DESC_FLAG_DMA_FAIL, RTL818X_RX_DESC_FLAG_EOR, RTL818X_RX_DESC_FLAG_FOF, RTL818X_RX_DESC_FLAG_OWN, RTL818X_RX_DESC_FLAG_RX_ERR, RTL818X_RX_RING_SIZE, rtl818x_rx_desc::rx_buf, rtl818x_priv::rx_buf, rtl818x_priv::rx_idx, rtl818x_priv::rx_ring, u32, and virt_to_bus().
Referenced by rtl818x_poll().
00063 { 00064 struct rtl818x_priv *priv = dev->priv; 00065 unsigned int count = RTL818X_RX_RING_SIZE; 00066 00067 while (count--) { 00068 struct rtl818x_rx_desc *entry = &priv->rx_ring[priv->rx_idx]; 00069 struct io_buffer *iob = priv->rx_buf[priv->rx_idx]; 00070 u32 flags = le32_to_cpu(entry->flags); 00071 00072 if (flags & RTL818X_RX_DESC_FLAG_OWN) 00073 return; 00074 00075 if (flags & (RTL818X_RX_DESC_FLAG_DMA_FAIL | 00076 RTL818X_RX_DESC_FLAG_FOF | 00077 RTL818X_RX_DESC_FLAG_RX_ERR)) { 00078 /* This is crappy hardware. The Linux driver 00079 doesn't even log these. */ 00080 goto done; 00081 } else if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR) { 00082 /* This is actually a corrupt packet. */ 00083 DBG2("rtl818x RX:%d CRC fail: flags %08x\n", 00084 priv->rx_idx, flags); 00085 net80211_rx_err(dev, NULL, EIO); 00086 } else { 00087 u32 flags2 = le32_to_cpu(entry->flags2); 00088 struct io_buffer *new_iob = alloc_iob(MAX_RX_SIZE); 00089 if (!new_iob) { 00090 net80211_rx_err(dev, NULL, ENOMEM); 00091 goto done; 00092 } 00093 00094 DBGP("rtl818x RX:%d success: flags %08x %08x\n", 00095 priv->rx_idx, flags, flags2); 00096 00097 iob_put(iob, flags & 0xFFF); 00098 00099 net80211_rx(dev, iob, (flags2 >> 8) & 0x7f, 00100 rtl818x_rates[(flags >> 20) & 0xf]); 00101 00102 iob = new_iob; 00103 priv->rx_buf[priv->rx_idx] = iob; 00104 } 00105 00106 done: 00107 entry->rx_buf = cpu_to_le32(virt_to_bus(iob->data)); 00108 entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN | MAX_RX_SIZE); 00109 00110 if (priv->rx_idx == RTL818X_RX_RING_SIZE - 1) 00111 entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR); 00112 00113 priv->rx_idx = (priv->rx_idx + 1) % RTL818X_RX_RING_SIZE; 00114 } 00115 }
| static void rtl818x_handle_tx | ( | struct net80211_device * | dev | ) | [static] |
Definition at line 117 of file rtl818x.c.
References EIO, entry, rtl818x_tx_desc::flags, le32_to_cpu, net80211_tx_complete(), NULL, net80211_device::priv, priv, RTL818X_TX_DESC_FLAG_OWN, RTL818X_TX_DESC_FLAG_TX_OK, RTL818X_TX_RING_SIZE, rtl818x_priv::tx_buf, rtl818x_priv::tx_cons, rtl818x_priv::tx_ring, and u32.
Referenced by rtl818x_poll().
00118 { 00119 struct rtl818x_priv *priv = dev->priv; 00120 unsigned int count = RTL818X_TX_RING_SIZE; 00121 00122 while (count--) { 00123 struct rtl818x_tx_desc *entry = &priv->tx_ring[priv->tx_cons]; 00124 struct io_buffer *iob = priv->tx_buf[priv->tx_cons]; 00125 u32 flags = le32_to_cpu(entry->flags); 00126 int rc; 00127 00128 if ((flags & RTL818X_TX_DESC_FLAG_OWN) || !iob) 00129 return; 00130 00131 rc = 0; 00132 if (!(flags & RTL818X_TX_DESC_FLAG_TX_OK)) { 00133 /* our packet was not ACKed properly */ 00134 rc = EIO; 00135 } 00136 00137 net80211_tx_complete(dev, iob, flags & 0xFF, rc); 00138 00139 priv->tx_buf[priv->tx_cons] = NULL; 00140 priv->tx_cons = (priv->tx_cons + 1) % RTL818X_TX_RING_SIZE; 00141 } 00142 }
| static void rtl818x_poll | ( | struct net80211_device * | dev | ) | [static] |
Definition at line 144 of file rtl818x.c.
References rtl818x_csr::INT_STATUS, rtl818x_priv::map, net80211_device::priv, priv, rtl818x_handle_rx(), rtl818x_handle_tx(), RTL818X_INT_RX_ERR, RTL818X_INT_RX_OK, RTL818X_INT_TXN_ERR, RTL818X_INT_TXN_OK, rtl818x_ioread16(), rtl818x_iowrite16(), and u16.
00145 { 00146 struct rtl818x_priv *priv = dev->priv; 00147 u16 reg = rtl818x_ioread16(priv, &priv->map->INT_STATUS); 00148 00149 if (reg == 0xFFFF) 00150 return; 00151 00152 rtl818x_iowrite16(priv, &priv->map->INT_STATUS, reg); 00153 00154 if (reg & (RTL818X_INT_TXN_OK | RTL818X_INT_TXN_ERR)) 00155 rtl818x_handle_tx(dev); 00156 00157 if (reg & (RTL818X_INT_RX_OK | RTL818X_INT_RX_ERR)) 00158 rtl818x_handle_rx(dev); 00159 }
| static int rtl818x_tx | ( | struct net80211_device * | dev, | |
| struct io_buffer * | iob | |||
| ) | [static] |
Definition at line 163 of file rtl818x.c.
References cpu_to_le16, cpu_to_le32, io_buffer::data, DIV_ROUND_UP, EBUSY, entry, rtl818x_tx_desc::flags, rtl818x_tx_desc::flags2, rtl818x_tx_desc::frame_len, rtl818x_priv::hw_rate, rtl818x_priv::hw_rtscts_rate, iob_len(), rtl818x_priv::map, net80211_cts_duration(), NET80211_PHY_USE_PROTECTION, net80211_device::phy_flags, rtl818x_tx_desc::plcp_len, net80211_device::priv, priv, rtl818x_priv::r8185, net80211_device::rate, net80211_device::rates, rtl818x_tx_desc::retry_limit, rtl818x_iowrite8(), RTL818X_MAX_RETRIES, RTL818X_TX_DESC_FLAG_CTS, RTL818X_TX_DESC_FLAG_DMA, RTL818X_TX_DESC_FLAG_FS, RTL818X_TX_DESC_FLAG_LS, RTL818X_TX_DESC_FLAG_NO_ENC, RTL818X_TX_DESC_FLAG_OWN, RTL818X_TX_RING_SIZE, rtl818x_tx_desc::rts_duration, rtl818x_tx_desc::tx_buf, rtl818x_priv::tx_buf, rtl818x_csr::TX_DMA_POLLING, rtl818x_priv::tx_prod, rtl818x_priv::tx_ring, u16, u32, and virt_to_bus().
00164 { 00165 struct rtl818x_priv *priv = dev->priv; 00166 struct rtl818x_tx_desc *entry; 00167 u32 tx_flags; 00168 u16 plcp_len = 0; 00169 int len = iob_len(iob); 00170 00171 tx_flags = RTL818X_TX_DESC_FLAG_OWN | RTL818X_TX_DESC_FLAG_FS | 00172 RTL818X_TX_DESC_FLAG_LS | (priv->hw_rate << 24) | len; 00173 00174 if (priv->r8185) { 00175 tx_flags |= RTL818X_TX_DESC_FLAG_DMA | 00176 RTL818X_TX_DESC_FLAG_NO_ENC; 00177 } else { 00178 unsigned int remainder; 00179 00180 plcp_len = DIV_ROUND_UP(16 * (len + 4), 00181 (dev->rates[dev->rate] * 2) / 10); 00182 remainder = (16 * (len + 4)) % 00183 ((dev->rates[dev->rate] * 2) / 10); 00184 00185 if (remainder > 0 && remainder <= 6) 00186 plcp_len |= 1 << 15; 00187 } 00188 00189 entry = &priv->tx_ring[priv->tx_prod]; 00190 00191 if (dev->phy_flags & NET80211_PHY_USE_PROTECTION) { 00192 tx_flags |= RTL818X_TX_DESC_FLAG_CTS; 00193 tx_flags |= priv->hw_rtscts_rate << 19; 00194 entry->rts_duration = net80211_cts_duration(dev, len); 00195 } else { 00196 entry->rts_duration = 0; 00197 } 00198 00199 if (entry->flags & RTL818X_TX_DESC_FLAG_OWN) { 00200 /* card hasn't processed the old packet yet! */ 00201 return -EBUSY; 00202 } 00203 00204 priv->tx_buf[priv->tx_prod] = iob; 00205 priv->tx_prod = (priv->tx_prod + 1) % RTL818X_TX_RING_SIZE; 00206 00207 entry->plcp_len = cpu_to_le16(plcp_len); 00208 entry->tx_buf = cpu_to_le32(virt_to_bus(iob->data)); 00209 entry->frame_len = cpu_to_le32(len); 00210 entry->flags2 = /* alternate retry rate in 100kbps << 4 */ 0; 00211 entry->retry_limit = RTL818X_MAX_RETRIES; 00212 entry->flags = cpu_to_le32(tx_flags); 00213 00214 rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING, (1 << 5)); 00215 00216 return 0; 00217 }
| void rtl818x_set_anaparam | ( | struct rtl818x_priv * | priv, | |
| u32 | anaparam | |||
| ) |
Definition at line 219 of file rtl818x.c.
References rtl818x_csr::ANAPARAM, rtl818x_csr::CONFIG3, rtl818x_csr::EEPROM_CMD, rtl818x_priv::map, RTL818X_CONFIG3_ANAPARAM_WRITE, RTL818X_EEPROM_CMD_CONFIG, RTL818X_EEPROM_CMD_NORMAL, rtl818x_ioread8(), rtl818x_iowrite32(), rtl818x_iowrite8(), and u8.
Referenced by grf5101_rf_init(), grf5101_rf_stop(), rtl818x_init_hw(), rtl8225_rf_init(), rtl8225z2_rf_init(), and sa2400_rf_init().
00220 { 00221 u8 reg; 00222 00223 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 00224 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); 00225 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 00226 reg | RTL818X_CONFIG3_ANAPARAM_WRITE); 00227 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam); 00228 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 00229 reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE); 00230 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 00231 }
| static int rtl818x_init_hw | ( | struct net80211_device * | dev | ) | [static] |
Definition at line 233 of file rtl818x.c.
References rtl818x_priv::anaparam, rtl818x_csr::BRSR, rtl818x_csr::CARRIER_SENSE_COUNTER, rtl818x_csr::CMD, rtl818x_csr::CONFIG2, rtl818x_csr::CONFIG3, DBG, rtl818x_csr::EEPROM_CMD, ETIMEDOUT, rtl818x_csr::FEMR, rtl818x_csr::GP_ENABLE, rtl818x_rf_ops::init, rtl818x_csr::INT_MASK, rtl818x_csr::INT_TIMEOUT, rtl818x_priv::map, mdelay(), rtl818x_csr::MSR, net_device::name, net80211_device::netdev, rtl818x_csr::PHY_DELAY, net80211_device::priv, priv, rtl818x_priv::r8185, rtl818x_csr::RATE_FALLBACK, rtl818x_csr::RDSAR, rtl818x_csr::RESP_RATE, rtl818x_priv::rf, RTL818X_CMD_RESET, RTL818X_EEPROM_CMD_CONFIG, RTL818X_EEPROM_CMD_LOAD, RTL818X_EEPROM_CMD_NORMAL, rtl818x_ioread16(), rtl818x_ioread8(), rtl818x_iowrite16(), rtl818x_iowrite32(), rtl818x_iowrite8(), rtl818x_set_anaparam(), rtl818x_priv::rx_ring_dma, rtl818x_csr::SECURITY, rtl818x_csr::TNPDA, rtl818x_priv::tx_ring_dma, u16, and rtl818x_csr::WPA_CONF.
Referenced by rtl818x_start().
00234 { 00235 struct rtl818x_priv *priv = dev->priv; 00236 u16 reg; 00237 00238 rtl818x_iowrite8(priv, &priv->map->CMD, 0); 00239 rtl818x_ioread8(priv, &priv->map->CMD); 00240 mdelay(10); 00241 00242 /* reset */ 00243 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); 00244 rtl818x_ioread8(priv, &priv->map->CMD); 00245 00246 reg = rtl818x_ioread8(priv, &priv->map->CMD); 00247 reg &= (1 << 1); 00248 reg |= RTL818X_CMD_RESET; 00249 rtl818x_iowrite8(priv, &priv->map->CMD, RTL818X_CMD_RESET); 00250 rtl818x_ioread8(priv, &priv->map->CMD); 00251 mdelay(200); 00252 00253 /* check success of reset */ 00254 if (rtl818x_ioread8(priv, &priv->map->CMD) & RTL818X_CMD_RESET) { 00255 DBG("rtl818x %s: reset timeout!\n", dev->netdev->name); 00256 return -ETIMEDOUT; 00257 } 00258 00259 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD); 00260 rtl818x_ioread8(priv, &priv->map->CMD); 00261 mdelay(200); 00262 00263 if (rtl818x_ioread8(priv, &priv->map->CONFIG3) & (1 << 3)) { 00264 /* For cardbus */ 00265 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); 00266 reg |= 1 << 1; 00267 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); 00268 reg = rtl818x_ioread16(priv, &priv->map->FEMR); 00269 reg |= (1 << 15) | (1 << 14) | (1 << 4); 00270 rtl818x_iowrite16(priv, &priv->map->FEMR, reg); 00271 } 00272 00273 rtl818x_iowrite8(priv, &priv->map->MSR, 0); 00274 00275 if (!priv->r8185) 00276 rtl818x_set_anaparam(priv, priv->anaparam); 00277 00278 rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma); 00279 rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring_dma); 00280 00281 /* TODO: necessary? specs indicate not */ 00282 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 00283 reg = rtl818x_ioread8(priv, &priv->map->CONFIG2); 00284 rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg & ~(1 << 3)); 00285 if (priv->r8185) { 00286 reg = rtl818x_ioread8(priv, &priv->map->CONFIG2); 00287 rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg | (1 << 4)); 00288 } 00289 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 00290 00291 /* TODO: set CONFIG5 for calibrating AGC on rtl8180 + philips radio? */ 00292 00293 /* TODO: turn off hw wep on rtl8180 */ 00294 00295 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0); 00296 00297 if (priv->r8185) { 00298 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); 00299 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81); 00300 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0); 00301 00302 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); 00303 00304 /* TODO: set ClkRun enable? necessary? */ 00305 reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE); 00306 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6)); 00307 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 00308 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); 00309 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2)); 00310 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 00311 } else { 00312 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x1); 00313 rtl818x_iowrite8(priv, &priv->map->SECURITY, 0); 00314 00315 rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6); 00316 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C); 00317 } 00318 00319 priv->rf->init(dev); 00320 if (priv->r8185) 00321 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); 00322 return 0; 00323 }
| static int rtl818x_init_rx_ring | ( | struct net80211_device * | dev | ) | [static] |
Definition at line 325 of file rtl818x.c.
References alloc_iob(), cpu_to_le32, io_buffer::data, DBG, ENOMEM, entry, rtl818x_rx_desc::flags, malloc_dma(), MAX_RX_SIZE, memset(), net_device::name, net80211_device::netdev, net80211_device::priv, priv, RTL818X_RING_ALIGN, RTL818X_RX_DESC_FLAG_EOR, RTL818X_RX_DESC_FLAG_OWN, RTL818X_RX_RING_SIZE, rtl818x_rx_desc::rx_buf, rtl818x_priv::rx_buf, rtl818x_priv::rx_idx, rtl818x_priv::rx_ring, rtl818x_priv::rx_ring_dma, and virt_to_bus().
Referenced by rtl818x_start().
00326 { 00327 struct rtl818x_priv *priv = dev->priv; 00328 struct rtl818x_rx_desc *entry; 00329 int i; 00330 00331 priv->rx_ring = malloc_dma(sizeof(*priv->rx_ring) * RTL818X_RX_RING_SIZE, 00332 RTL818X_RING_ALIGN); 00333 priv->rx_ring_dma = virt_to_bus(priv->rx_ring); 00334 if (!priv->rx_ring) { 00335 DBG("rtl818x %s: cannot allocate RX ring\n", dev->netdev->name); 00336 return -ENOMEM; 00337 } 00338 00339 memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * RTL818X_RX_RING_SIZE); 00340 priv->rx_idx = 0; 00341 00342 for (i = 0; i < RTL818X_RX_RING_SIZE; i++) { 00343 struct io_buffer *iob = alloc_iob(MAX_RX_SIZE); 00344 entry = &priv->rx_ring[i]; 00345 if (!iob) 00346 return -ENOMEM; 00347 00348 priv->rx_buf[i] = iob; 00349 entry->rx_buf = cpu_to_le32(virt_to_bus(iob->data)); 00350 entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN | 00351 MAX_RX_SIZE); 00352 } 00353 entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR); 00354 return 0; 00355 }
| static void rtl818x_free_rx_ring | ( | struct net80211_device * | dev | ) | [static] |
Definition at line 357 of file rtl818x.c.
References free_dma(), free_iob(), NULL, net80211_device::priv, priv, RTL818X_RX_RING_SIZE, rtl818x_priv::rx_buf, and rtl818x_priv::rx_ring.
Referenced by rtl818x_start(), and rtl818x_stop().
00358 { 00359 struct rtl818x_priv *priv = dev->priv; 00360 int i; 00361 00362 for (i = 0; i < RTL818X_RX_RING_SIZE; i++) { 00363 free_iob(priv->rx_buf[i]); 00364 priv->rx_buf[i] = NULL; 00365 } 00366 00367 free_dma(priv->rx_ring, sizeof(*priv->rx_ring) * RTL818X_RX_RING_SIZE); 00368 priv->rx_ring = NULL; 00369 }
| static int rtl818x_init_tx_ring | ( | struct net80211_device * | dev | ) | [static] |
Definition at line 371 of file rtl818x.c.
References cpu_to_le32, DBG, ENOMEM, malloc_dma(), memset(), net_device::name, net80211_device::netdev, rtl818x_tx_desc::next_tx_desc, net80211_device::priv, priv, RTL818X_RING_ALIGN, RTL818X_TX_RING_SIZE, rtl818x_priv::tx_cons, rtl818x_priv::tx_prod, rtl818x_priv::tx_ring, rtl818x_priv::tx_ring_dma, and virt_to_bus().
Referenced by rtl818x_start().
00372 { 00373 struct rtl818x_priv *priv = dev->priv; 00374 int i; 00375 00376 priv->tx_ring = malloc_dma(sizeof(*priv->tx_ring) * RTL818X_TX_RING_SIZE, 00377 RTL818X_RING_ALIGN); 00378 priv->tx_ring_dma = virt_to_bus(priv->tx_ring); 00379 if (!priv->tx_ring) { 00380 DBG("rtl818x %s: cannot allocate TX ring\n", dev->netdev->name); 00381 return -ENOMEM; 00382 } 00383 00384 memset(priv->tx_ring, 0, sizeof(*priv->tx_ring) * RTL818X_TX_RING_SIZE); 00385 priv->tx_prod = priv->tx_cons = 0; 00386 00387 for (i = 0; i < RTL818X_TX_RING_SIZE; i++) 00388 priv->tx_ring[i].next_tx_desc = cpu_to_le32(priv->tx_ring_dma + 00389 ((i + 1) % RTL818X_TX_RING_SIZE) * sizeof(*priv->tx_ring)); 00390 00391 return 0; 00392 }
| static void rtl818x_free_tx_ring | ( | struct net80211_device * | dev | ) | [static] |
Definition at line 394 of file rtl818x.c.
References ECANCELED, free_dma(), net80211_tx_complete(), NULL, net80211_device::priv, priv, RTL818X_TX_RING_SIZE, rtl818x_priv::tx_buf, and rtl818x_priv::tx_ring.
Referenced by rtl818x_start(), and rtl818x_stop().
00395 { 00396 struct rtl818x_priv *priv = dev->priv; 00397 int i; 00398 00399 for (i = 0; i < RTL818X_TX_RING_SIZE; i++) { 00400 if (priv->tx_buf[i]) 00401 net80211_tx_complete(dev, priv->tx_buf[i], 0, ECANCELED); 00402 priv->tx_buf[i] = NULL; 00403 } 00404 00405 free_dma(priv->tx_ring, sizeof(*priv->tx_ring) * RTL818X_TX_RING_SIZE); 00406 priv->tx_ring = NULL; 00407 }
| static void rtl818x_irq | ( | struct net80211_device * | dev, | |
| int | enable | |||
| ) | [static] |
Definition at line 409 of file rtl818x.c.
References rtl818x_csr::INT_MASK, rtl818x_priv::map, net80211_device::priv, priv, and rtl818x_iowrite16().
Referenced by rtl818x_stop().
00410 { 00411 struct rtl818x_priv *priv = dev->priv; 00412 rtl818x_iowrite16(priv, &priv->map->INT_MASK, enable? 0xFFFF : 0); 00413 }
| static void rtl818x_set_hwaddr | ( | struct net80211_device * | dev, | |
| u8 * | hwaddr | |||
| ) | [static] |
Definition at line 416 of file rtl818x.c.
References rtl818x_csr::EEPROM_CMD, le16_to_cpu, le32_to_cpu, rtl818x_csr::MAC, rtl818x_priv::map, net80211_device::priv, priv, RTL818X_EEPROM_CMD_CONFIG, RTL818X_EEPROM_CMD_NORMAL, rtl818x_iowrite16(), rtl818x_iowrite32(), rtl818x_iowrite8(), u16, and u32.
Referenced by rtl818x_start().
00417 { 00418 struct rtl818x_priv *priv = dev->priv; 00419 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 00420 rtl818x_iowrite32(priv, (u32 *)&priv->map->MAC[0], 00421 le32_to_cpu(*(u32 *)hwaddr)); 00422 rtl818x_iowrite16(priv, (u16 *)&priv->map->MAC[4], 00423 le16_to_cpu(*(u16 *)(hwaddr + 4))); 00424 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 00425 }
| static int rtl818x_start | ( | struct net80211_device * | dev | ) | [static] |
Definition at line 427 of file rtl818x.c.
References rtl818x_csr::CMD, rtl818x_csr::CW_CONF, DBG, rtl818x_csr::INT_MASK, net_device::ll_addr, rtl818x_priv::map, rtl818x_csr::MAR, net_device::name, net80211_device::netdev, net80211_device::priv, priv, rtl818x_priv::r8185, rtl818x_csr::RDSAR, RF_PARAM_CARRIERSENSE1, RF_PARAM_CARRIERSENSE2, rtl818x_priv::rfparam, RTL818X_CMD_RX_ENABLE, RTL818X_CMD_TX_ENABLE, RTL818X_CW_CONF_PERPACKET_CW_SHIFT, RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT, rtl818x_free_rx_ring(), rtl818x_free_tx_ring(), rtl818x_init_hw(), rtl818x_init_rx_ring(), rtl818x_init_tx_ring(), rtl818x_ioread32(), rtl818x_ioread8(), rtl818x_iowrite16(), rtl818x_iowrite32(), rtl818x_iowrite8(), RTL818X_RX_CONF_BROADCAST, RTL818X_RX_CONF_CSDM1, RTL818X_RX_CONF_CSDM2, RTL818X_RX_CONF_DATA, RTL818X_RX_CONF_MGMT, RTL818X_RX_CONF_NICMAC, RTL818X_RX_CONF_ONLYERLPKT, RTL818X_RX_CONF_RX_AUTORESETPHY, rtl818x_set_hwaddr(), RTL818X_TX_AGC_CTL_FEEDBACK_ANT, RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT, RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT, RTL818X_TX_CONF_HW_SEQNUM, RTL818X_TX_CONF_NO_ICV, RTL818X_TX_CONF_PROBE_DTS, RTL818X_TX_CONF_SAT_HWPLCP, rtl818x_csr::RX_CONF, rtl818x_priv::rx_conf, rtl818x_priv::rx_ring_dma, rtl818x_csr::TNPDA, rtl818x_csr::TX_AGC_CTL, rtl818x_csr::TX_CONF, rtl818x_priv::tx_ring, rtl818x_priv::tx_ring_dma, u32, and u8.
00428 { 00429 struct rtl818x_priv *priv = dev->priv; 00430 int ret; 00431 u32 reg; 00432 00433 ret = rtl818x_init_rx_ring(dev); 00434 if (ret) 00435 return ret; 00436 00437 ret = rtl818x_init_tx_ring(dev); 00438 if (ret) 00439 goto err_free_rings; 00440 00441 ret = rtl818x_init_hw(dev); 00442 if (ret) 00443 goto err_free_rings; 00444 00445 rtl818x_set_hwaddr(dev, dev->netdev->ll_addr); 00446 00447 rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma); 00448 rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring_dma); 00449 00450 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); 00451 00452 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0); 00453 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0); 00454 00455 reg = RTL818X_RX_CONF_ONLYERLPKT | 00456 RTL818X_RX_CONF_RX_AUTORESETPHY | 00457 RTL818X_RX_CONF_MGMT | 00458 RTL818X_RX_CONF_DATA | 00459 (7 << 8 /* MAX RX DMA */) | 00460 RTL818X_RX_CONF_BROADCAST | 00461 RTL818X_RX_CONF_NICMAC; 00462 00463 if (priv->r8185) 00464 reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2; 00465 else { 00466 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1) 00467 ? RTL818X_RX_CONF_CSDM1 : 0; 00468 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2) 00469 ? RTL818X_RX_CONF_CSDM2 : 0; 00470 } 00471 00472 priv->rx_conf = reg; 00473 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); 00474 00475 if (priv->r8185) { 00476 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); 00477 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT; 00478 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT; 00479 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); 00480 00481 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); 00482 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT; 00483 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT; 00484 reg |= RTL818X_TX_AGC_CTL_FEEDBACK_ANT; 00485 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); 00486 00487 /* disable early TX */ 00488 rtl818x_iowrite8(priv, (u8 *)priv->map + 0xec, 0x3f); 00489 } 00490 00491 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF); 00492 reg |= (6 << 21 /* MAX TX DMA */) | 00493 RTL818X_TX_CONF_NO_ICV; 00494 00495 if (priv->r8185) 00496 reg &= ~RTL818X_TX_CONF_PROBE_DTS; 00497 else 00498 reg &= ~RTL818X_TX_CONF_HW_SEQNUM; 00499 00500 /* different meaning, same value on both rtl8185 and rtl8180 */ 00501 reg &= ~RTL818X_TX_CONF_SAT_HWPLCP; 00502 00503 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); 00504 00505 reg = rtl818x_ioread8(priv, &priv->map->CMD); 00506 reg |= RTL818X_CMD_RX_ENABLE; 00507 reg |= RTL818X_CMD_TX_ENABLE; 00508 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 00509 00510 DBG("%s rtl818x: started\n", dev->netdev->name); 00511 00512 return 0; 00513 00514 err_free_rings: 00515 rtl818x_free_rx_ring(dev); 00516 if (priv->tx_ring) 00517 rtl818x_free_tx_ring(dev); 00518 00519 DBG("%s rtl818x: failed to start\n", dev->netdev->name); 00520 00521 return ret; 00522 }
| static void rtl818x_stop | ( | struct net80211_device * | dev | ) | [static] |
Definition at line 524 of file rtl818x.c.
References rtl818x_csr::CMD, rtl818x_csr::CONFIG4, rtl818x_csr::EEPROM_CMD, rtl818x_priv::map, net80211_device::priv, priv, rtl818x_priv::rf, RTL818X_CMD_RX_ENABLE, RTL818X_CMD_TX_ENABLE, RTL818X_CONFIG4_VCOOFF, RTL818X_EEPROM_CMD_CONFIG, RTL818X_EEPROM_CMD_NORMAL, rtl818x_free_rx_ring(), rtl818x_free_tx_ring(), rtl818x_ioread8(), rtl818x_iowrite8(), rtl818x_irq(), rtl818x_rf_ops::stop, and u8.
00525 { 00526 struct rtl818x_priv *priv = dev->priv; 00527 u8 reg; 00528 00529 rtl818x_irq(dev, 0); 00530 00531 reg = rtl818x_ioread8(priv, &priv->map->CMD); 00532 reg &= ~RTL818X_CMD_TX_ENABLE; 00533 reg &= ~RTL818X_CMD_RX_ENABLE; 00534 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 00535 00536 priv->rf->stop(dev); 00537 00538 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 00539 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4); 00540 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF); 00541 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 00542 00543 rtl818x_free_rx_ring(dev); 00544 rtl818x_free_tx_ring(dev); 00545 }
| static int rtl818x_config | ( | struct net80211_device * | dev, | |
| int | changed | |||
| ) | [static] |
Definition at line 547 of file rtl818x.c.
References net80211_device::bssid, rtl818x_csr::BSSID, net80211_device::channel, net80211_device::channels, rtl818x_rf_ops::conf_erp, EINVAL, ETH_ALEN, rtl818x_priv::hw_rate, rtl818x_priv::hw_rtscts_rate, rtl818x_priv::map, rtl818x_csr::MSR, NET80211_ASSOCIATED, NET80211_CFG_ASSOC, NET80211_CFG_CHANNEL, NET80211_CFG_PHY_PARAMS, NET80211_CFG_RATE, net80211_device::priv, priv, net80211_device::rate, net80211_device::rates, rtl818x_priv::rf, rtl818x_iowrite8(), RTL818X_MSR_INFRA, RTL818X_MSR_NO_LINK, RTL818X_NR_RATES, rtl818x_rates, net80211_device::rtscts_rate, rtl818x_rf_ops::set_chan, and net80211_device::state.
00548 { 00549 struct rtl818x_priv *priv = dev->priv; 00550 int i; 00551 00552 if (changed & NET80211_CFG_CHANNEL) 00553 priv->rf->set_chan(dev, &dev->channels[dev->channel]); 00554 00555 if (changed & NET80211_CFG_ASSOC) { 00556 for (i = 0; i < ETH_ALEN; i++) 00557 rtl818x_iowrite8(priv, &priv->map->BSSID[i], dev->bssid[i]); 00558 rtl818x_iowrite8(priv, &priv->map->MSR, 00559 dev->state & NET80211_ASSOCIATED? 00560 RTL818X_MSR_INFRA : RTL818X_MSR_NO_LINK); 00561 } 00562 00563 if (changed & NET80211_CFG_PHY_PARAMS) 00564 priv->rf->conf_erp(dev); 00565 00566 if (changed & NET80211_CFG_RATE) { 00567 /* figure out the hardware rate number for the new 00568 logical rate */ 00569 int hw_rate; 00570 for (hw_rate = 0; hw_rate < RTL818X_NR_RATES && 00571 rtl818x_rates[hw_rate] != dev->rates[dev->rate]; 00572 hw_rate++) 00573 ; 00574 if (hw_rate >= RTL818X_NR_RATES) 00575 return -EINVAL; 00576 00577 priv->hw_rate = hw_rate; 00578 00579 /* and the RTS/CTS rate */ 00580 for (hw_rate = 0; hw_rate < RTL818X_NR_RATES && 00581 rtl818x_rates[hw_rate] != 00582 dev->rates[dev->rtscts_rate]; 00583 hw_rate++) 00584 ; 00585 if (hw_rate >= RTL818X_NR_RATES) 00586 hw_rate = priv->hw_rate; 00587 00588 priv->hw_rtscts_rate = hw_rate; 00589 } 00590 00591 return 0; 00592 }
| static int rtl818x_spi_read_bit | ( | struct bit_basher * | basher, | |
| unsigned int | bit_id | |||
| ) | [static] |
Definition at line 601 of file rtl818x.c.
References spi_bit_basher::basher, container_of, rtl818x_csr::EEPROM_CMD, rtl818x_priv::map, priv, rtl818x_eeprom_bits, rtl818x_ioread8(), rtl818x_priv::spibit, and u8.
00602 { 00603 struct rtl818x_priv *priv = container_of(basher, struct rtl818x_priv, 00604 spibit.basher); 00605 00606 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 00607 return reg & rtl818x_eeprom_bits[bit_id]; 00608 }
| static void rtl818x_spi_write_bit | ( | struct bit_basher * | basher, | |
| unsigned int | bit_id, | |||
| unsigned long | data | |||
| ) | [static] |
Definition at line 610 of file rtl818x.c.
References spi_bit_basher::basher, container_of, rtl818x_csr::EEPROM_CMD, rtl818x_priv::map, priv, rtl818x_eeprom_bits, rtl818x_ioread8(), rtl818x_iowrite8(), rtl818x_priv::spibit, u8, and udelay().
00612 { 00613 struct rtl818x_priv *priv = container_of(basher, struct rtl818x_priv, 00614 spibit.basher); 00615 00616 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 00617 u8 mask = rtl818x_eeprom_bits[bit_id]; 00618 reg = (reg & ~mask) | (data & mask); 00619 00620 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg); 00621 00622 rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 00623 udelay(10); 00624 }
| static int rtl818x_probe | ( | struct pci_device * | pdev, | |
| const struct pci_device_id *id | __unused | |||
| ) | [static] |
Definition at line 652 of file rtl818x.c.
References adjust_pci_device(), rtl818x_priv::anaparam, net80211_hw_info::bands, spi_bit_basher::basher, spi_device::bus, spi_bit_basher::bus, net80211_hw_info::channel_change_time, rtl818x_priv::csthreshold, DBG, DBG2, pci_device::dev, net_device::dev, rtl818x_priv::eeprom, rtl818x_csr::EEPROM_CMD, ENOMEM, ENOSYS, ENXIO, net80211_hw_info::flags, for_each_table_entry, free(), net80211_hw_info::hwaddr, rtl818x_rf_ops::id, init_spi_bit_basher(), pci_device::ioaddr, le16_to_cpu, le32_to_cpu, rtl818x_priv::map, memcpy, spi_bus::mode, net80211_hw_info::modes, rtl818x_rf_ops::name, net80211_alloc(), NET80211_BAND_2GHZ, NET80211_BAND_BIT_2GHZ, net80211_free(), NET80211_MODE_B, NET80211_MODE_G, net80211_register(), net80211_device::netdev, netdev_addr(), net80211_hw_info::nr_rates, NULL, spi_device::nvs, nvs_read(), bit_basher::op, pci_set_drvdata(), rtl818x_priv::pdev, net80211_device::priv, priv, rtl818x_priv::r8185, net80211_hw_info::rates, rtl818x_priv::rf, rtl818x_priv::rfparam, RTL818X_EEPROM_CMD_NORMAL, RTL818X_EEPROM_CMD_PROGRAM, rtl818x_ioread32(), rtl818x_ioread8(), rtl818x_iowrite8(), RTL818X_NR_B_RATES, RTL818X_NR_RATES, rtl818x_rates, RTL818X_RF_DRIVERS, RTL818X_TX_CONF_HWVER_MASK, RTL818X_TX_CONF_R8180_ABCD, RTL818X_TX_CONF_R8180_F, RTL818X_TX_CONF_R8185_ABC, RTL818X_TX_CONF_R8185_D, rtl818x_csr::RX_CONF, net80211_hw_info::signal_max, net80211_hw_info::signal_type, SPI_MODE_THREEWIRE, rtl818x_priv::spibit, rtl818x_csr::TX_CONF, rtl818x_priv::txpower, u16, u32, udelay(), and zalloc().
00654 { 00655 struct net80211_device *dev; 00656 struct rtl818x_priv *priv; 00657 struct rtl818x_rf_ops *rf; 00658 int err, i; 00659 const char *chip_name; 00660 u32 reg; 00661 u16 eeprom_val; 00662 struct net80211_hw_info *hwinfo; 00663 00664 hwinfo = zalloc(sizeof(*hwinfo)); 00665 if (!hwinfo) { 00666 DBG("rtl818x: hwinfo alloc failed\n"); 00667 return -ENOMEM; 00668 } 00669 00670 adjust_pci_device(pdev); 00671 00672 dev = net80211_alloc(sizeof(*priv)); 00673 if (!dev) { 00674 DBG("rtl818x: net80211 alloc failed\n"); 00675 return -ENOMEM; 00676 } 00677 00678 priv = dev->priv; 00679 priv->pdev = pdev; 00680 dev->netdev->dev = &pdev->dev; 00681 00682 priv->map = (struct rtl818x_csr *)pdev->ioaddr; 00683 if (!priv->map) { 00684 DBG("rtl818x: cannot find device memory\n"); 00685 err = -ENXIO; 00686 goto err_free_dev; 00687 } 00688 00689 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF); 00690 reg &= RTL818X_TX_CONF_HWVER_MASK; 00691 switch (reg) { 00692 case RTL818X_TX_CONF_R8180_ABCD: 00693 chip_name = "0"; 00694 break; 00695 case RTL818X_TX_CONF_R8180_F: 00696 chip_name = "0vF"; 00697 break; 00698 case RTL818X_TX_CONF_R8185_ABC: 00699 chip_name = "5"; 00700 break; 00701 case RTL818X_TX_CONF_R8185_D: 00702 chip_name = "5vD"; 00703 break; 00704 default: 00705 DBG("rtl818x: Unknown chip! (0x%x)\n", reg >> 25); 00706 err = -ENOSYS; 00707 goto err_free_dev; 00708 } 00709 00710 priv->r8185 = reg & RTL818X_TX_CONF_R8185_ABC; 00711 00712 hwinfo->bands = NET80211_BAND_BIT_2GHZ; 00713 hwinfo->flags = NET80211_HW_RX_HAS_FCS; 00714 hwinfo->signal_type = NET80211_SIGNAL_ARBITRARY; 00715 hwinfo->signal_max = 65; 00716 hwinfo->channel_change_time = 1000; 00717 00718 memcpy(hwinfo->rates[NET80211_BAND_2GHZ], rtl818x_rates, 00719 sizeof(*rtl818x_rates) * RTL818X_NR_RATES); 00720 00721 if (priv->r8185) { 00722 hwinfo->modes = NET80211_MODE_B | NET80211_MODE_G; 00723 hwinfo->nr_rates[NET80211_BAND_2GHZ] = RTL818X_NR_RATES; 00724 } else { 00725 hwinfo->modes = NET80211_MODE_B; 00726 hwinfo->nr_rates[NET80211_BAND_2GHZ] = RTL818X_NR_B_RATES; 00727 } 00728 00729 priv->spibit.basher.op = &rtl818x_basher_ops; 00730 priv->spibit.bus.mode = SPI_MODE_THREEWIRE; 00731 init_spi_bit_basher(&priv->spibit); 00732 00733 DBG2("rtl818x RX_CONF: %08x\n", rtl818x_ioread32(priv, &priv->map->RX_CONF)); 00734 00735 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6)) 00736 init_at93c66(&priv->eeprom, 16); 00737 else 00738 init_at93c46(&priv->eeprom, 16); 00739 priv->eeprom.bus = &priv->spibit.bus; 00740 00741 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_PROGRAM); 00742 rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 00743 udelay(10); 00744 00745 nvs_read(&priv->eeprom.nvs, 0x06, &eeprom_val, 2); 00746 DBG2("rtl818x eeprom val = %04x\n", eeprom_val); 00747 eeprom_val &= 0xFF; 00748 00749 priv->rf = NULL; 00750 for_each_table_entry(rf, RTL818X_RF_DRIVERS) { 00751 if (rf->id == eeprom_val) { 00752 priv->rf = rf; 00753 break; 00754 } 00755 } 00756 00757 if (!priv->rf) { 00758 #if DBGLVL_MAX 00759 if (eeprom_val < RTL818X_NR_RF_NAMES && 00760 rtl818x_rf_names[eeprom_val] != NULL) 00761 DBG("rtl818x: %s RF frontend not supported!\n", 00762 rtl818x_rf_names[eeprom_val]); 00763 else 00764 DBG("rtl818x: RF frontend #%d not recognized!\n", 00765 eeprom_val); 00766 #endif 00767 00768 err = -ENOSYS; 00769 goto err_free_dev; 00770 } 00771 00772 nvs_read(&priv->eeprom.nvs, 0x17, &eeprom_val, 2); 00773 priv->csthreshold = eeprom_val >> 8; 00774 if (!priv->r8185) { 00775 nvs_read(&priv->eeprom.nvs, 0xD, &priv->anaparam, 4); 00776 nvs_read(&priv->eeprom.nvs, 0x19, &priv->rfparam, 2); 00777 priv->anaparam = le32_to_cpu(priv->anaparam); 00778 priv->rfparam = le16_to_cpu(priv->rfparam); 00779 } 00780 00781 /* read the MAC address */ 00782 nvs_read(&priv->eeprom.nvs, 0x7, hwinfo->hwaddr, 6); 00783 00784 /* CCK TX power */ 00785 for (i = 0; i < 14; i += 2) { 00786 u16 txpwr; 00787 nvs_read(&priv->eeprom.nvs, 0x10 + (i >> 1), &txpwr, 2); 00788 priv->txpower[i] = txpwr & 0xFF; 00789 priv->txpower[i + 1] = txpwr >> 8; 00790 } 00791 00792 /* OFDM TX power */ 00793 if (priv->r8185) { 00794 for (i = 0; i < 14; i += 2) { 00795 u16 txpwr; 00796 nvs_read(&priv->eeprom.nvs, 0x20 + (i >> 1), &txpwr, 2); 00797 priv->txpower[i] |= (txpwr & 0xFF) << 8; 00798 priv->txpower[i + 1] |= txpwr & 0xFF00; 00799 } 00800 } 00801 00802 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 00803 00804 err = net80211_register(dev, &rtl818x_operations, hwinfo); 00805 if (err) { 00806 DBG("rtl818x: cannot register device\n"); 00807 goto err_free_dev; 00808 } 00809 00810 free(hwinfo); 00811 00812 DBG("rtl818x: Realtek RTL818%s (RF chip %s) with address %s\n", 00813 chip_name, priv->rf->name, netdev_addr(dev->netdev)); 00814 00815 return 0; 00816 00817 err_free_dev: 00818 pci_set_drvdata(pdev, NULL); 00819 net80211_free(dev); 00820 free(hwinfo); 00821 return err; 00822 }
| static void rtl818x_remove | ( | struct pci_device * | pdev | ) | [static] |
Definition at line 824 of file rtl818x.c.
References net80211_free(), net80211_unregister(), and pci_get_drvdata().
00825 { 00826 struct net80211_device *dev = pci_get_drvdata(pdev); 00827 00828 if (!dev) 00829 return; 00830 00831 net80211_unregister(dev); 00832 net80211_free(dev); 00833 }
const u16 rtl818x_rates[] [static] |
Initial value:
{
10, 20, 55, 110,
60, 90, 120, 180, 240, 360, 480, 540,
0, 0, 0, 0,
}
Definition at line 37 of file rtl818x.c.
Referenced by rtl818x_config(), rtl818x_handle_rx(), and rtl818x_probe().
const u8 rtl818x_eeprom_bits[] [static] |
Initial value:
{
[SPI_BIT_SCLK] = RTL818X_EEPROM_CMD_CK,
[SPI_BIT_MISO] = RTL818X_EEPROM_CMD_READ,
[SPI_BIT_MOSI] = RTL818X_EEPROM_CMD_WRITE,
[SPI_BIT_SS(0)] = RTL818X_EEPROM_CMD_CS,
}
Definition at line 594 of file rtl818x.c.
Referenced by rtl818x_spi_read_bit(), and rtl818x_spi_write_bit().
struct bit_basher_operations rtl818x_basher_ops [static] |
Initial value:
{
.read = rtl818x_spi_read_bit,
.write = rtl818x_spi_write_bit,
}
Initial value:
{
.open = rtl818x_start,
.close = rtl818x_stop,
.transmit = rtl818x_tx,
.poll = rtl818x_poll,
.irq = rtl818x_irq,
.config = rtl818x_config,
}
struct pci_device_id rtl818x_nics[] [static] |
Initial value:
{
RTL_ROM(0x10ec, 0x8185, "rtl8185", "Realtek 8185", 0),
RTL_ROM(0x1799, 0x700f, "f5d7000", "Belkin F5D7000", 0),
RTL_ROM(0x1799, 0x701f, "f5d7010", "Belkin F5D7010", 0),
RTL_ROM(0x10ec, 0x8180, "rtl8180", "Realtek 8180", 0),
RTL_ROM(0x1799, 0x6001, "f5d6001", "Belkin F5D6001", 0),
RTL_ROM(0x1799, 0x6020, "f5d6020", "Belkin F5D6020", 0),
RTL_ROM(0x1186, 0x3300, "dwl510", "D-Link DWL-510", 0),
}
| struct pci_driver rtl818x_driver __pci_driver |
Initial value:
{
.ids = rtl818x_nics,
.id_count = sizeof(rtl818x_nics) / sizeof(rtl818x_nics[0]),
.probe = rtl818x_probe,
.remove = rtl818x_remove,
}
1.5.7.1