pciextra.c File Reference

#include <stdint.h>
#include <gpxe/pci.h>

Go to the source code of this file.

Functions
	FILE_LICENCE (GPL2_OR_LATER)
int	pci_find_capability (struct pci_device *pci, int cap)
	Look for a PCI capability.
unsigned long	pci_bar_size (struct pci_device *pci, unsigned int reg)
	Find the size of a PCI BAR.

---

Function Documentation

FILE_LICENCE

(

GPL2_OR_LATER

)

int pci_find_capability	(	struct pci_device *	pci,
		int	cap
	)

Look for a PCI capability.

Parameters:

	pci	PCI device to query
	cap	Capability code

Return values:

address

Address of capability, or 0 if not found

Determine whether or not a device supports a given PCI capability. Returns the address of the requested capability structure within the device's PCI configuration space, or 0 if the device does not support it.

Definition at line 18 of file pciextra.c.

References DBG, id, PCI_CAP_LIST_ID, PCI_CAP_LIST_NEXT, PCI_CAPABILITY_LIST, PCI_CB_CAPABILITY_LIST, PCI_HEADER_TYPE, PCI_HEADER_TYPE_BRIDGE, PCI_HEADER_TYPE_CARDBUS, PCI_HEADER_TYPE_NORMAL, pci_read_config_byte(), pci_read_config_word(), PCI_STATUS, and PCI_STATUS_CAP_LIST.

Referenced by ath5k_hw_attach(), ath5k_hw_nic_wakeup(), bnx2_init_board(), e1000_read_pcie_cap_reg(), e1000e_read_pcie_cap_reg(), igb_read_pcie_cap_reg(), igb_write_pcie_cap_reg(), mac_address_from_string_specs(), pci_set_power_state(), rtl8169_probe(), sky2_reset(), sky2_rx_start(), tg3_get_invariants(), and tg3_probe().

                                                            {
        uint16_t status;
        uint8_t pos, id;
        uint8_t hdr_type;
        int ttl = 48;

        pci_read_config_word ( pci, PCI_STATUS, &status );
        if ( ! ( status & PCI_STATUS_CAP_LIST ) )
                return 0;

        pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdr_type );
        switch ( hdr_type & 0x7F ) {
        case PCI_HEADER_TYPE_NORMAL:
        case PCI_HEADER_TYPE_BRIDGE:
        default:
                pci_read_config_byte ( pci, PCI_CAPABILITY_LIST, &pos );
                break;
        case PCI_HEADER_TYPE_CARDBUS:
                pci_read_config_byte ( pci, PCI_CB_CAPABILITY_LIST, &pos );
                break;
        }
        while ( ttl-- && pos >= 0x40 ) {
                pos &= ~3;
                pci_read_config_byte ( pci, pos + PCI_CAP_LIST_ID, &id );
                DBG ( "PCI Capability: %d\n", id );
                if ( id == 0xff )
                        break;
                if ( id == cap )
                        return pos;
                pci_read_config_byte ( pci, pos + PCI_CAP_LIST_NEXT, &pos );
        }
        return 0;
}

unsigned long pci_bar_size	(	struct pci_device *	pci,
		unsigned int	reg
	)

Find the size of a PCI BAR.

Parameters:

	pci	PCI device
	reg	PCI register number

Return values:

size

BAR size

It should not be necessary for any Etherboot code to call this function.

Definition at line 62 of file pciextra.c.

References PCI_BASE_ADDRESS_IO_MASK, PCI_BASE_ADDRESS_MEM_MASK, PCI_BASE_ADDRESS_SPACE_IO, PCI_COMMAND, pci_read_config_dword(), pci_read_config_word(), pci_write_config_dword(), pci_write_config_word(), and size.

Referenced by amd8111e_probe(), e1000_probe(), e1000e_probe(), efab_probe(), forcedeth_probe(), igb_probe(), phantom_map_crb(), tg3_probe(), velocity_get_pci_info(), and vxge_probe().

                                                                        {
        uint16_t cmd;
        uint32_t start, size;

        /* Save the original command register */
        pci_read_config_word ( pci, PCI_COMMAND, &cmd );
        /* Save the original bar */
        pci_read_config_dword ( pci, reg, &start );
        /* Compute which bits can be set */
        pci_write_config_dword ( pci, reg, ~0 );
        pci_read_config_dword ( pci, reg, &size );
        /* Restore the original size */
        pci_write_config_dword ( pci, reg, start );
        /* Find the significant bits */
        /* Restore the original command register. This reenables decoding. */
        pci_write_config_word ( pci, PCI_COMMAND, cmd );
        if ( start & PCI_BASE_ADDRESS_SPACE_IO ) {
                size &= PCI_BASE_ADDRESS_IO_MASK;
        } else {
                size &= PCI_BASE_ADDRESS_MEM_MASK;
        }
        /* Find the lowest bit set */
        size = size & ~( size - 1 );
        return size;
}