Go to the source code of this file.
| #define NUM_CQS (NUM_RX_RINGS + NUM_TX_RINGS) |
| #define GO_BIT_TIMEOUT 6000 |
| #define TBIT_RETRIES 100 |
| #define UNITS_BUFFER_SIZE 8 |
Definition at line 52 of file mtnic.h.
Referenced by mtnic_alloc_iobuf(), mtnic_alloc_resources(), mtnic_alloc_ring(), mtnic_CONFIG_CQ(), mtnic_CONFIG_RX_RING(), and mtnic_CONFIG_TX_RING().
| #define MAX_GAP_PROD_CONS ( UNITS_BUFFER_SIZE / 4 ) |
| #define DEF_MTU ETH_DEF_LEN + ETH_FCS_LEN |
| #define DEF_IOBUF_SIZE ETH_DEF_LEN |
| #define MAC_ADDRESS_SIZE 6 |
| #define NUM_EQES 16 |
| #define ROUND_TO_CHECK 0x400 |
| #define DELAY_LINK_CHECK 300 |
| #define CHECK_LINK_TIMES 7 |
| #define XNOR | ( | x, | |||
| y | ) | (!(x) == !(y)) |
Definition at line 67 of file mtnic.h.
Referenced by mtnic_process_rx_cq(), and mtnic_process_tx_cq().
| #define dma_addr_t unsigned long |
| #define PAGE_SIZE 4096 |
Definition at line 69 of file mtnic.h.
Referenced by mtnic_alloc_cmdif(), mtnic_alloc_cq(), mtnic_alloc_eq(), mtnic_alloc_ring(), mtnic_CONFIG_PORT_RSS_STEER(), mtnic_disable(), mtnic_init_card(), mtnic_map_cmd(), and mtnic_SET_PORT_RSS_INDIRECTION().
| #define PAGE_MASK (PAGE_SIZE - 1) |
Definition at line 70 of file mtnic.h.
Referenced by mtnic_CONFIG_CQ(), mtnic_CONFIG_EQ(), mtnic_map_cmd(), and vring_init().
| #define MTNIC_MAILBOX_SIZE PAGE_SIZE |
| #define MTNIC_BC_OFF | ( | bc | ) | ((bc) >> 8) |
| #define MTNIC_BC_ONES | ( | size | ) | (~((int)0x80000000 >> (31 - size))) |
| #define MTNIC_BC_MASK | ( | bc | ) | (MTNIC_BC_ONES(MTNIC_BC_SZ(bc)) << MTNIC_BC_OFF(bc)) |
Definition at line 80 of file mtnic.h.
Referenced by cmdif_go_bit(), mtnic_cmd(), mtnic_HEART_BEAT(), mtnic_SET_PORT_STATE(), and mtnic_SET_RX_RING_ADDR().
| #define MTNIC_BC_VAL | ( | val, | |||
| bc | ) | (((val) & MTNIC_BC_ONES(MTNIC_BC_SZ(bc))) << MTNIC_BC_OFF(bc)) |
| #define MTNIC_BC_GET | ( | x, | |||
| bc | ) | (((x) >> MTNIC_BC_OFF(bc)) & MTNIC_BC_ONES(MTNIC_BC_SZ(bc))) |
| #define MTNIC_BC_SET | ( | x, | |||
| val, | |||||
| bc | ) | ((x) = ((x) & ~MTNIC_BC_MASK(bc)) | MTNIC_BC_VAL(val, bc)) |
| #define MTNIC_BC_PUT | ( | x, | |||
| val, | |||||
| bc | ) | ((x) |= MTNIC_BC_VAL(val, bc)) |
Definition at line 100 of file mtnic.h.
Referenced by mtnic_CONFIG_EQ(), and mtnic_CONFIG_RX_RING().
| #define MTNIC_RESET_OFFSET 0xF0010 |
| #define MTNIC_BIT_DESC_OWN 0x80000000 |
| #define MTNIC_OPCODE_SEND 0xa |
| #define MTNIC_BIT_NO_ICRC 0x2 |
| #define MTNIC_BIT_TX_COMP 0xc |
| #define MTNIC_BIT_BAD_FCS 0x10 |
| #define MTNIC_OPCODE_ERROR 0x1e |
| #define MTNIC_BIT_CQ_OWN 0x80 |
Definition at line 304 of file mtnic.h.
Referenced by mtnic_alloc_cq(), mtnic_process_rx_cq(), and mtnic_process_tx_cq().
| #define MTNIC_BIT_EQE_OWN 0x80 |
| #define MTNIC_MASK_CMD_REG_T_BIT MTNIC_BC(21,1) |
| #define MTNIC_MASK_CMD_REG_GO_BIT MTNIC_BC(23,1) |
| #define MTNIC_MASK_HEAR_BEAT_INT_ERROR MTNIC_BC(31,1) |
| #define MTNIC_MASK_CONFIG_PORT_STATE MTNIC_BC(0,1) |
| #define MTNIC_MASK_CONFIG_RX_RING_STRIDE MTNIC_BC(4,3) |
| #define MTNIC_MASK_CONFIG_RX_RING_SIZE MTNIC_BC(0,4) |
| #define MTNIC_MASK_SET_RX_RING_ADDR_BY_MAC MTNIC_BC(12,1) |
| #define MTNIC_MASK_CONFIG_EQ_INT_VEC MTNIC_BC(0,6) |
| #define MTNIC_MASK_CONFIG_EQ_SIZE MTNIC_BC(0,5) |
| #define MTNIC_MASK_CONFIG_EQ_OFFSET MTNIC_BC(0,6) |
| typedef enum mtnic_if_cmd mtnic_if_cmd_t |
| typedef enum mtnic_if_caps mtnic_if_caps_t |
selectors for MTNIC_IF_CMD_QUERY_CAP
| typedef enum mtnic_if_steer_types mtnic_if_steer_types_t |
| typedef enum mtnic_if_memory_types mtnic_if_memory_types_t |
types of memory access modes
| enum mtnic_if_cmd |
Definition at line 107 of file mtnic.h.
00107 { 00108 /* NIC commands: */ 00109 MTNIC_IF_CMD_QUERY_FW = 0x004, /* query FW (size, version, etc) */ 00110 MTNIC_IF_CMD_MAP_FW = 0xfff, /* map pages for FW image */ 00111 MTNIC_IF_CMD_RUN_FW = 0xff6, /* run the FW */ 00112 MTNIC_IF_CMD_QUERY_CAP = 0x001, /* query MTNIC capabilities */ 00113 MTNIC_IF_CMD_MAP_PAGES = 0x002, /* map physical pages to HW */ 00114 MTNIC_IF_CMD_OPEN_NIC = 0x003, /* run the firmware */ 00115 MTNIC_IF_CMD_CONFIG_RX = 0x005, /* general receive configuration */ 00116 MTNIC_IF_CMD_CONFIG_TX = 0x006, /* general transmit configuration */ 00117 MTNIC_IF_CMD_CONFIG_INT_FREQ = 0x007, /* interrupt timers freq limits */ 00118 MTNIC_IF_CMD_HEART_BEAT = 0x008, /* NOP command testing liveliness */ 00119 MTNIC_IF_CMD_CLOSE_NIC = 0x009, /* release memory and stop the NIC */ 00120 00121 /* Port commands: */ 00122 MTNIC_IF_CMD_CONFIG_PORT_RSS_STEER = 0x10, /* set RSS mode */ 00123 MTNIC_IF_CMD_SET_PORT_RSS_INDIRECTION = 0x11, /* set RSS indirection tbl */ 00124 MTNIC_IF_CMD_CONFIG_PORT_PRIO_STEERING = 0x12, /* set PRIORITY mode */ 00125 MTNIC_IF_CMD_CONFIG_PORT_ADDR_STEER = 0x13, /* set Address steer mode */ 00126 MTNIC_IF_CMD_CONFIG_PORT_VLAN_FILTER = 0x14, /* configure VLAN filter */ 00127 MTNIC_IF_CMD_CONFIG_PORT_MCAST_FILTER = 0x15, /* configure mcast filter */ 00128 MTNIC_IF_CMD_ENABLE_PORT_MCAST_FILTER = 0x16, /* enable/disable */ 00129 MTNIC_IF_CMD_SET_PORT_MTU = 0x17, /* set port MTU */ 00130 MTNIC_IF_CMD_SET_PORT_PROMISCUOUS_MODE = 0x18, /* enable/disable promisc */ 00131 MTNIC_IF_CMD_SET_PORT_DEFAULT_RING = 0x19, /* set the default ring */ 00132 MTNIC_IF_CMD_SET_PORT_STATE = 0x1a, /* set link up/down */ 00133 MTNIC_IF_CMD_DUMP_STAT = 0x1b, /* dump statistics */ 00134 MTNIC_IF_CMD_ARM_PORT_STATE_EVENT = 0x1c, /* arm the port state event */ 00135 00136 /* Ring / Completion queue commands: */ 00137 MTNIC_IF_CMD_CONFIG_CQ = 0x20, /* set up completion queue */ 00138 MTNIC_IF_CMD_CONFIG_RX_RING = 0x21, /* setup Rx ring */ 00139 MTNIC_IF_CMD_SET_RX_RING_ADDR = 0x22, /* set Rx ring filter by address */ 00140 MTNIC_IF_CMD_SET_RX_RING_MCAST = 0x23, /* set Rx ring mcast filter */ 00141 MTNIC_IF_CMD_ARM_RX_RING_WM = 0x24, /* one-time low-watermark INT */ 00142 MTNIC_IF_CMD_CONFIG_TX_RING = 0x25, /* set up Tx ring */ 00143 MTNIC_IF_CMD_ENFORCE_TX_RING_ADDR = 0x26, /* setup anti spoofing */ 00144 MTNIC_IF_CMD_CONFIG_EQ = 0x27, /* config EQ ring */ 00145 MTNIC_IF_CMD_RELEASE_RESOURCE = 0x28, /* release internal ref to resource */ 00146 }
| enum mtnic_if_caps |
selectors for MTNIC_IF_CMD_QUERY_CAP
Definition at line 151 of file mtnic.h.
00151 { 00152 MTNIC_IF_CAP_MAX_TX_RING_PER_PORT = 0x0, 00153 MTNIC_IF_CAP_MAX_RX_RING_PER_PORT = 0x1, 00154 MTNIC_IF_CAP_MAX_CQ_PER_PORT = 0x2, 00155 MTNIC_IF_CAP_NUM_PORTS = 0x3, 00156 MTNIC_IF_CAP_MAX_TX_DESC = 0x4, 00157 MTNIC_IF_CAP_MAX_RX_DESC = 0x5, 00158 MTNIC_IF_CAP_MAX_CQES = 0x6, 00159 MTNIC_IF_CAP_MAX_TX_SG_ENTRIES = 0x7, 00160 MTNIC_IF_CAP_MAX_RX_SG_ENTRIES = 0x8, 00161 MTNIC_IF_CAP_MEM_KEY = 0x9, /* key to mem (after map_pages) */ 00162 MTNIC_IF_CAP_RSS_HASH_TYPE = 0xa, /* one of mtnic_if_rss_types_t */ 00163 MTNIC_IF_CAP_MAX_PORT_UCAST_ADDR = 0xc, 00164 MTNIC_IF_CAP_MAX_RING_UCAST_ADDR = 0xd, /* only for ADDR steer */ 00165 MTNIC_IF_CAP_MAX_PORT_MCAST_ADDR = 0xe, 00166 MTNIC_IF_CAP_MAX_RING_MCAST_ADDR = 0xf, /* only for ADDR steer */ 00167 MTNIC_IF_CAP_INTA = 0x10, 00168 MTNIC_IF_CAP_BOARD_ID_LOW = 0x11, 00169 MTNIC_IF_CAP_BOARD_ID_HIGH = 0x12, 00170 MTNIC_IF_CAP_TX_CQ_DB_OFFSET = 0x13, /* offset in bytes for TX, CQ doorbell record */ 00171 MTNIC_IF_CAP_EQ_DB_OFFSET = 0x14, /* offset in bytes for EQ doorbell record */ 00172 00173 /* These are per port - using port number from cap modifier field */ 00174 MTNIC_IF_CAP_SPEED = 0x20, 00175 MTNIC_IF_CAP_DEFAULT_MAC = 0x21, 00176 MTNIC_IF_CAP_EQ_OFFSET = 0x22, 00177 MTNIC_IF_CAP_CQ_OFFSET = 0x23, 00178 MTNIC_IF_CAP_TX_OFFSET = 0x24, 00179 MTNIC_IF_CAP_RX_OFFSET = 0x25, 00180 00181 } mtnic_if_caps_t;
| enum mtnic_if_steer_types |
Definition at line 183 of file mtnic.h.
00183 { 00184 MTNIC_IF_STEER_NONE = 0, 00185 MTNIC_IF_STEER_PRIORITY = 1, 00186 MTNIC_IF_STEER_RSS = 2, 00187 MTNIC_IF_STEER_ADDRESS = 3, 00188 } mtnic_if_steer_types_t;
types of memory access modes
Definition at line 191 of file mtnic.h.
00191 { 00192 MTNIC_IF_MEM_TYPE_SNOOP = 1, 00193 MTNIC_IF_MEM_TYPE_NO_SNOOP = 2 00194 } mtnic_if_memory_types_t;
| anonymous enum |
Definition at line 197 of file mtnic.h.
00197 { 00198 MTNIC_HCR_BASE = 0x1f000, 00199 MTNIC_HCR_SIZE = 0x0001c, 00200 MTNIC_CLR_INT_SIZE = 0x00008, 00201 };
| enum mtnic_state |
Definition at line 359 of file mtnic.h.
00359 { 00360 CARD_DOWN, 00361 CARD_INITIALIZED, 00362 CARD_UP, 00363 CARD_LINK_DOWN, 00364 };
| MTNIC_IF_RESOURCE_TYPE_CQ | |
| MTNIC_IF_RESOURCE_TYPE_RX_RING | |
| MTNIC_IF_RESOURCE_TYPE_TX_RING | |
| MTNIC_IF_RESOURCE_TYPE_EQ |
Definition at line 674 of file mtnic.h.
00674 { 00675 MTNIC_IF_RESOURCE_TYPE_CQ = 0, 00676 MTNIC_IF_RESOURCE_TYPE_RX_RING, 00677 MTNIC_IF_RESOURCE_TYPE_TX_RING, 00678 MTNIC_IF_RESOURCE_TYPE_EQ 00679 };
| FILE_LICENCE | ( | GPL2_ONLY | ) |
| struct dev_pci_struct mtnic_pci_dev |
Definition at line 717 of file mtnic.h.
Referenced by mtnic_alloc_cmdif(), mtnic_alloc_eq(), mtnic_alloc_ring(), mtnic_init_pci(), mtnic_reset(), and restore_config().
1.5.7.1