linda.c

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00001 /*
00002  * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
00003  *
00004  * This program is free software; you can redistribute it and/or
00005  * modify it under the terms of the GNU General Public License as
00006  * published by the Free Software Foundation; either version 2 of the
00007  * License, or any later version.
00008  *
00009  * This program is distributed in the hope that it will be useful, but
00010  * WITHOUT ANY WARRANTY; without even the implied warranty of
00011  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00012  * General Public License for more details.
00013  *
00014  * You should have received a copy of the GNU General Public License
00015  * along with this program; if not, write to the Free Software
00016  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
00017  */
00018 
00019 FILE_LICENCE ( GPL2_OR_LATER );
00020 
00021 #include <stdint.h>
00022 #include <stdlib.h>
00023 #include <errno.h>
00024 #include <unistd.h>
00025 #include <assert.h>
00026 #include <gpxe/io.h>
00027 #include <gpxe/pci.h>
00028 #include <gpxe/infiniband.h>
00029 #include <gpxe/i2c.h>
00030 #include <gpxe/bitbash.h>
00031 #include <gpxe/malloc.h>
00032 #include <gpxe/iobuf.h>
00033 #include "linda.h"
00034 
00035 /**
00036  * @file
00037  *
00038  * QLogic Linda Infiniband HCA
00039  *
00040  */
00041 
00042 /** A Linda send work queue */
00043 struct linda_send_work_queue {
00044         /** Send buffer usage */
00045         uint8_t *send_buf;
00046         /** Producer index */
00047         unsigned int prod;
00048         /** Consumer index */
00049         unsigned int cons;
00050 };
00051 
00052 /** A Linda receive work queue */
00053 struct linda_recv_work_queue {
00054         /** Receive header ring */
00055         void *header;
00056         /** Receive header producer offset (written by hardware) */
00057         struct QIB_7220_scalar header_prod;
00058         /** Receive header consumer offset */
00059         unsigned int header_cons;
00060         /** Offset within register space of the eager array */
00061         unsigned long eager_array;
00062         /** Number of entries in eager array */
00063         unsigned int eager_entries;
00064         /** Eager array producer index */
00065         unsigned int eager_prod;
00066         /** Eager array consumer index */
00067         unsigned int eager_cons;
00068 };
00069 
00070 /** A Linda HCA */
00071 struct linda {
00072         /** Registers */
00073         void *regs;
00074 
00075         /** In-use contexts */
00076         uint8_t used_ctx[LINDA_NUM_CONTEXTS];
00077         /** Send work queues */
00078         struct linda_send_work_queue send_wq[LINDA_NUM_CONTEXTS];
00079         /** Receive work queues */
00080         struct linda_recv_work_queue recv_wq[LINDA_NUM_CONTEXTS];
00081 
00082         /** Offset within register space of the first send buffer */
00083         unsigned long send_buffer_base;
00084         /** Send buffer availability (reported by hardware) */
00085         struct QIB_7220_SendBufAvail *sendbufavail;
00086         /** Send buffer availability (maintained by software) */
00087         uint8_t send_buf[LINDA_MAX_SEND_BUFS];
00088         /** Send buffer availability producer counter */
00089         unsigned int send_buf_prod;
00090         /** Send buffer availability consumer counter */
00091         unsigned int send_buf_cons;
00092         /** Number of reserved send buffers (across all QPs) */
00093         unsigned int reserved_send_bufs;
00094 
00095         /** I2C bit-bashing interface */
00096         struct i2c_bit_basher i2c;
00097         /** I2C serial EEPROM */
00098         struct i2c_device eeprom;
00099 };
00100 
00101 /***************************************************************************
00102  *
00103  * Linda register access
00104  *
00105  ***************************************************************************
00106  *
00107  * This card requires atomic 64-bit accesses.  Strange things happen
00108  * if you try to use 32-bit accesses; sometimes they work, sometimes
00109  * they don't, sometimes you get random data.
00110  *
00111  * These accessors use the "movq" MMX instruction, and so won't work
00112  * on really old Pentiums (which won't have PCIe anyway, so this is
00113  * something of a moot point).
00114  */
00115 
00116 /**
00117  * Read Linda qword register
00118  *
00119  * @v linda             Linda device
00120  * @v dwords            Register buffer to read into
00121  * @v offset            Register offset
00122  */
00123 static void linda_readq ( struct linda *linda, uint32_t *dwords,
00124                           unsigned long offset ) {
00125         void *addr = ( linda->regs + offset );
00126 
00127         __asm__ __volatile__ ( "movq (%1), %%mm0\n\t"
00128                                "movq %%mm0, (%0)\n\t"
00129                                : : "r" ( dwords ), "r" ( addr ) : "memory" );
00130 
00131         DBGIO ( "[%08lx] => %08x%08x\n",
00132                 virt_to_phys ( addr ), dwords[1], dwords[0] );
00133 }
00134 #define linda_readq( _linda, _ptr, _offset ) \
00135         linda_readq ( (_linda), (_ptr)->u.dwords, (_offset) )
00136 #define linda_readq_array8b( _linda, _ptr, _offset, _idx ) \
00137         linda_readq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 8 ) ) )
00138 #define linda_readq_array64k( _linda, _ptr, _offset, _idx ) \
00139         linda_readq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 65536 ) ) )
00140 
00141 /**
00142  * Write Linda qword register
00143  *
00144  * @v linda             Linda device
00145  * @v dwords            Register buffer to write
00146  * @v offset            Register offset
00147  */
00148 static void linda_writeq ( struct linda *linda, const uint32_t *dwords,
00149                            unsigned long offset ) {
00150         void *addr = ( linda->regs + offset );
00151 
00152         DBGIO ( "[%08lx] <= %08x%08x\n",
00153                 virt_to_phys ( addr ), dwords[1], dwords[0] );
00154 
00155         __asm__ __volatile__ ( "movq (%0), %%mm0\n\t"
00156                                "movq %%mm0, (%1)\n\t"
00157                                : : "r" ( dwords ), "r" ( addr ) : "memory" );
00158 }
00159 #define linda_writeq( _linda, _ptr, _offset ) \
00160         linda_writeq ( (_linda), (_ptr)->u.dwords, (_offset) )
00161 #define linda_writeq_array8b( _linda, _ptr, _offset, _idx ) \
00162         linda_writeq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 8 ) ) )
00163 #define linda_writeq_array64k( _linda, _ptr, _offset, _idx ) \
00164         linda_writeq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 65536 ) ) )
00165 
00166 /**
00167  * Write Linda dword register
00168  *
00169  * @v linda             Linda device
00170  * @v dword             Value to write
00171  * @v offset            Register offset
00172  */
00173 static void linda_writel ( struct linda *linda, uint32_t dword,
00174                            unsigned long offset ) {
00175         writel ( dword, ( linda->regs + offset ) );
00176 }
00177 
00178 /***************************************************************************
00179  *
00180  * Link state management
00181  *
00182  ***************************************************************************
00183  */
00184 
00185 /**
00186  * Textual representation of link state
00187  *
00188  * @v link_state        Link state
00189  * @ret link_text       Link state text
00190  */
00191 static const char * linda_link_state_text ( unsigned int link_state ) {
00192         switch ( link_state ) {
00193         case LINDA_LINK_STATE_DOWN:     return "DOWN";
00194         case LINDA_LINK_STATE_INIT:     return "INIT";
00195         case LINDA_LINK_STATE_ARM:      return "ARM";
00196         case LINDA_LINK_STATE_ACTIVE:   return "ACTIVE";
00197         case LINDA_LINK_STATE_ACT_DEFER:return "ACT_DEFER";
00198         default:                        return "UNKNOWN";
00199         }
00200 }
00201 
00202 /**
00203  * Handle link state change
00204  *
00205  * @v linda             Linda device
00206  */
00207 static void linda_link_state_changed ( struct ib_device *ibdev ) {
00208         struct linda *linda = ib_get_drvdata ( ibdev );
00209         struct QIB_7220_IBCStatus ibcstatus;
00210         struct QIB_7220_EXTCtrl extctrl;
00211         unsigned int link_state;
00212         unsigned int link_width;
00213         unsigned int link_speed;
00214 
00215         /* Read link state */
00216         linda_readq ( linda, &ibcstatus, QIB_7220_IBCStatus_offset );
00217         link_state = BIT_GET ( &ibcstatus, LinkState );
00218         link_width = BIT_GET ( &ibcstatus, LinkWidthActive );
00219         link_speed = BIT_GET ( &ibcstatus, LinkSpeedActive );
00220         DBGC ( linda, "Linda %p link state %s (%s %s)\n", linda,
00221                linda_link_state_text ( link_state ),
00222                ( link_speed ? "DDR" : "SDR" ), ( link_width ? "x4" : "x1" ) );
00223 
00224         /* Set LEDs according to link state */
00225         linda_readq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
00226         BIT_SET ( &extctrl, LEDPriPortGreenOn,
00227                   ( ( link_state >= LINDA_LINK_STATE_INIT ) ? 1 : 0 ) );
00228         BIT_SET ( &extctrl, LEDPriPortYellowOn,
00229                   ( ( link_state >= LINDA_LINK_STATE_ACTIVE ) ? 1 : 0 ) );
00230         linda_writeq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
00231 
00232         /* Notify Infiniband core of link state change */
00233         ibdev->port_state = ( link_state + 1 );
00234         ibdev->link_width_active =
00235                 ( link_width ? IB_LINK_WIDTH_4X : IB_LINK_WIDTH_1X );
00236         ibdev->link_speed_active =
00237                 ( link_speed ? IB_LINK_SPEED_DDR : IB_LINK_SPEED_SDR );
00238         ib_link_state_changed ( ibdev );
00239 }
00240 
00241 /**
00242  * Wait for link state change to take effect
00243  *
00244  * @v linda             Linda device
00245  * @v new_link_state    Expected link state
00246  * @ret rc              Return status code
00247  */
00248 static int linda_link_state_check ( struct linda *linda,
00249                                     unsigned int new_link_state ) {
00250         struct QIB_7220_IBCStatus ibcstatus;
00251         unsigned int link_state;
00252         unsigned int i;
00253 
00254         for ( i = 0 ; i < LINDA_LINK_STATE_MAX_WAIT_US ; i++ ) {
00255                 linda_readq ( linda, &ibcstatus, QIB_7220_IBCStatus_offset );
00256                 link_state = BIT_GET ( &ibcstatus, LinkState );
00257                 if ( link_state == new_link_state )
00258                         return 0;
00259                 udelay ( 1 );
00260         }
00261 
00262         DBGC ( linda, "Linda %p timed out waiting for link state %s\n",
00263                linda, linda_link_state_text ( link_state ) );
00264         return -ETIMEDOUT;
00265 }
00266 
00267 /**
00268  * Set port information
00269  *
00270  * @v ibdev             Infiniband device
00271  * @v mad               Set port information MAD
00272  */
00273 static int linda_set_port_info ( struct ib_device *ibdev, union ib_mad *mad ) {
00274         struct linda *linda = ib_get_drvdata ( ibdev );
00275         struct ib_port_info *port_info = &mad->smp.smp_data.port_info;
00276         struct QIB_7220_IBCCtrl ibcctrl;
00277         unsigned int port_state;
00278         unsigned int link_state;
00279 
00280         /* Set new link state */
00281         port_state = ( port_info->link_speed_supported__port_state & 0xf );
00282         if ( port_state ) {
00283                 link_state = ( port_state - 1 );
00284                 DBGC ( linda, "Linda %p set link state to %s (%x)\n", linda,
00285                        linda_link_state_text ( link_state ), link_state );
00286                 linda_readq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
00287                 BIT_SET ( &ibcctrl, LinkCmd, link_state );
00288                 linda_writeq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
00289 
00290                 /* Wait for link state change to take effect.  Ignore
00291                  * errors; the current link state will be returned via
00292                  * the GetResponse MAD.
00293                  */
00294                 linda_link_state_check ( linda, link_state );
00295         }
00296 
00297         /* Detect and report link state change */
00298         linda_link_state_changed ( ibdev );
00299 
00300         return 0;
00301 }
00302 
00303 /**
00304  * Set partition key table
00305  *
00306  * @v ibdev             Infiniband device
00307  * @v mad               Set partition key table MAD
00308  */
00309 static int linda_set_pkey_table ( struct ib_device *ibdev __unused,
00310                                   union ib_mad *mad __unused ) {
00311         /* Nothing to do */
00312         return 0;
00313 }
00314 
00315 /***************************************************************************
00316  *
00317  * Context allocation
00318  *
00319  ***************************************************************************
00320  */
00321 
00322 /**
00323  * Map context number to QPN
00324  *
00325  * @v ctx               Context index
00326  * @ret qpn             Queue pair number
00327  */
00328 static int linda_ctx_to_qpn ( unsigned int ctx ) {
00329         /* This mapping is fixed by hardware */
00330         return ( ctx * 2 );
00331 }
00332 
00333 /**
00334  * Map QPN to context number
00335  *
00336  * @v qpn               Queue pair number
00337  * @ret ctx             Context index
00338  */
00339 static int linda_qpn_to_ctx ( unsigned int qpn ) {
00340         /* This mapping is fixed by hardware */
00341         return ( qpn / 2 );
00342 }
00343 
00344 /**
00345  * Allocate a context
00346  *
00347  * @v linda             Linda device
00348  * @ret ctx             Context index, or negative error
00349  */
00350 static int linda_alloc_ctx ( struct linda *linda ) {
00351         unsigned int ctx;
00352 
00353         for ( ctx = 0 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
00354 
00355                 if ( ! linda->used_ctx[ctx] ) {
00356                         linda->used_ctx[ctx ] = 1;
00357                         DBGC2 ( linda, "Linda %p CTX %d allocated\n",
00358                                 linda, ctx );
00359                         return ctx;
00360                 }
00361         }
00362 
00363         DBGC ( linda, "Linda %p out of available contexts\n", linda );
00364         return -ENOENT;
00365 }
00366 
00367 /**
00368  * Free a context
00369  *
00370  * @v linda             Linda device
00371  * @v ctx               Context index
00372  */
00373 static void linda_free_ctx ( struct linda *linda, unsigned int ctx ) {
00374 
00375         linda->used_ctx[ctx] = 0;
00376         DBGC2 ( linda, "Linda %p CTX %d freed\n", linda, ctx );
00377 }
00378 
00379 /***************************************************************************
00380  *
00381  * Send datapath
00382  *
00383  ***************************************************************************
00384  */
00385 
00386 /** Send buffer toggle bit
00387  *
00388  * We encode send buffers as 7 bits of send buffer index plus a single
00389  * bit which should match the "check" bit in the SendBufAvail array.
00390  */
00391 #define LINDA_SEND_BUF_TOGGLE 0x80
00392 
00393 /**
00394  * Allocate a send buffer
00395  *
00396  * @v linda             Linda device
00397  * @ret send_buf        Send buffer
00398  *
00399  * You must guarantee that a send buffer is available.  This is done
00400  * by refusing to allocate more TX WQEs in total than the number of
00401  * available send buffers.
00402  */
00403 static unsigned int linda_alloc_send_buf ( struct linda *linda ) {
00404         unsigned int send_buf;
00405 
00406         send_buf = linda->send_buf[linda->send_buf_cons];
00407         send_buf ^= LINDA_SEND_BUF_TOGGLE;
00408         linda->send_buf_cons = ( ( linda->send_buf_cons + 1 ) %
00409                                  LINDA_MAX_SEND_BUFS );
00410         return send_buf;
00411 }
00412 
00413 /**
00414  * Free a send buffer
00415  *
00416  * @v linda             Linda device
00417  * @v send_buf          Send buffer
00418  */
00419 static void linda_free_send_buf ( struct linda *linda,
00420                                   unsigned int send_buf ) {
00421         linda->send_buf[linda->send_buf_prod] = send_buf;
00422         linda->send_buf_prod = ( ( linda->send_buf_prod + 1 ) %
00423                                  LINDA_MAX_SEND_BUFS );
00424 }
00425 
00426 /**
00427  * Check to see if send buffer is in use
00428  *
00429  * @v linda             Linda device
00430  * @v send_buf          Send buffer
00431  * @ret in_use          Send buffer is in use
00432  */
00433 static int linda_send_buf_in_use ( struct linda *linda,
00434                                    unsigned int send_buf ) {
00435         unsigned int send_idx;
00436         unsigned int send_check;
00437         unsigned int inusecheck;
00438         unsigned int inuse;
00439         unsigned int check;
00440 
00441         send_idx = ( send_buf & ~LINDA_SEND_BUF_TOGGLE );
00442         send_check = ( !! ( send_buf & LINDA_SEND_BUF_TOGGLE ) );
00443         inusecheck = BIT_GET ( linda->sendbufavail, InUseCheck[send_idx] );
00444         inuse = ( !! ( inusecheck & 0x02 ) );
00445         check = ( !! ( inusecheck & 0x01 ) );
00446         return ( inuse || ( check != send_check ) );
00447 }
00448 
00449 /**
00450  * Calculate starting offset for send buffer
00451  *
00452  * @v linda             Linda device
00453  * @v send_buf          Send buffer
00454  * @ret offset          Starting offset
00455  */
00456 static unsigned long linda_send_buffer_offset ( struct linda *linda,
00457                                                 unsigned int send_buf ) {
00458         return ( linda->send_buffer_base +
00459                  ( ( send_buf & ~LINDA_SEND_BUF_TOGGLE ) *
00460                    LINDA_SEND_BUF_SIZE ) );
00461 }
00462 
00463 /**
00464  * Create send work queue
00465  *
00466  * @v linda             Linda device
00467  * @v qp                Queue pair
00468  */
00469 static int linda_create_send_wq ( struct linda *linda,
00470                                   struct ib_queue_pair *qp ) {
00471         struct ib_work_queue *wq = &qp->send;
00472         struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
00473         int rc;
00474 
00475         /* Reserve send buffers */
00476         if ( ( linda->reserved_send_bufs + qp->send.num_wqes ) >
00477              LINDA_MAX_SEND_BUFS ) {
00478                 DBGC ( linda, "Linda %p out of send buffers (have %d, used "
00479                        "%d, need %d)\n", linda, LINDA_MAX_SEND_BUFS,
00480                        linda->reserved_send_bufs, qp->send.num_wqes );
00481                 rc = -ENOBUFS;
00482                 goto err_reserve_bufs;
00483         }
00484         linda->reserved_send_bufs += qp->send.num_wqes;
00485 
00486         /* Reset work queue */
00487         linda_wq->prod = 0;
00488         linda_wq->cons = 0;
00489 
00490         /* Allocate space for send buffer uasge list */
00491         linda_wq->send_buf = zalloc ( qp->send.num_wqes *
00492                                       sizeof ( linda_wq->send_buf[0] ) );
00493         if ( ! linda_wq->send_buf ) {
00494                 rc = -ENOBUFS;
00495                 goto err_alloc_send_buf;
00496         }
00497 
00498         return 0;
00499 
00500         free ( linda_wq->send_buf );
00501  err_alloc_send_buf:
00502         linda->reserved_send_bufs -= qp->send.num_wqes;
00503  err_reserve_bufs:
00504         return rc;
00505 }
00506 
00507 /**
00508  * Destroy send work queue
00509  *
00510  * @v linda             Linda device
00511  * @v qp                Queue pair
00512  */
00513 static void linda_destroy_send_wq ( struct linda *linda,
00514                                     struct ib_queue_pair *qp ) {
00515         struct ib_work_queue *wq = &qp->send;
00516         struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
00517 
00518         free ( linda_wq->send_buf );
00519         linda->reserved_send_bufs -= qp->send.num_wqes;
00520 }
00521 
00522 /**
00523  * Initialise send datapath
00524  *
00525  * @v linda             Linda device
00526  * @ret rc              Return status code
00527  */
00528 static int linda_init_send ( struct linda *linda ) {
00529         struct QIB_7220_SendBufBase sendbufbase;
00530         struct QIB_7220_SendBufAvailAddr sendbufavailaddr;
00531         struct QIB_7220_SendCtrl sendctrl;
00532         unsigned int i;
00533         int rc;
00534 
00535         /* Retrieve SendBufBase */
00536         linda_readq ( linda, &sendbufbase, QIB_7220_SendBufBase_offset );
00537         linda->send_buffer_base = BIT_GET ( &sendbufbase,
00538                                             BaseAddr_SmallPIO );
00539         DBGC ( linda, "Linda %p send buffers at %lx\n",
00540                linda, linda->send_buffer_base );
00541 
00542         /* Initialise the send_buf[] array */
00543         for ( i = 0 ; i < LINDA_MAX_SEND_BUFS ; i++ )
00544                 linda->send_buf[i] = i;
00545 
00546         /* Allocate space for the SendBufAvail array */
00547         linda->sendbufavail = malloc_dma ( sizeof ( *linda->sendbufavail ),
00548                                            LINDA_SENDBUFAVAIL_ALIGN );
00549         if ( ! linda->sendbufavail ) {
00550                 rc = -ENOMEM;
00551                 goto err_alloc_sendbufavail;
00552         }
00553         memset ( linda->sendbufavail, 0, sizeof ( linda->sendbufavail ) );
00554 
00555         /* Program SendBufAvailAddr into the hardware */
00556         memset ( &sendbufavailaddr, 0, sizeof ( sendbufavailaddr ) );
00557         BIT_FILL_1 ( &sendbufavailaddr, SendBufAvailAddr,
00558                      ( virt_to_bus ( linda->sendbufavail ) >> 6 ) );
00559         linda_writeq ( linda, &sendbufavailaddr,
00560                        QIB_7220_SendBufAvailAddr_offset );
00561 
00562         /* Enable sending and DMA of SendBufAvail */
00563         memset ( &sendctrl, 0, sizeof ( sendctrl ) );
00564         BIT_FILL_2 ( &sendctrl,
00565                      SendBufAvailUpd, 1,
00566                      SPioEnable, 1 );
00567         linda_writeq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
00568 
00569         return 0;
00570 
00571         free_dma ( linda->sendbufavail, sizeof ( *linda->sendbufavail ) );
00572  err_alloc_sendbufavail:
00573         return rc;
00574 }
00575 
00576 /**
00577  * Shut down send datapath
00578  *
00579  * @v linda             Linda device
00580  */
00581 static void linda_fini_send ( struct linda *linda ) {
00582         struct QIB_7220_SendCtrl sendctrl;
00583 
00584         /* Disable sending and DMA of SendBufAvail */
00585         memset ( &sendctrl, 0, sizeof ( sendctrl ) );
00586         linda_writeq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
00587         mb();
00588 
00589         /* Ensure hardware has seen this disable */
00590         linda_readq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
00591 
00592         free_dma ( linda->sendbufavail, sizeof ( *linda->sendbufavail ) );
00593 }
00594 
00595 /***************************************************************************
00596  *
00597  * Receive datapath
00598  *
00599  ***************************************************************************
00600  */
00601 
00602 /**
00603  * Create receive work queue
00604  *
00605  * @v linda             Linda device
00606  * @v qp                Queue pair
00607  * @ret rc              Return status code
00608  */
00609 static int linda_create_recv_wq ( struct linda *linda,
00610                                   struct ib_queue_pair *qp ) {
00611         struct ib_work_queue *wq = &qp->recv;
00612         struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
00613         struct QIB_7220_RcvHdrAddr0 rcvhdraddr;
00614         struct QIB_7220_RcvHdrTailAddr0 rcvhdrtailaddr;
00615         struct QIB_7220_RcvHdrHead0 rcvhdrhead;
00616         struct QIB_7220_scalar rcvegrindexhead;
00617         struct QIB_7220_RcvCtrl rcvctrl;
00618         unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
00619         int rc;
00620 
00621         /* Reset context information */
00622         memset ( &linda_wq->header_prod, 0,
00623                  sizeof ( linda_wq->header_prod ) );
00624         linda_wq->header_cons = 0;
00625         linda_wq->eager_prod = 0;
00626         linda_wq->eager_cons = 0;
00627 
00628         /* Allocate receive header buffer */
00629         linda_wq->header = malloc_dma ( LINDA_RECV_HEADERS_SIZE,
00630                                         LINDA_RECV_HEADERS_ALIGN );
00631         if ( ! linda_wq->header ) {
00632                 rc = -ENOMEM;
00633                 goto err_alloc_header;
00634         }
00635 
00636         /* Enable context in hardware */
00637         memset ( &rcvhdraddr, 0, sizeof ( rcvhdraddr ) );
00638         BIT_FILL_1 ( &rcvhdraddr, RcvHdrAddr0,
00639                      ( virt_to_bus ( linda_wq->header ) >> 2 ) );
00640         linda_writeq_array8b ( linda, &rcvhdraddr,
00641                                QIB_7220_RcvHdrAddr0_offset, ctx );
00642         memset ( &rcvhdrtailaddr, 0, sizeof ( rcvhdrtailaddr ) );
00643         BIT_FILL_1 ( &rcvhdrtailaddr, RcvHdrTailAddr0,
00644                      ( virt_to_bus ( &linda_wq->header_prod ) >> 2 ) );
00645         linda_writeq_array8b ( linda, &rcvhdrtailaddr,
00646                                QIB_7220_RcvHdrTailAddr0_offset, ctx );
00647         memset ( &rcvhdrhead, 0, sizeof ( rcvhdrhead ) );
00648         BIT_FILL_1 ( &rcvhdrhead, counter, 1 );
00649         linda_writeq_array64k ( linda, &rcvhdrhead,
00650                                 QIB_7220_RcvHdrHead0_offset, ctx );
00651         memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
00652         BIT_FILL_1 ( &rcvegrindexhead, Value, 1 );
00653         linda_writeq_array64k ( linda, &rcvegrindexhead,
00654                                 QIB_7220_RcvEgrIndexHead0_offset, ctx );
00655         linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
00656         BIT_SET ( &rcvctrl, PortEnable[ctx], 1 );
00657         BIT_SET ( &rcvctrl, IntrAvail[ctx], 1 );
00658         linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
00659 
00660         DBGC ( linda, "Linda %p QPN %ld CTX %d hdrs [%lx,%lx) prod %lx\n",
00661                linda, qp->qpn, ctx, virt_to_bus ( linda_wq->header ),
00662                ( virt_to_bus ( linda_wq->header ) + LINDA_RECV_HEADERS_SIZE ),
00663                virt_to_bus ( &linda_wq->header_prod ) );
00664         return 0;
00665 
00666         free_dma ( linda_wq->header, LINDA_RECV_HEADERS_SIZE );
00667  err_alloc_header:
00668         return rc;
00669 }
00670 
00671 /**
00672  * Destroy receive work queue
00673  *
00674  * @v linda             Linda device
00675  * @v qp                Queue pair
00676  */
00677 static void linda_destroy_recv_wq ( struct linda *linda,
00678                                     struct ib_queue_pair *qp ) {
00679         struct ib_work_queue *wq = &qp->recv;
00680         struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
00681         struct QIB_7220_RcvCtrl rcvctrl;
00682         unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
00683 
00684         /* Disable context in hardware */
00685         linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
00686         BIT_SET ( &rcvctrl, PortEnable[ctx], 0 );
00687         BIT_SET ( &rcvctrl, IntrAvail[ctx], 0 );
00688         linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
00689 
00690         /* Make sure the hardware has seen that the context is disabled */
00691         linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
00692         mb();
00693 
00694         /* Free headers ring */
00695         free_dma ( linda_wq->header, LINDA_RECV_HEADERS_SIZE );
00696 
00697         /* Free context */
00698         linda_free_ctx ( linda, ctx );
00699 }
00700 
00701 /**
00702  * Initialise receive datapath
00703  *
00704  * @v linda             Linda device
00705  * @ret rc              Return status code
00706  */
00707 static int linda_init_recv ( struct linda *linda ) {
00708         struct QIB_7220_RcvCtrl rcvctrl;
00709         struct QIB_7220_scalar rcvegrbase;
00710         struct QIB_7220_scalar rcvhdrentsize;
00711         struct QIB_7220_scalar rcvhdrcnt;
00712         struct QIB_7220_RcvBTHQP rcvbthqp;
00713         unsigned int portcfg;
00714         unsigned long egrbase;
00715         unsigned int eager_array_size_0;
00716         unsigned int eager_array_size_other;
00717         unsigned int ctx;
00718 
00719         /* Select configuration based on number of contexts */
00720         switch ( LINDA_NUM_CONTEXTS ) {
00721         case 5:
00722                 portcfg = LINDA_PORTCFG_5CTX;
00723                 eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_5CTX_0;
00724                 eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_5CTX_OTHER;
00725                 break;
00726         case 9:
00727                 portcfg = LINDA_PORTCFG_9CTX;
00728                 eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_9CTX_0;
00729                 eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_9CTX_OTHER;
00730                 break;
00731         case 17:
00732                 portcfg = LINDA_PORTCFG_17CTX;
00733                 eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_17CTX_0;
00734                 eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_17CTX_OTHER;
00735                 break;
00736         default:
00737                 linker_assert ( 0, invalid_LINDA_NUM_CONTEXTS );
00738                 return -EINVAL;
00739         }
00740 
00741         /* Configure number of contexts */
00742         memset ( &rcvctrl, 0, sizeof ( rcvctrl ) );
00743         BIT_FILL_3 ( &rcvctrl,
00744                      TailUpd, 1,
00745                      PortCfg, portcfg,
00746                      RcvQPMapEnable, 1 );
00747         linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
00748 
00749         /* Configure receive header buffer sizes */
00750         memset ( &rcvhdrcnt, 0, sizeof ( rcvhdrcnt ) );
00751         BIT_FILL_1 ( &rcvhdrcnt, Value, LINDA_RECV_HEADER_COUNT );
00752         linda_writeq ( linda, &rcvhdrcnt, QIB_7220_RcvHdrCnt_offset );
00753         memset ( &rcvhdrentsize, 0, sizeof ( rcvhdrentsize ) );
00754         BIT_FILL_1 ( &rcvhdrentsize, Value, ( LINDA_RECV_HEADER_SIZE >> 2 ) );
00755         linda_writeq ( linda, &rcvhdrentsize, QIB_7220_RcvHdrEntSize_offset );
00756 
00757         /* Calculate eager array start addresses for each context */
00758         linda_readq ( linda, &rcvegrbase, QIB_7220_RcvEgrBase_offset );
00759         egrbase = BIT_GET ( &rcvegrbase, Value );
00760         linda->recv_wq[0].eager_array = egrbase;
00761         linda->recv_wq[0].eager_entries = eager_array_size_0;
00762         egrbase += ( eager_array_size_0 * sizeof ( struct QIB_7220_RcvEgr ) );
00763         for ( ctx = 1 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
00764                 linda->recv_wq[ctx].eager_array = egrbase;
00765                 linda->recv_wq[ctx].eager_entries = eager_array_size_other;
00766                 egrbase += ( eager_array_size_other *
00767                              sizeof ( struct QIB_7220_RcvEgr ) );
00768         }
00769         for ( ctx = 0 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
00770                 DBGC ( linda, "Linda %p CTX %d eager array at %lx (%d "
00771                        "entries)\n", linda, ctx,
00772                        linda->recv_wq[ctx].eager_array,
00773                        linda->recv_wq[ctx].eager_entries );
00774         }
00775 
00776         /* Set the BTH QP for Infinipath packets to an unused value */
00777         memset ( &rcvbthqp, 0, sizeof ( rcvbthqp ) );
00778         BIT_FILL_1 ( &rcvbthqp, RcvBTHQP, LINDA_QP_IDETH );
00779         linda_writeq ( linda, &rcvbthqp, QIB_7220_RcvBTHQP_offset );
00780 
00781         return 0;
00782 }
00783 
00784 /**
00785  * Shut down receive datapath
00786  *
00787  * @v linda             Linda device
00788  */
00789 static void linda_fini_recv ( struct linda *linda __unused ) {
00790         /* Nothing to do; all contexts were already disabled when the
00791          * queue pairs were destroyed
00792          */
00793 }
00794 
00795 /***************************************************************************
00796  *
00797  * Completion queue operations
00798  *
00799  ***************************************************************************
00800  */
00801 
00802 /**
00803  * Create completion queue
00804  *
00805  * @v ibdev             Infiniband device
00806  * @v cq                Completion queue
00807  * @ret rc              Return status code
00808  */
00809 static int linda_create_cq ( struct ib_device *ibdev,
00810                              struct ib_completion_queue *cq ) {
00811         struct linda *linda = ib_get_drvdata ( ibdev );
00812         static int cqn;
00813 
00814         /* The hardware has no concept of completion queues.  We
00815          * simply use the association between CQs and WQs (already
00816          * handled by the IB core) to decide which WQs to poll.
00817          *
00818          * We do set a CQN, just to avoid confusing debug messages
00819          * from the IB core.
00820          */
00821         cq->cqn = ++cqn;
00822         DBGC ( linda, "Linda %p CQN %ld created\n", linda, cq->cqn );
00823 
00824         return 0;
00825 }
00826 
00827 /**
00828  * Destroy completion queue
00829  *
00830  * @v ibdev             Infiniband device
00831  * @v cq                Completion queue
00832  */
00833 static void linda_destroy_cq ( struct ib_device *ibdev,
00834                                struct ib_completion_queue *cq ) {
00835         struct linda *linda = ib_get_drvdata ( ibdev );
00836 
00837         /* Nothing to do */
00838         DBGC ( linda, "Linda %p CQN %ld destroyed\n", linda, cq->cqn );
00839 }
00840 
00841 /***************************************************************************
00842  *
00843  * Queue pair operations
00844  *
00845  ***************************************************************************
00846  */
00847 
00848 /**
00849  * Create queue pair
00850  *
00851  * @v ibdev             Infiniband device
00852  * @v qp                Queue pair
00853  * @ret rc              Return status code
00854  */
00855 static int linda_create_qp ( struct ib_device *ibdev,
00856                              struct ib_queue_pair *qp ) {
00857         struct linda *linda = ib_get_drvdata ( ibdev );
00858         int ctx;
00859         int rc;
00860 
00861         /* Locate an available context */
00862         ctx = linda_alloc_ctx ( linda );
00863         if ( ctx < 0 ) {
00864                 rc = ctx;
00865                 goto err_alloc_ctx;
00866         }
00867 
00868         /* Set queue pair number based on context index */
00869         qp->qpn = linda_ctx_to_qpn ( ctx );
00870 
00871         /* Set work-queue private data pointers */
00872         ib_wq_set_drvdata ( &qp->send, &linda->send_wq[ctx] );
00873         ib_wq_set_drvdata ( &qp->recv, &linda->recv_wq[ctx] );
00874 
00875         /* Create receive work queue */
00876         if ( ( rc = linda_create_recv_wq ( linda, qp ) ) != 0 )
00877                 goto err_create_recv_wq;
00878 
00879         /* Create send work queue */
00880         if ( ( rc = linda_create_send_wq ( linda, qp ) ) != 0 )
00881                 goto err_create_send_wq;
00882 
00883         return 0;
00884 
00885         linda_destroy_send_wq ( linda, qp );
00886  err_create_send_wq:
00887         linda_destroy_recv_wq ( linda, qp );
00888  err_create_recv_wq:
00889         linda_free_ctx ( linda, ctx );
00890  err_alloc_ctx:
00891         return rc;
00892 }
00893 
00894 /**
00895  * Modify queue pair
00896  *
00897  * @v ibdev             Infiniband device
00898  * @v qp                Queue pair
00899  * @ret rc              Return status code
00900  */
00901 static int linda_modify_qp ( struct ib_device *ibdev,
00902                              struct ib_queue_pair *qp ) {
00903         struct linda *linda = ib_get_drvdata ( ibdev );
00904 
00905         /* Nothing to do; the hardware doesn't have a notion of queue
00906          * keys
00907          */
00908         DBGC ( linda, "Linda %p QPN %ld modified\n", linda, qp->qpn );
00909         return 0;
00910 }
00911 
00912 /**
00913  * Destroy queue pair
00914  *
00915  * @v ibdev             Infiniband device
00916  * @v qp                Queue pair
00917  */
00918 static void linda_destroy_qp ( struct ib_device *ibdev,
00919                                struct ib_queue_pair *qp ) {
00920         struct linda *linda = ib_get_drvdata ( ibdev );
00921 
00922         linda_destroy_send_wq ( linda, qp );
00923         linda_destroy_recv_wq ( linda, qp );
00924 }
00925 
00926 /***************************************************************************
00927  *
00928  * Work request operations
00929  *
00930  ***************************************************************************
00931  */
00932 
00933 /**
00934  * Post send work queue entry
00935  *
00936  * @v ibdev             Infiniband device
00937  * @v qp                Queue pair
00938  * @v av                Address vector
00939  * @v iobuf             I/O buffer
00940  * @ret rc              Return status code
00941  */
00942 static int linda_post_send ( struct ib_device *ibdev,
00943                              struct ib_queue_pair *qp,
00944                              struct ib_address_vector *av,
00945                              struct io_buffer *iobuf ) {
00946         struct linda *linda = ib_get_drvdata ( ibdev );
00947         struct ib_work_queue *wq = &qp->send;
00948         struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
00949         struct QIB_7220_SendPbc sendpbc;
00950         uint8_t header_buf[IB_MAX_HEADER_SIZE];
00951         struct io_buffer headers;
00952         unsigned int send_buf;
00953         unsigned long start_offset;
00954         unsigned long offset;
00955         size_t len;
00956         ssize_t frag_len;
00957         uint32_t *data;
00958 
00959         /* Allocate send buffer and calculate offset */
00960         send_buf = linda_alloc_send_buf ( linda );
00961         start_offset = offset = linda_send_buffer_offset ( linda, send_buf );
00962 
00963         /* Store I/O buffer and send buffer index */
00964         assert ( wq->iobufs[linda_wq->prod] == NULL );
00965         wq->iobufs[linda_wq->prod] = iobuf;
00966         linda_wq->send_buf[linda_wq->prod] = send_buf;
00967 
00968         /* Construct headers */
00969         iob_populate ( &headers, header_buf, 0, sizeof ( header_buf ) );
00970         iob_reserve ( &headers, sizeof ( header_buf ) );
00971         ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), av );
00972 
00973         /* Calculate packet length */
00974         len = ( ( sizeof ( sendpbc ) + iob_len ( &headers ) +
00975                   iob_len ( iobuf ) + 3 ) & ~3 );
00976 
00977         /* Construct send per-buffer control word */
00978         memset ( &sendpbc, 0, sizeof ( sendpbc ) );
00979         BIT_FILL_2 ( &sendpbc,
00980                      LengthP1_toibc, ( ( len >> 2 ) - 1 ),
00981                      VL15, 1 );
00982 
00983         /* Write SendPbc */
00984         DBG_DISABLE ( DBGLVL_IO );
00985         linda_writeq ( linda, &sendpbc, offset );
00986         offset += sizeof ( sendpbc );
00987 
00988         /* Write headers */
00989         for ( data = headers.data, frag_len = iob_len ( &headers ) ;
00990               frag_len > 0 ; data++, offset += 4, frag_len -= 4 ) {
00991                 linda_writel ( linda, *data, offset );
00992         }
00993 
00994         /* Write data */
00995         for ( data = iobuf->data, frag_len = iob_len ( iobuf ) ;
00996               frag_len > 0 ; data++, offset += 4, frag_len -= 4 ) {
00997                 linda_writel ( linda, *data, offset );
00998         }
00999         DBG_ENABLE ( DBGLVL_IO );
01000 
01001         assert ( ( start_offset + len ) == offset );
01002         DBGC2 ( linda, "Linda %p QPN %ld TX %d(%d) posted [%lx,%lx)\n",
01003                 linda, qp->qpn, send_buf, linda_wq->prod,
01004                 start_offset, offset );
01005 
01006         /* Increment producer counter */
01007         linda_wq->prod = ( ( linda_wq->prod + 1 ) & ( wq->num_wqes - 1 ) );
01008 
01009         return 0;
01010 }
01011 
01012 /**
01013  * Complete send work queue entry
01014  *
01015  * @v ibdev             Infiniband device
01016  * @v qp                Queue pair
01017  * @v wqe_idx           Work queue entry index
01018  */
01019 static void linda_complete_send ( struct ib_device *ibdev,
01020                                   struct ib_queue_pair *qp,
01021                                   unsigned int wqe_idx ) {
01022         struct linda *linda = ib_get_drvdata ( ibdev );
01023         struct ib_work_queue *wq = &qp->send;
01024         struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
01025         struct io_buffer *iobuf;
01026         unsigned int send_buf;
01027 
01028         /* Parse completion */
01029         send_buf = linda_wq->send_buf[wqe_idx];
01030         DBGC2 ( linda, "Linda %p QPN %ld TX %d(%d) complete\n",
01031                 linda, qp->qpn, send_buf, wqe_idx );
01032 
01033         /* Complete work queue entry */
01034         iobuf = wq->iobufs[wqe_idx];
01035         assert ( iobuf != NULL );
01036         ib_complete_send ( ibdev, qp, iobuf, 0 );
01037         wq->iobufs[wqe_idx] = NULL;
01038 
01039         /* Free send buffer */
01040         linda_free_send_buf ( linda, send_buf );
01041 }
01042 
01043 /**
01044  * Poll send work queue
01045  *
01046  * @v ibdev             Infiniband device
01047  * @v qp                Queue pair
01048  */
01049 static void linda_poll_send_wq ( struct ib_device *ibdev,
01050                                  struct ib_queue_pair *qp ) {
01051         struct linda *linda = ib_get_drvdata ( ibdev );
01052         struct ib_work_queue *wq = &qp->send;
01053         struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
01054         unsigned int send_buf;
01055 
01056         /* Look for completions */
01057         while ( wq->fill ) {
01058 
01059                 /* Check to see if send buffer has completed */
01060                 send_buf = linda_wq->send_buf[linda_wq->cons];
01061                 if ( linda_send_buf_in_use ( linda, send_buf ) )
01062                         break;
01063 
01064                 /* Complete this buffer */
01065                 linda_complete_send ( ibdev, qp, linda_wq->cons );
01066 
01067                 /* Increment consumer counter */
01068                 linda_wq->cons = ( ( linda_wq->cons + 1 ) &
01069                                    ( wq->num_wqes - 1 ) );
01070         }
01071 }
01072 
01073 /**
01074  * Post receive work queue entry
01075  *
01076  * @v ibdev             Infiniband device
01077  * @v qp                Queue pair
01078  * @v iobuf             I/O buffer
01079  * @ret rc              Return status code
01080  */
01081 static int linda_post_recv ( struct ib_device *ibdev,
01082                              struct ib_queue_pair *qp,
01083                              struct io_buffer *iobuf ) {
01084         struct linda *linda = ib_get_drvdata ( ibdev );
01085         struct ib_work_queue *wq = &qp->recv;
01086         struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
01087         struct QIB_7220_RcvEgr rcvegr;
01088         struct QIB_7220_scalar rcvegrindexhead;
01089         unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
01090         physaddr_t addr;
01091         size_t len;
01092         unsigned int wqe_idx;
01093         unsigned int bufsize;
01094 
01095         /* Sanity checks */
01096         addr = virt_to_bus ( iobuf->data );
01097         len = iob_tailroom ( iobuf );
01098         if ( addr & ( LINDA_EAGER_BUFFER_ALIGN - 1 ) ) {
01099                 DBGC ( linda, "Linda %p QPN %ld misaligned RX buffer "
01100                        "(%08lx)\n", linda, qp->qpn, addr );
01101                 return -EINVAL;
01102         }
01103         if ( len != LINDA_RECV_PAYLOAD_SIZE ) {
01104                 DBGC ( linda, "Linda %p QPN %ld wrong RX buffer size (%zd)\n",
01105                        linda, qp->qpn, len );
01106                 return -EINVAL;
01107         }
01108 
01109         /* Calculate eager producer index and WQE index */
01110         wqe_idx = ( linda_wq->eager_prod & ( wq->num_wqes - 1 ) );
01111         assert ( wq->iobufs[wqe_idx] == NULL );
01112 
01113         /* Store I/O buffer */
01114         wq->iobufs[wqe_idx] = iobuf;
01115 
01116         /* Calculate buffer size */
01117         switch ( LINDA_RECV_PAYLOAD_SIZE ) {
01118         case 2048:  bufsize = LINDA_EAGER_BUFFER_2K;  break;
01119         case 4096:  bufsize = LINDA_EAGER_BUFFER_4K;  break;
01120         case 8192:  bufsize = LINDA_EAGER_BUFFER_8K;  break;
01121         case 16384: bufsize = LINDA_EAGER_BUFFER_16K; break;
01122         case 32768: bufsize = LINDA_EAGER_BUFFER_32K; break;
01123         case 65536: bufsize = LINDA_EAGER_BUFFER_64K; break;
01124         default:    linker_assert ( 0, invalid_rx_payload_size );
01125                     bufsize = LINDA_EAGER_BUFFER_NONE;
01126         }
01127 
01128         /* Post eager buffer */
01129         memset ( &rcvegr, 0, sizeof ( rcvegr ) );
01130         BIT_FILL_2 ( &rcvegr,
01131                      Addr, ( addr >> 11 ),
01132                      BufSize, bufsize );
01133         linda_writeq_array8b ( linda, &rcvegr,
01134                                linda_wq->eager_array, linda_wq->eager_prod );
01135         DBGC2 ( linda, "Linda %p QPN %ld RX egr %d(%d) posted [%lx,%lx)\n",
01136                 linda, qp->qpn, linda_wq->eager_prod, wqe_idx,
01137                 addr, ( addr + len ) );
01138 
01139         /* Increment producer index */
01140         linda_wq->eager_prod = ( ( linda_wq->eager_prod + 1 ) &
01141                                  ( linda_wq->eager_entries - 1 ) );
01142 
01143         /* Update head index */
01144         memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
01145         BIT_FILL_1 ( &rcvegrindexhead,
01146                      Value, ( ( linda_wq->eager_prod + 1 ) &
01147                               ( linda_wq->eager_entries - 1 ) ) );
01148         linda_writeq_array64k ( linda, &rcvegrindexhead,
01149                                 QIB_7220_RcvEgrIndexHead0_offset, ctx );
01150 
01151         return 0;
01152 }
01153 
01154 /**
01155  * Complete receive work queue entry
01156  *
01157  * @v ibdev             Infiniband device
01158  * @v qp                Queue pair
01159  * @v header_offs       Header offset
01160  */
01161 static void linda_complete_recv ( struct ib_device *ibdev,
01162                                   struct ib_queue_pair *qp,
01163                                   unsigned int header_offs ) {
01164         struct linda *linda = ib_get_drvdata ( ibdev );
01165         struct ib_work_queue *wq = &qp->recv;
01166         struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
01167         struct QIB_7220_RcvHdrFlags *rcvhdrflags;
01168         struct QIB_7220_RcvEgr rcvegr;
01169         struct io_buffer headers;
01170         struct io_buffer *iobuf;
01171         struct ib_queue_pair *intended_qp;
01172         struct ib_address_vector av;
01173         unsigned int rcvtype;
01174         unsigned int pktlen;
01175         unsigned int egrindex;
01176         unsigned int useegrbfr;
01177         unsigned int iberr, mkerr, tiderr, khdrerr, mtuerr;
01178         unsigned int lenerr, parityerr, vcrcerr, icrcerr;
01179         unsigned int err;
01180         unsigned int hdrqoffset;
01181         unsigned int header_len;
01182         unsigned int padded_payload_len;
01183         unsigned int wqe_idx;
01184         size_t payload_len;
01185         int qp0;
01186         int rc;
01187 
01188         /* RcvHdrFlags are at the end of the header entry */
01189         rcvhdrflags = ( linda_wq->header + header_offs +
01190                         LINDA_RECV_HEADER_SIZE - sizeof ( *rcvhdrflags ) );
01191         rcvtype = BIT_GET ( rcvhdrflags, RcvType );
01192         pktlen = ( BIT_GET ( rcvhdrflags, PktLen ) << 2 );
01193         egrindex = BIT_GET ( rcvhdrflags, EgrIndex );
01194         useegrbfr = BIT_GET ( rcvhdrflags, UseEgrBfr );
01195         hdrqoffset = ( BIT_GET ( rcvhdrflags, HdrqOffset ) << 2 );
01196         iberr = BIT_GET ( rcvhdrflags, IBErr );
01197         mkerr = BIT_GET ( rcvhdrflags, MKErr );
01198         tiderr = BIT_GET ( rcvhdrflags, TIDErr );
01199         khdrerr = BIT_GET ( rcvhdrflags, KHdrErr );
01200         mtuerr = BIT_GET ( rcvhdrflags, MTUErr );
01201         lenerr = BIT_GET ( rcvhdrflags, LenErr );
01202         parityerr = BIT_GET ( rcvhdrflags, ParityErr );
01203         vcrcerr = BIT_GET ( rcvhdrflags, VCRCErr );
01204         icrcerr = BIT_GET ( rcvhdrflags, ICRCErr );
01205         header_len = ( LINDA_RECV_HEADER_SIZE - hdrqoffset -
01206                        sizeof ( *rcvhdrflags ) );
01207         padded_payload_len = ( pktlen - header_len - 4 /* ICRC */ );
01208         err = ( iberr | mkerr | tiderr | khdrerr | mtuerr |
01209                 lenerr | parityerr | vcrcerr | icrcerr );
01210         /* IB header is placed immediately before RcvHdrFlags */
01211         iob_populate ( &headers, ( ( ( void * ) rcvhdrflags ) - header_len ),
01212                        header_len, header_len );
01213 
01214         /* Dump diagnostic information */
01215         if ( err || ( ! useegrbfr ) ) {
01216                 DBGC ( linda, "Linda %p QPN %ld RX egr %d%s hdr %d type %d "
01217                        "len %d(%d+%d+4)%s%s%s%s%s%s%s%s%s%s%s\n", linda,
01218                        qp->qpn, egrindex, ( useegrbfr ? "" : "(unused)" ),
01219                        ( header_offs / LINDA_RECV_HEADER_SIZE ), rcvtype,
01220                        pktlen, header_len, padded_payload_len,
01221                        ( err ? " [Err" : "" ), ( iberr ? " IB" : "" ),
01222                        ( mkerr ? " MK" : "" ), ( tiderr ? " TID" : "" ),
01223                        ( khdrerr ? " KHdr" : "" ), ( mtuerr ? " MTU" : "" ),
01224                        ( lenerr ? " Len" : "" ), ( parityerr ? " Parity" : ""),
01225                        ( vcrcerr ? " VCRC" : "" ), ( icrcerr ? " ICRC" : "" ),
01226                        ( err ? "]" : "" ) );
01227         } else {
01228                 DBGC2 ( linda, "Linda %p QPN %ld RX egr %d hdr %d type %d "
01229                         "len %d(%d+%d+4)\n", linda, qp->qpn, egrindex,
01230                         ( header_offs / LINDA_RECV_HEADER_SIZE ), rcvtype,
01231                         pktlen, header_len, padded_payload_len );
01232         }
01233         DBGCP_HDA ( linda, hdrqoffset, headers.data,
01234                     ( header_len + sizeof ( *rcvhdrflags ) ) );
01235 
01236         /* Parse header to generate address vector */
01237         qp0 = ( qp->qpn == 0 );
01238         intended_qp = NULL;
01239         if ( ( rc = ib_pull ( ibdev, &headers, ( qp0 ? &intended_qp : NULL ),
01240                               &payload_len, &av ) ) != 0 ) {
01241                 DBGC ( linda, "Linda %p could not parse headers: %s\n",
01242                        linda, strerror ( rc ) );
01243                 err = 1;
01244         }
01245         if ( ! intended_qp )
01246                 intended_qp = qp;
01247 
01248         /* Complete this buffer and any skipped buffers.  Note that
01249          * when the hardware runs out of buffers, it will repeatedly
01250          * report the same buffer (the tail) as a TID error, and that
01251          * it also has a habit of sometimes skipping over several
01252          * buffers at once.
01253          */
01254         while ( 1 ) {
01255 
01256                 /* If we have caught up to the producer counter, stop.
01257                  * This will happen when the hardware first runs out
01258                  * of buffers and starts reporting TID errors against
01259                  * the eager buffer it wants to use next.
01260                  */
01261                 if ( linda_wq->eager_cons == linda_wq->eager_prod )
01262                         break;
01263 
01264                 /* If we have caught up to where we should be after
01265                  * completing this egrindex, stop.  We phrase the test
01266                  * this way to avoid completing the entire ring when
01267                  * we receive the same egrindex twice in a row.
01268                  */
01269                 if ( ( linda_wq->eager_cons ==
01270                        ( ( egrindex + 1 ) & ( linda_wq->eager_entries - 1 ) )))
01271                         break;
01272 
01273                 /* Identify work queue entry and corresponding I/O
01274                  * buffer.
01275                  */
01276                 wqe_idx = ( linda_wq->eager_cons & ( wq->num_wqes - 1 ) );
01277                 iobuf = wq->iobufs[wqe_idx];
01278                 assert ( iobuf != NULL );
01279                 wq->iobufs[wqe_idx] = NULL;
01280 
01281                 /* Complete the eager buffer */
01282                 if ( linda_wq->eager_cons == egrindex ) {
01283                         /* Completing the eager buffer described in
01284                          * this header entry.
01285                          */
01286                         iob_put ( iobuf, payload_len );
01287                         rc = ( err ? -EIO : ( useegrbfr ? 0 : -ECANCELED ) );
01288                         /* Redirect to target QP if necessary */
01289                         if ( qp != intended_qp ) {
01290                                 DBGC ( linda, "Linda %p redirecting QPN %ld "
01291                                        "=> %ld\n",
01292                                        linda, qp->qpn, intended_qp->qpn );
01293                                 /* Compensate for incorrect fill levels */
01294                                 qp->recv.fill--;
01295                                 intended_qp->recv.fill++;
01296                         }
01297                         ib_complete_recv ( ibdev, intended_qp, &av, iobuf, rc);
01298                 } else {
01299                         /* Completing on a skipped-over eager buffer */
01300                         ib_complete_recv ( ibdev, qp, &av, iobuf, -ECANCELED );
01301                 }
01302 
01303                 /* Clear eager buffer */
01304                 memset ( &rcvegr, 0, sizeof ( rcvegr ) );
01305                 linda_writeq_array8b ( linda, &rcvegr, linda_wq->eager_array,
01306                                        linda_wq->eager_cons );
01307 
01308                 /* Increment consumer index */
01309                 linda_wq->eager_cons = ( ( linda_wq->eager_cons + 1 ) &
01310                                          ( linda_wq->eager_entries - 1 ) );
01311         }
01312 }
01313 
01314 /**
01315  * Poll receive work queue
01316  *
01317  * @v ibdev             Infiniband device
01318  * @v qp                Queue pair
01319  */
01320 static void linda_poll_recv_wq ( struct ib_device *ibdev,
01321                                  struct ib_queue_pair *qp ) {
01322         struct linda *linda = ib_get_drvdata ( ibdev );
01323         struct ib_work_queue *wq = &qp->recv;
01324         struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
01325         struct QIB_7220_RcvHdrHead0 rcvhdrhead;
01326         unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
01327         unsigned int header_prod;
01328 
01329         /* Check for received packets */
01330         header_prod = ( BIT_GET ( &linda_wq->header_prod, Value ) << 2 );
01331         if ( header_prod == linda_wq->header_cons )
01332                 return;
01333 
01334         /* Process all received packets */
01335         while ( linda_wq->header_cons != header_prod ) {
01336 
01337                 /* Complete the receive */
01338                 linda_complete_recv ( ibdev, qp, linda_wq->header_cons );
01339 
01340                 /* Increment the consumer offset */
01341                 linda_wq->header_cons += LINDA_RECV_HEADER_SIZE;
01342                 linda_wq->header_cons %= LINDA_RECV_HEADERS_SIZE;
01343         }
01344 
01345         /* Update consumer offset */
01346         memset ( &rcvhdrhead, 0, sizeof ( rcvhdrhead ) );
01347         BIT_FILL_2 ( &rcvhdrhead,
01348                      RcvHeadPointer, ( linda_wq->header_cons >> 2 ),
01349                      counter, 1 );
01350         linda_writeq_array64k ( linda, &rcvhdrhead,
01351                                 QIB_7220_RcvHdrHead0_offset, ctx );
01352 }
01353 
01354 /**
01355  * Poll completion queue
01356  *
01357  * @v ibdev             Infiniband device
01358  * @v cq                Completion queue
01359  */
01360 static void linda_poll_cq ( struct ib_device *ibdev,
01361                             struct ib_completion_queue *cq ) {
01362         struct ib_work_queue *wq;
01363 
01364         /* Poll associated send and receive queues */
01365         list_for_each_entry ( wq, &cq->work_queues, list ) {
01366                 if ( wq->is_send ) {
01367                         linda_poll_send_wq ( ibdev, wq->qp );
01368                 } else {
01369                         linda_poll_recv_wq ( ibdev, wq->qp );
01370                 }
01371         }
01372 }
01373 
01374 /***************************************************************************
01375  *
01376  * Event queues
01377  *
01378  ***************************************************************************
01379  */
01380 
01381 /**
01382  * Poll event queue
01383  *
01384  * @v ibdev             Infiniband device
01385  */
01386 static void linda_poll_eq ( struct ib_device *ibdev ) {
01387         struct linda *linda = ib_get_drvdata ( ibdev );
01388         struct QIB_7220_ErrStatus errstatus;
01389         struct QIB_7220_ErrClear errclear;
01390 
01391         /* Check for link status changes */
01392         DBG_DISABLE ( DBGLVL_IO );
01393         linda_readq ( linda, &errstatus, QIB_7220_ErrStatus_offset );
01394         DBG_ENABLE ( DBGLVL_IO );
01395         if ( BIT_GET ( &errstatus, IBStatusChanged ) ) {
01396                 linda_link_state_changed ( ibdev );
01397                 memset ( &errclear, 0, sizeof ( errclear ) );
01398                 BIT_FILL_1 ( &errclear, IBStatusChangedClear, 1 );
01399                 linda_writeq ( linda, &errclear, QIB_7220_ErrClear_offset );
01400         }
01401 }
01402 
01403 /***************************************************************************
01404  *
01405  * Infiniband link-layer operations
01406  *
01407  ***************************************************************************
01408  */
01409 
01410 /**
01411  * Initialise Infiniband link
01412  *
01413  * @v ibdev             Infiniband device
01414  * @ret rc              Return status code
01415  */
01416 static int linda_open ( struct ib_device *ibdev ) {
01417         struct linda *linda = ib_get_drvdata ( ibdev );
01418         struct QIB_7220_Control control;
01419 
01420         /* Disable link */
01421         linda_readq ( linda, &control, QIB_7220_Control_offset );
01422         BIT_SET ( &control, LinkEn, 1 );
01423         linda_writeq ( linda, &control, QIB_7220_Control_offset );
01424         return 0;
01425 }
01426 
01427 /**
01428  * Close Infiniband link
01429  *
01430  * @v ibdev             Infiniband device
01431  */
01432 static void linda_close ( struct ib_device *ibdev ) {
01433         struct linda *linda = ib_get_drvdata ( ibdev );
01434         struct QIB_7220_Control control;
01435 
01436         /* Disable link */
01437         linda_readq ( linda, &control, QIB_7220_Control_offset );
01438         BIT_SET ( &control, LinkEn, 0 );
01439         linda_writeq ( linda, &control, QIB_7220_Control_offset );
01440 }
01441 
01442 /***************************************************************************
01443  *
01444  * Multicast group operations
01445  *
01446  ***************************************************************************
01447  */
01448 
01449 /**
01450  * Attach to multicast group
01451  *
01452  * @v ibdev             Infiniband device
01453  * @v qp                Queue pair
01454  * @v gid               Multicast GID
01455  * @ret rc              Return status code
01456  */
01457 static int linda_mcast_attach ( struct ib_device *ibdev,
01458                                 struct ib_queue_pair *qp,
01459                                 struct ib_gid *gid ) {
01460         struct linda *linda = ib_get_drvdata ( ibdev );
01461 
01462         ( void ) linda;
01463         ( void ) qp;
01464         ( void ) gid;
01465         return 0;
01466 }
01467 
01468 /**
01469  * Detach from multicast group
01470  *
01471  * @v ibdev             Infiniband device
01472  * @v qp                Queue pair
01473  * @v gid               Multicast GID
01474  */
01475 static void linda_mcast_detach ( struct ib_device *ibdev,
01476                                  struct ib_queue_pair *qp,
01477                                  struct ib_gid *gid ) {
01478         struct linda *linda = ib_get_drvdata ( ibdev );
01479 
01480         ( void ) linda;
01481         ( void ) qp;
01482         ( void ) gid;
01483 }
01484 
01485 /** Linda Infiniband operations */
01486 static struct ib_device_operations linda_ib_operations = {
01487         .create_cq      = linda_create_cq,
01488         .destroy_cq     = linda_destroy_cq,
01489         .create_qp      = linda_create_qp,
01490         .modify_qp      = linda_modify_qp,
01491         .destroy_qp     = linda_destroy_qp,
01492         .post_send      = linda_post_send,
01493         .post_recv      = linda_post_recv,
01494         .poll_cq        = linda_poll_cq,
01495         .poll_eq        = linda_poll_eq,
01496         .open           = linda_open,
01497         .close          = linda_close,
01498         .mcast_attach   = linda_mcast_attach,
01499         .mcast_detach   = linda_mcast_detach,
01500         .set_port_info  = linda_set_port_info,
01501         .set_pkey_table = linda_set_pkey_table,
01502 };
01503 
01504 /***************************************************************************
01505  *
01506  * I2C bus operations
01507  *
01508  ***************************************************************************
01509  */
01510 
01511 /** Linda I2C bit to GPIO mappings */
01512 static unsigned int linda_i2c_bits[] = {
01513         [I2C_BIT_SCL] = ( 1 << LINDA_GPIO_SCL ),
01514         [I2C_BIT_SDA] = ( 1 << LINDA_GPIO_SDA ),
01515 };
01516 
01517 /**
01518  * Read Linda I2C line status
01519  *
01520  * @v basher            Bit-bashing interface
01521  * @v bit_id            Bit number
01522  * @ret zero            Input is a logic 0
01523  * @ret non-zero        Input is a logic 1
01524  */
01525 static int linda_i2c_read_bit ( struct bit_basher *basher,
01526                                 unsigned int bit_id ) {
01527         struct linda *linda =
01528                 container_of ( basher, struct linda, i2c.basher );
01529         struct QIB_7220_EXTStatus extstatus;
01530         unsigned int status;
01531 
01532         DBG_DISABLE ( DBGLVL_IO );
01533 
01534         linda_readq ( linda, &extstatus, QIB_7220_EXTStatus_offset );
01535         status = ( BIT_GET ( &extstatus, GPIOIn ) & linda_i2c_bits[bit_id] );
01536 
01537         DBG_ENABLE ( DBGLVL_IO );
01538 
01539         return status;
01540 }
01541 
01542 /**
01543  * Write Linda I2C line status
01544  *
01545  * @v basher            Bit-bashing interface
01546  * @v bit_id            Bit number
01547  * @v data              Value to write
01548  */
01549 static void linda_i2c_write_bit ( struct bit_basher *basher,
01550                                   unsigned int bit_id, unsigned long data ) {
01551         struct linda *linda =
01552                 container_of ( basher, struct linda, i2c.basher );
01553         struct QIB_7220_EXTCtrl extctrl;
01554         struct QIB_7220_GPIO gpioout;
01555         unsigned int bit = linda_i2c_bits[bit_id];
01556         unsigned int outputs = 0;
01557         unsigned int output_enables = 0;
01558 
01559         DBG_DISABLE ( DBGLVL_IO );
01560 
01561         /* Read current GPIO mask and outputs */
01562         linda_readq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
01563         linda_readq ( linda, &gpioout, QIB_7220_GPIOOut_offset );
01564 
01565         /* Update outputs and output enables.  I2C lines are tied
01566          * high, so we always set the output to 0 and use the output
01567          * enable to control the line.
01568          */
01569         output_enables = BIT_GET ( &extctrl, GPIOOe );
01570         output_enables = ( ( output_enables & ~bit ) | ( ~data & bit ) );
01571         outputs = BIT_GET ( &gpioout, GPIO );
01572         outputs = ( outputs & ~bit );
01573         BIT_SET ( &extctrl, GPIOOe, output_enables );
01574         BIT_SET ( &gpioout, GPIO, outputs );
01575 
01576         /* Write the output enable first; that way we avoid logic
01577          * hazards.
01578          */
01579         linda_writeq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
01580         linda_writeq ( linda, &gpioout, QIB_7220_GPIOOut_offset );
01581         mb();
01582 
01583         DBG_ENABLE ( DBGLVL_IO );
01584 }
01585 
01586 /** Linda I2C bit-bashing interface operations */
01587 static struct bit_basher_operations linda_i2c_basher_ops = {
01588         .read   = linda_i2c_read_bit,
01589         .write  = linda_i2c_write_bit,
01590 };
01591 
01592 /**
01593  * Initialise Linda I2C subsystem
01594  *
01595  * @v linda             Linda device
01596  * @ret rc              Return status code
01597  */
01598 static int linda_init_i2c ( struct linda *linda ) {
01599         static int try_eeprom_address[] = { 0x51, 0x50 };
01600         unsigned int i;
01601         int rc;
01602 
01603         /* Initialise bus */
01604         if ( ( rc = init_i2c_bit_basher ( &linda->i2c,
01605                                           &linda_i2c_basher_ops ) ) != 0 ) {
01606                 DBGC ( linda, "Linda %p could not initialise I2C bus: %s\n",
01607                        linda, strerror ( rc ) );
01608                 return rc;
01609         }
01610 
01611         /* Probe for devices */
01612         for ( i = 0 ; i < ( sizeof ( try_eeprom_address ) /
01613                             sizeof ( try_eeprom_address[0] ) ) ; i++ ) {
01614                 init_i2c_eeprom ( &linda->eeprom, try_eeprom_address[i] );
01615                 if ( ( rc = i2c_check_presence ( &linda->i2c.i2c,
01616                                                  &linda->eeprom ) ) == 0 ) {
01617                         DBGC2 ( linda, "Linda %p found EEPROM at %02x\n",
01618                                 linda, try_eeprom_address[i] );
01619                         return 0;
01620                 }
01621         }
01622 
01623         DBGC ( linda, "Linda %p could not find EEPROM\n", linda );
01624         return -ENODEV;
01625 }
01626 
01627 /**
01628  * Read EEPROM parameters
01629  *
01630  * @v linda             Linda device
01631  * @v guid              GUID to fill in
01632  * @ret rc              Return status code
01633  */
01634 static int linda_read_eeprom ( struct linda *linda,
01635                                struct ib_gid_half *guid ) {
01636         struct i2c_interface *i2c = &linda->i2c.i2c;
01637         int rc;
01638 
01639         /* Read GUID */
01640         if ( ( rc = i2c->read ( i2c, &linda->eeprom, LINDA_EEPROM_GUID_OFFSET,
01641                                 guid->u.bytes, sizeof ( *guid ) ) ) != 0 ) {
01642                 DBGC ( linda, "Linda %p could not read GUID: %s\n",
01643                        linda, strerror ( rc ) );
01644                 return rc;
01645         }
01646         DBGC2 ( linda, "Linda %p has GUID %02x:%02x:%02x:%02x:%02x:%02x:"
01647                 "%02x:%02x\n", linda, guid->u.bytes[0], guid->u.bytes[1],
01648                 guid->u.bytes[2], guid->u.bytes[3], guid->u.bytes[4],
01649                 guid->u.bytes[5], guid->u.bytes[6], guid->u.bytes[7] );
01650 
01651         /* Read serial number (debug only) */
01652         if ( DBG_LOG ) {
01653                 uint8_t serial[LINDA_EEPROM_SERIAL_SIZE + 1];
01654 
01655                 serial[ sizeof ( serial ) - 1 ] = '\0';
01656                 if ( ( rc = i2c->read ( i2c, &linda->eeprom,
01657                                         LINDA_EEPROM_SERIAL_OFFSET, serial,
01658                                         ( sizeof ( serial ) - 1 ) ) ) != 0 ) {
01659                         DBGC ( linda, "Linda %p could not read serial: %s\n",
01660                                linda, strerror ( rc ) );
01661                         return rc;
01662                 }
01663                 DBGC2 ( linda, "Linda %p has serial number \"%s\"\n",
01664                         linda, serial );
01665         }
01666 
01667         return 0;
01668 }
01669 
01670 /***************************************************************************
01671  *
01672  * External parallel bus access
01673  *
01674  ***************************************************************************
01675  */
01676 
01677 /**
01678  * Request ownership of the IB external parallel bus
01679  *
01680  * @v linda             Linda device
01681  * @ret rc              Return status code
01682  */
01683 static int linda_ib_epb_request ( struct linda *linda ) {
01684         struct QIB_7220_ibsd_epb_access_ctrl access;
01685         unsigned int i;
01686 
01687         /* Request ownership */
01688         memset ( &access, 0, sizeof ( access ) );
01689         BIT_FILL_1 ( &access, sw_ib_epb_req, 1 );
01690         linda_writeq ( linda, &access, QIB_7220_ibsd_epb_access_ctrl_offset );
01691 
01692         /* Wait for ownership to be granted */
01693         for ( i = 0 ; i < LINDA_EPB_REQUEST_MAX_WAIT_US ; i++ ) {
01694                 linda_readq ( linda, &access,
01695                               QIB_7220_ibsd_epb_access_ctrl_offset );
01696                 if ( BIT_GET ( &access, sw_ib_epb_req_granted ) )
01697                         return 0;
01698                 udelay ( 1 );
01699         }
01700 
01701         DBGC ( linda, "Linda %p timed out waiting for IB EPB request\n",
01702                linda );
01703         return -ETIMEDOUT;
01704 }
01705 
01706 /**
01707  * Wait for IB external parallel bus transaction to complete
01708  *
01709  * @v linda             Linda device
01710  * @v xact              Buffer to hold transaction result
01711  * @ret rc              Return status code
01712  */
01713 static int linda_ib_epb_wait ( struct linda *linda,
01714                             struct QIB_7220_ibsd_epb_transaction_reg *xact ) {
01715         unsigned int i;
01716 
01717         /* Discard first read to allow for signals crossing clock domains */
01718         linda_readq ( linda, xact, QIB_7220_ibsd_epb_transaction_reg_offset );
01719 
01720         for ( i = 0 ; i < LINDA_EPB_XACT_MAX_WAIT_US ; i++ ) {
01721                 linda_readq ( linda, xact,
01722                               QIB_7220_ibsd_epb_transaction_reg_offset );
01723                 if ( BIT_GET ( xact, ib_epb_rdy ) ) {
01724                         if ( BIT_GET ( xact, ib_epb_req_error ) ) {
01725                                 DBGC ( linda, "Linda %p EPB transaction "
01726                                        "failed\n", linda );
01727                                 return -EIO;
01728                         } else {
01729                                 return 0;
01730                         }
01731                 }
01732                 udelay ( 1 );
01733         }
01734 
01735         DBGC ( linda, "Linda %p timed out waiting for IB EPB transaction\n",
01736                linda );
01737         return -ETIMEDOUT;
01738 }
01739 
01740 /**
01741  * Release ownership of the IB external parallel bus
01742  *
01743  * @v linda             Linda device
01744  */
01745 static void linda_ib_epb_release ( struct linda *linda ) {
01746         struct QIB_7220_ibsd_epb_access_ctrl access;
01747 
01748         memset ( &access, 0, sizeof ( access ) );
01749         BIT_FILL_1 ( &access, sw_ib_epb_req, 0 );
01750         linda_writeq ( linda, &access, QIB_7220_ibsd_epb_access_ctrl_offset );
01751 }
01752 
01753 /**
01754  * Read data via IB external parallel bus
01755  *
01756  * @v linda             Linda device
01757  * @v location          EPB location
01758  * @ret data            Data read, or negative error
01759  *
01760  * You must have already acquired ownership of the IB external
01761  * parallel bus.
01762  */
01763 static int linda_ib_epb_read ( struct linda *linda, unsigned int location ) {
01764         struct QIB_7220_ibsd_epb_transaction_reg xact;
01765         unsigned int data;
01766         int rc;
01767 
01768         /* Ensure no transaction is currently in progress */
01769         if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
01770                 return rc;
01771 
01772         /* Process data */
01773         memset ( &xact, 0, sizeof ( xact ) );
01774         BIT_FILL_3 ( &xact,
01775                      ib_epb_address, LINDA_EPB_LOC_ADDRESS ( location ),
01776                      ib_epb_read_write, LINDA_EPB_READ,
01777                      ib_epb_cs, LINDA_EPB_LOC_CS ( location ) );
01778         linda_writeq ( linda, &xact,
01779                        QIB_7220_ibsd_epb_transaction_reg_offset );
01780 
01781         /* Wait for transaction to complete */
01782         if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
01783                 return rc;
01784 
01785         data = BIT_GET ( &xact, ib_epb_data );
01786         return data;
01787 }
01788 
01789 /**
01790  * Write data via IB external parallel bus
01791  *
01792  * @v linda             Linda device
01793  * @v location          EPB location
01794  * @v data              Data to write
01795  * @ret rc              Return status code
01796  *
01797  * You must have already acquired ownership of the IB external
01798  * parallel bus.
01799  */
01800 static int linda_ib_epb_write ( struct linda *linda, unsigned int location,
01801                                 unsigned int data ) {
01802         struct QIB_7220_ibsd_epb_transaction_reg xact;
01803         int rc;
01804 
01805         /* Ensure no transaction is currently in progress */
01806         if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
01807                 return rc;
01808 
01809         /* Process data */
01810         memset ( &xact, 0, sizeof ( xact ) );
01811         BIT_FILL_4 ( &xact,
01812                      ib_epb_data, data,
01813                      ib_epb_address, LINDA_EPB_LOC_ADDRESS ( location ),
01814                      ib_epb_read_write, LINDA_EPB_WRITE,
01815                      ib_epb_cs, LINDA_EPB_LOC_CS ( location ) );
01816         linda_writeq ( linda, &xact,
01817                        QIB_7220_ibsd_epb_transaction_reg_offset );
01818 
01819         /* Wait for transaction to complete */
01820         if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
01821                 return rc;
01822 
01823         return 0;
01824 }
01825 
01826 /**
01827  * Read/modify/write EPB register
01828  *
01829  * @v linda             Linda device
01830  * @v cs                Chip select
01831  * @v channel           Channel
01832  * @v element           Element
01833  * @v reg               Register
01834  * @v value             Value to set
01835  * @v mask              Mask to apply to old value
01836  * @ret rc              Return status code
01837  */
01838 static int linda_ib_epb_mod_reg ( struct linda *linda, unsigned int cs,
01839                                   unsigned int channel, unsigned int element,
01840                                   unsigned int reg, unsigned int value,
01841                                   unsigned int mask ) {
01842         unsigned int location;
01843         int old_value;
01844         int rc;
01845 
01846         DBG_DISABLE ( DBGLVL_IO );
01847 
01848         /* Sanity check */
01849         assert ( ( value & mask ) == value );
01850 
01851         /* Acquire bus ownership */
01852         if ( ( rc = linda_ib_epb_request ( linda ) ) != 0 )
01853                 goto out;
01854 
01855         /* Read existing value, if necessary */
01856         location = LINDA_EPB_LOC ( cs, channel, element, reg );
01857         if ( (~mask) & 0xff ) {
01858                 old_value = linda_ib_epb_read ( linda, location );
01859                 if ( old_value < 0 ) {
01860                         rc = old_value;
01861                         goto out_release;
01862                 }
01863         } else {
01864                 old_value = 0;
01865         }
01866 
01867         /* Update value */
01868         value = ( ( old_value & ~mask ) | value );
01869         DBGCP ( linda, "Linda %p CS %d EPB(%d,%d,%#02x) %#02x => %#02x\n",
01870                 linda, cs, channel, element, reg, old_value, value );
01871         if ( ( rc = linda_ib_epb_write ( linda, location, value ) ) != 0 )
01872                 goto out_release;
01873 
01874  out_release:
01875         /* Release bus */
01876         linda_ib_epb_release ( linda );
01877  out:
01878         DBG_ENABLE ( DBGLVL_IO );
01879         return rc;
01880 }
01881 
01882 /**
01883  * Transfer data to/from microcontroller RAM
01884  *
01885  * @v linda             Linda device
01886  * @v address           Starting address
01887  * @v write             Data to write, or NULL
01888  * @v read              Data to read, or NULL
01889  * @v len               Length of data
01890  * @ret rc              Return status code
01891  */
01892 static int linda_ib_epb_ram_xfer ( struct linda *linda, unsigned int address,
01893                                    const void *write, void *read,
01894                                    size_t len ) {
01895         unsigned int control;
01896         unsigned int address_hi;
01897         unsigned int address_lo;
01898         int data;
01899         int rc;
01900 
01901         DBG_DISABLE ( DBGLVL_IO );
01902 
01903         assert ( ! ( write && read ) );
01904         assert ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 );
01905         assert ( ( len % LINDA_EPB_UC_CHUNK_SIZE ) == 0 );
01906 
01907         /* Acquire bus ownership */
01908         if ( ( rc = linda_ib_epb_request ( linda ) ) != 0 )
01909                 goto out;
01910 
01911         /* Process data */
01912         while ( len ) {
01913 
01914                 /* Reset the address for each new chunk */
01915                 if ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 ) {
01916 
01917                         /* Write the control register */
01918                         control = ( read ? LINDA_EPB_UC_CTL_READ :
01919                                     LINDA_EPB_UC_CTL_WRITE );
01920                         if ( ( rc = linda_ib_epb_write ( linda,
01921                                                          LINDA_EPB_UC_CTL,
01922                                                          control ) ) != 0 )
01923                                 break;
01924 
01925                         /* Write the address registers */
01926                         address_hi = ( address >> 8 );
01927                         if ( ( rc = linda_ib_epb_write ( linda,
01928                                                          LINDA_EPB_UC_ADDR_HI,
01929                                                          address_hi ) ) != 0 )
01930                                 break;
01931                         address_lo = ( address & 0xff );
01932                         if ( ( rc = linda_ib_epb_write ( linda,
01933                                                          LINDA_EPB_UC_ADDR_LO,
01934                                                          address_lo ) ) != 0 )
01935                                 break;
01936                 }
01937 
01938                 /* Read or write the data */
01939                 if ( read ) {
01940                         data = linda_ib_epb_read ( linda, LINDA_EPB_UC_DATA );
01941                         if ( data < 0 ) {
01942                                 rc = data;
01943                                 break;
01944                         }
01945                         *( ( uint8_t * ) read++ ) = data;
01946                 } else {
01947                         data = *( ( uint8_t * ) write++ );
01948                         if ( ( rc = linda_ib_epb_write ( linda,
01949                                                          LINDA_EPB_UC_DATA,
01950                                                          data ) ) != 0 )
01951                                 break;
01952                 }
01953                 address++;
01954                 len--;
01955 
01956                 /* Reset the control byte after each chunk */
01957                 if ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 ) {
01958                         if ( ( rc = linda_ib_epb_write ( linda,
01959                                                          LINDA_EPB_UC_CTL,
01960                                                          0 ) ) != 0 )
01961                                 break;
01962                 }
01963         }
01964 
01965         /* Release bus */
01966         linda_ib_epb_release ( linda );
01967 
01968  out:
01969         DBG_ENABLE ( DBGLVL_IO );
01970         return rc;
01971 }
01972 
01973 /***************************************************************************
01974  *
01975  * Infiniband SerDes initialisation
01976  *
01977  ***************************************************************************
01978  */
01979 
01980 /** A Linda SerDes parameter */
01981 struct linda_serdes_param {
01982         /** EPB address as constructed by LINDA_EPB_ADDRESS() */
01983         uint16_t address;
01984         /** Value to set */
01985         uint8_t value;
01986         /** Mask to apply to old value */
01987         uint8_t mask;
01988 } __packed;
01989 
01990 /** Magic "all channels" channel number */
01991 #define LINDA_EPB_ALL_CHANNELS 31
01992 
01993 /** End of SerDes parameter list marker */
01994 #define LINDA_SERDES_PARAM_END { 0, 0, 0 }
01995 
01996 /**
01997  * Program IB SerDes register(s)
01998  *
01999  * @v linda             Linda device
02000  * @v param             SerDes parameter
02001  * @ret rc              Return status code
02002  */
02003 static int linda_set_serdes_param ( struct linda *linda,
02004                                     struct linda_serdes_param *param ) {
02005         unsigned int channel;
02006         unsigned int channel_start;
02007         unsigned int channel_end;
02008         unsigned int element;
02009         unsigned int reg;
02010         int rc;
02011 
02012         /* Break down the EPB address and determine channels */
02013         channel = LINDA_EPB_ADDRESS_CHANNEL ( param->address );
02014         element = LINDA_EPB_ADDRESS_ELEMENT ( param->address );
02015         reg = LINDA_EPB_ADDRESS_REG ( param->address );
02016         if ( channel == LINDA_EPB_ALL_CHANNELS ) {
02017                 channel_start = 0;
02018                 channel_end = 3;
02019         } else {
02020                 channel_start = channel_end = channel;
02021         }
02022 
02023         /* Modify register for each specified channel */
02024         for ( channel = channel_start ; channel <= channel_end ; channel++ ) {
02025                 if ( ( rc = linda_ib_epb_mod_reg ( linda, LINDA_EPB_CS_SERDES,
02026                                                    channel, element, reg,
02027                                                    param->value,
02028                                                    param->mask ) ) != 0 )
02029                         return rc;
02030         }
02031 
02032         return 0;
02033 }
02034 
02035 /**
02036  * Program IB SerDes registers
02037  *
02038  * @v linda             Linda device
02039  * @v param             SerDes parameters
02040  * @v count             Number of parameters
02041  * @ret rc              Return status code
02042  */
02043 static int linda_set_serdes_params ( struct linda *linda,
02044                                      struct linda_serdes_param *params ) {
02045         int rc;
02046 
02047         for ( ; params->mask != 0 ; params++ ){
02048                 if ( ( rc = linda_set_serdes_param ( linda,
02049                                                          params ) ) != 0 )
02050                         return rc;
02051         }
02052 
02053         return 0;
02054 }
02055 
02056 #define LINDA_DDS_VAL( amp_d, main_d, ipst_d, ipre_d,                   \
02057                        amp_s, main_s, ipst_s, ipre_s )                  \
02058         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x00 ),        \
02059           ( ( ( amp_d & 0x1f ) << 1 ) | 1 ), 0xff },                    \
02060         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x01 ),        \
02061           ( ( ( amp_s & 0x1f ) << 1 ) | 1 ), 0xff },                    \
02062         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x09 ),        \
02063           ( ( main_d << 3 ) | 4 | ( ipre_d >> 2 ) ), 0xff },            \
02064         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x0a ),        \
02065           ( ( main_s << 3 ) | 4 | ( ipre_s >> 2 ) ), 0xff },            \
02066         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x06 ),        \
02067           ( ( ( ipst_d & 0xf ) << 1 ) |                                 \
02068             ( ( ipre_d & 3 ) << 6 ) | 0x21 ), 0xff },                   \
02069         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x07 ),        \
02070           ( ( ( ipst_s & 0xf ) << 1 ) |                                 \
02071             ( ( ipre_s & 3 ) << 6) | 0x21 ), 0xff }
02072 
02073 /**
02074  * Linda SerDes default parameters
02075  *
02076  * These magic start-of-day values are taken from the Linux driver.
02077  */
02078 static struct linda_serdes_param linda_serdes_defaults1[] = {
02079         /* RXHSCTRL0 */
02080         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x00 ), 0xd4, 0xff },
02081         /* VCDL_DAC2 */
02082         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x05 ), 0x2d, 0xff },
02083         /* VCDL_CTRL2 */
02084         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x08 ), 0x03, 0x0f },
02085         /* START_EQ1 */
02086         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x10, 0xff },
02087         /* START_EQ2 */
02088         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x28 ), 0x30, 0xff },
02089         /* BACTRL */
02090         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x0e ), 0x40, 0xff },
02091         /* LDOUTCTRL1 */
02092         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x06 ), 0x04, 0xff },
02093         /* RXHSSTATUS */
02094         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x0f ), 0x04, 0xff },
02095         /* End of this block */
02096         LINDA_SERDES_PARAM_END
02097 };
02098 static struct linda_serdes_param linda_serdes_defaults2[] = {
02099         /* LDOUTCTRL1 */
02100         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x06 ), 0x00, 0xff },
02101         /* DDS values */
02102         LINDA_DDS_VAL ( 31, 19, 12, 0, 29, 22, 9, 0 ),
02103         /* Set Rcv Eq. to Preset node */
02104         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x10, 0xff },
02105         /* DFELTHFDR */
02106         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x08 ), 0x00, 0xff },
02107         /* DFELTHHDR */
02108         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x21 ), 0x00, 0xff },
02109         /* TLTHFDR */
02110         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x09 ), 0x02, 0xff },
02111         /* TLTHHDR */
02112         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x23 ), 0x02, 0xff },
02113         /* ZFR */
02114         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1b ), 0x0c, 0xff },
02115         /* ZCNT) */
02116         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1c ), 0x0c, 0xff },
02117         /* GFR */
02118         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1e ), 0x10, 0xff },
02119         /* GHR */
02120         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1f ), 0x10, 0xff },
02121         /* VCDL_CTRL0 toggle */
02122         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x06 ), 0x20, 0xff },
02123         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x06 ), 0x00, 0xff },
02124         /* CMUCTRL5 */
02125         { LINDA_EPB_ADDRESS (                      7, 0, 0x15 ), 0x80, 0xff },
02126         /* End of this block */
02127         LINDA_SERDES_PARAM_END
02128 };
02129 static struct linda_serdes_param linda_serdes_defaults3[] = {
02130         /* START_EQ1 */
02131         { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x00, 0x38 },
02132         /* End of this block */
02133         LINDA_SERDES_PARAM_END
02134 };
02135 
02136 /**
02137  * Program the microcontroller RAM
02138  *
02139  * @v linda             Linda device
02140  * @ret rc              Return status code
02141  */
02142 static int linda_program_uc_ram ( struct linda *linda ) {
02143         int rc;
02144 
02145         if ( ( rc = linda_ib_epb_ram_xfer ( linda, 0, linda_ib_fw, NULL,
02146                                             sizeof ( linda_ib_fw ) ) ) != 0 ){
02147                 DBGC ( linda, "Linda %p could not load IB firmware: %s\n",
02148                        linda, strerror ( rc ) );
02149                 return rc;
02150         }
02151 
02152         return 0;
02153 }
02154 
02155 /**
02156  * Verify the microcontroller RAM
02157  *
02158  * @v linda             Linda device
02159  * @ret rc              Return status code
02160  */
02161 static int linda_verify_uc_ram ( struct linda *linda ) {
02162         uint8_t verify[LINDA_EPB_UC_CHUNK_SIZE];
02163         unsigned int offset;
02164         int rc;
02165 
02166         for ( offset = 0 ; offset < sizeof ( linda_ib_fw );
02167               offset += sizeof ( verify ) ) {
02168                 if ( ( rc = linda_ib_epb_ram_xfer ( linda, offset,
02169                                                     NULL, verify,
02170                                                     sizeof (verify) )) != 0 ){
02171                         DBGC ( linda, "Linda %p could not read back IB "
02172                                "firmware: %s\n", linda, strerror ( rc ) );
02173                         return rc;
02174                 }
02175                 if ( memcmp ( ( linda_ib_fw + offset ), verify,
02176                               sizeof ( verify ) ) != 0 ) {
02177                         DBGC ( linda, "Linda %p firmware verification failed "
02178                                "at offset %#x\n", linda, offset );
02179                         DBGC_HDA ( linda, offset, ( linda_ib_fw + offset ),
02180                                    sizeof ( verify ) );
02181                         DBGC_HDA ( linda, offset, verify, sizeof ( verify ) );
02182                         return -EIO;
02183                 }
02184         }
02185 
02186         DBGC2 ( linda, "Linda %p firmware verified ok\n", linda );
02187         return 0;
02188 }
02189 
02190 /**
02191  * Use the microcontroller to trim the IB link
02192  *
02193  * @v linda             Linda device
02194  * @ret rc              Return status code
02195  */
02196 static int linda_trim_ib ( struct linda *linda ) {
02197         struct QIB_7220_IBSerDesCtrl ctrl;
02198         struct QIB_7220_IntStatus intstatus;
02199         unsigned int i;
02200         int rc;
02201 
02202         /* Bring the microcontroller out of reset */
02203         linda_readq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
02204         BIT_SET ( &ctrl, ResetIB_uC_Core, 0 );
02205         linda_writeq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
02206 
02207         /* Wait for the "trim done" signal */
02208         for ( i = 0 ; i < LINDA_TRIM_DONE_MAX_WAIT_MS ; i++ ) {
02209                 linda_readq ( linda, &intstatus, QIB_7220_IntStatus_offset );
02210                 if ( BIT_GET ( &intstatus, IBSerdesTrimDone ) ) {
02211                         rc = 0;
02212                         goto out_reset;
02213                 }
02214                 mdelay ( 1 );
02215         }
02216 
02217         DBGC ( linda, "Linda %p timed out waiting for trim done\n", linda );
02218         rc = -ETIMEDOUT;
02219  out_reset:
02220         /* Put the microcontroller back into reset */
02221         BIT_SET ( &ctrl, ResetIB_uC_Core, 1 );
02222         linda_writeq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
02223 
02224         return rc;
02225 }
02226 
02227 /**
02228  * Initialise the IB SerDes
02229  *
02230  * @v linda             Linda device
02231  * @ret rc              Return status code
02232  */
02233 static int linda_init_ib_serdes ( struct linda *linda ) {
02234         struct QIB_7220_Control control;
02235         struct QIB_7220_IBCCtrl ibcctrl;
02236         struct QIB_7220_IBCDDRCtrl ibcddrctrl;
02237         struct QIB_7220_XGXSCfg xgxscfg;
02238         int rc;
02239 
02240         /* Disable link */
02241         linda_readq ( linda, &control, QIB_7220_Control_offset );
02242         BIT_SET ( &control, LinkEn, 0 );
02243         linda_writeq ( linda, &control, QIB_7220_Control_offset );
02244 
02245         /* Configure sensible defaults for IBC */
02246         memset ( &ibcctrl, 0, sizeof ( ibcctrl ) );
02247         BIT_FILL_6 ( &ibcctrl, /* Tuning values taken from Linux driver */
02248                      FlowCtrlPeriod, 0x03,
02249                      FlowCtrlWaterMark, 0x05,
02250                      MaxPktLen, ( ( LINDA_RECV_HEADER_SIZE +
02251                                     LINDA_RECV_PAYLOAD_SIZE +
02252                                     4 /* ICRC */ ) >> 2 ),
02253                      PhyerrThreshold, 0xf,
02254                      OverrunThreshold, 0xf,
02255                      CreditScale, 0x4 );
02256         linda_writeq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
02257 
02258         /* Force SDR only to avoid needing all the DDR tuning,
02259          * Mellanox compatibility hacks etc.  SDR is plenty for
02260          * boot-time operation.
02261          */
02262         linda_readq ( linda, &ibcddrctrl, QIB_7220_IBCDDRCtrl_offset );
02263         BIT_SET ( &ibcddrctrl, IB_ENHANCED_MODE, 0 );
02264         BIT_SET ( &ibcddrctrl, SD_SPEED_SDR, 1 );
02265         BIT_SET ( &ibcddrctrl, SD_SPEED_DDR, 0 );
02266         BIT_SET ( &ibcddrctrl, SD_SPEED_QDR, 0 );
02267         BIT_SET ( &ibcddrctrl, HRTBT_ENB, 0 );
02268         BIT_SET ( &ibcddrctrl, HRTBT_AUTO, 0 );
02269         linda_writeq ( linda, &ibcddrctrl, QIB_7220_IBCDDRCtrl_offset );
02270 
02271         /* Set default SerDes parameters */
02272         if ( ( rc = linda_set_serdes_params ( linda,
02273                                               linda_serdes_defaults1 ) ) != 0 )
02274                 return rc;
02275         udelay ( 415 ); /* Magic delay while SerDes sorts itself out */
02276         if ( ( rc = linda_set_serdes_params ( linda,
02277                                               linda_serdes_defaults2 ) ) != 0 )
02278                 return rc;
02279 
02280         /* Program the microcontroller RAM */
02281         if ( ( rc = linda_program_uc_ram ( linda ) ) != 0 )
02282                 return rc;
02283 
02284         /* Verify the microcontroller RAM contents */
02285         if ( DBGLVL_LOG ) {
02286                 if ( ( rc = linda_verify_uc_ram ( linda ) ) != 0 )
02287                         return rc;
02288         }
02289 
02290         /* More SerDes tuning */
02291         if ( ( rc = linda_set_serdes_params ( linda,
02292                                               linda_serdes_defaults3 ) ) != 0 )
02293                 return rc;
02294 
02295         /* Use the microcontroller to trim the IB link */
02296         if ( ( rc = linda_trim_ib ( linda ) ) != 0 )
02297                 return rc;
02298 
02299         /* Bring XGXS out of reset */
02300         linda_readq ( linda, &xgxscfg, QIB_7220_XGXSCfg_offset );
02301         BIT_SET ( &xgxscfg, tx_rx_reset, 0 );
02302         BIT_SET ( &xgxscfg, xcv_reset, 0 );
02303         linda_writeq ( linda, &xgxscfg, QIB_7220_XGXSCfg_offset );
02304 
02305         return rc;
02306 }
02307 
02308 /***************************************************************************
02309  *
02310  * PCI layer interface
02311  *
02312  ***************************************************************************
02313  */
02314 
02315 /**
02316  * Probe PCI device
02317  *
02318  * @v pci               PCI device
02319  * @v id                PCI ID
02320  * @ret rc              Return status code
02321  */
02322 static int linda_probe ( struct pci_device *pci,
02323                          const struct pci_device_id *id __unused ) {
02324         struct ib_device *ibdev;
02325         struct linda *linda;
02326         struct QIB_7220_Revision revision;
02327         int rc;
02328 
02329         /* Allocate Infiniband device */
02330         ibdev = alloc_ibdev ( sizeof ( *linda ) );
02331         if ( ! ibdev ) {
02332                 rc = -ENOMEM;
02333                 goto err_alloc_ibdev;
02334         }
02335         pci_set_drvdata ( pci, ibdev );
02336         linda = ib_get_drvdata ( ibdev );
02337         ibdev->op = &linda_ib_operations;
02338         ibdev->dev = &pci->dev;
02339         ibdev->port = 1;
02340 
02341         /* Fix up PCI device */
02342         adjust_pci_device ( pci );
02343 
02344         /* Get PCI BARs */
02345         linda->regs = ioremap ( pci->membase, LINDA_BAR0_SIZE );
02346         DBGC2 ( linda, "Linda %p has BAR at %08lx\n", linda, pci->membase );
02347 
02348         /* Print some general data */
02349         linda_readq ( linda, &revision, QIB_7220_Revision_offset );
02350         DBGC2 ( linda, "Linda %p board %02lx v%ld.%ld.%ld.%ld\n", linda,
02351                 BIT_GET ( &revision, BoardID ),
02352                 BIT_GET ( &revision, R_SW ),
02353                 BIT_GET ( &revision, R_Arch ),
02354                 BIT_GET ( &revision, R_ChipRevMajor ),
02355                 BIT_GET ( &revision, R_ChipRevMinor ) );
02356 
02357         /* Record link capabilities.  Note that we force SDR only to
02358          * avoid having to carry extra code for DDR tuning etc.
02359          */
02360         ibdev->link_width_enabled = ibdev->link_width_supported =
02361                 ( IB_LINK_WIDTH_4X | IB_LINK_WIDTH_1X );
02362         ibdev->link_speed_enabled = ibdev->link_speed_supported =
02363                 IB_LINK_SPEED_SDR;
02364 
02365         /* Initialise I2C subsystem */
02366         if ( ( rc = linda_init_i2c ( linda ) ) != 0 )
02367                 goto err_init_i2c;
02368 
02369         /* Read EEPROM parameters */
02370         if ( ( rc = linda_read_eeprom ( linda, &ibdev->gid.u.half[1] ) ) != 0 )
02371                 goto err_read_eeprom;
02372 
02373         /* Initialise send datapath */
02374         if ( ( rc = linda_init_send ( linda ) ) != 0 )
02375                 goto err_init_send;
02376 
02377         /* Initialise receive datapath */
02378         if ( ( rc = linda_init_recv ( linda ) ) != 0 )
02379                 goto err_init_recv;
02380 
02381         /* Initialise the IB SerDes */
02382         if ( ( rc = linda_init_ib_serdes ( linda ) ) != 0 )
02383                 goto err_init_ib_serdes;
02384 
02385         /* Register Infiniband device */
02386         if ( ( rc = register_ibdev ( ibdev ) ) != 0 ) {
02387                 DBGC ( linda, "Linda %p could not register IB "
02388                        "device: %s\n", linda, strerror ( rc ) );
02389                 goto err_register_ibdev;
02390         }
02391 
02392         return 0;
02393 
02394         unregister_ibdev ( ibdev );
02395  err_register_ibdev:
02396         linda_fini_recv ( linda );
02397  err_init_recv:
02398         linda_fini_send ( linda );
02399  err_init_send:
02400  err_init_ib_serdes:
02401  err_read_eeprom:
02402  err_init_i2c:
02403         ibdev_put ( ibdev );
02404  err_alloc_ibdev:
02405         return rc;
02406 }
02407 
02408 /**
02409  * Remove PCI device
02410  *
02411  * @v pci               PCI device
02412  */
02413 static void linda_remove ( struct pci_device *pci ) {
02414         struct ib_device *ibdev = pci_get_drvdata ( pci );
02415         struct linda *linda = ib_get_drvdata ( ibdev );
02416 
02417         unregister_ibdev ( ibdev );
02418         linda_fini_recv ( linda );
02419         linda_fini_send ( linda );
02420         ibdev_put ( ibdev );
02421 }
02422 
02423 static struct pci_device_id linda_nics[] = {
02424         PCI_ROM ( 0x1077, 0x7220, "iba7220", "QLE7240/7280 HCA driver", 0 ),
02425 };
02426 
02427 struct pci_driver linda_driver __pci_driver = {
02428         .ids = linda_nics,
02429         .id_count = ( sizeof ( linda_nics ) / sizeof ( linda_nics[0] ) ),
02430         .probe = linda_probe,
02431         .remove = linda_remove,
02432 };

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