i82365.h File Reference

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Defines
#define	I365_IDENT   0x00
#define	I365_STATUS   0x01
#define	I365_POWER   0x02
#define	I365_INTCTL   0x03
#define	I365_CSC   0x04
#define	I365_CSCINT   0x05
#define	I365_ADDRWIN   0x06
#define	I365_IOCTL   0x07
#define	I365_GENCTL   0x16
#define	I365_GBLCTL   0x1E
#define	I365_IO(map)   (0x08+((map)<<2))
#define	I365_MEM(map)   (0x10+((map)<<3))
#define	I365_W_START   0
#define	I365_W_STOP   2
#define	I365_W_OFF   4
#define	I365_CS_BVD1   0x01
#define	I365_CS_STSCHG   0x01
#define	I365_CS_BVD2   0x02
#define	I365_CS_SPKR   0x02
#define	I365_CS_DETECT   0x0C
#define	I365_CS_WRPROT   0x10
#define	I365_CS_READY   0x20
#define	I365_CS_POWERON   0x40
#define	I365_CS_GPI   0x80
#define	I365_PWR_OFF   0x00
#define	I365_PWR_OUT   0x80
#define	I365_PWR_NORESET   0x40
#define	I365_PWR_AUTO   0x20
#define	I365_VCC_MASK   0x18
#define	I365_VCC_5V   0x10
#define	I365_VCC_3V   0x18
#define	I365_VPP2_MASK   0x0c
#define	I365_VPP2_5V   0x04
#define	I365_VPP2_12V   0x08
#define	I365_VPP1_MASK   0x03
#define	I365_VPP1_5V   0x01
#define	I365_VPP1_12V   0x02
#define	I365_RING_ENA   0x80
#define	I365_PC_RESET   0x40
#define	I365_PC_IOCARD   0x20
#define	I365_INTR_ENA   0x10
#define	I365_IRQ_MASK   0x0F
#define	I365_CSC_BVD1   0x01
#define	I365_CSC_STSCHG   0x01
#define	I365_CSC_BVD2   0x02
#define	I365_CSC_READY   0x04
#define	I365_CSC_DETECT   0x08
#define	I365_CSC_ANY   0x0F
#define	I365_CSC_GPI   0x10
#define	I365_ENA_IO(map)   (0x40 << (map))
#define	I365_ENA_MEM(map)   (0x01 << (map))
#define	I365_IOCTL_MASK(map)   (0x0F << (map<<2))
#define	I365_IOCTL_WAIT(map)   (0x08 << (map<<2))
#define	I365_IOCTL_0WS(map)   (0x04 << (map<<2))
#define	I365_IOCTL_IOCS16(map)   (0x02 << (map<<2))
#define	I365_IOCTL_16BIT(map)   (0x01 << (map<<2))
#define	I365_CTL_16DELAY   0x01
#define	I365_CTL_RESET   0x02
#define	I365_CTL_GPI_ENA   0x04
#define	I365_CTL_GPI_CTL   0x08
#define	I365_CTL_RESUME   0x10
#define	I365_CTL_SW_IRQ   0x20
#define	I365_GBL_PWRDOWN   0x01
#define	I365_GBL_CSC_LEV   0x02
#define	I365_GBL_WRBACK   0x04
#define	I365_GBL_IRQ_0_LEV   0x08
#define	I365_GBL_IRQ_1_LEV   0x10
#define	I365_MEM_16BIT   0x8000
#define	I365_MEM_0WS   0x4000
#define	I365_MEM_WS1   0x8000
#define	I365_MEM_WS0   0x4000
#define	I365_MEM_WRPROT   0x8000
#define	I365_MEM_REG   0x4000
#define	I365_REG(slot, reg)   (((slot) << 6) + reg)
#define	I365_IDENT_VADEM   0x08
#define	VG468_VPP2_MASK   0x0c
#define	VG468_VPP2_5V   0x04
#define	VG468_VPP2_12V   0x08
#define	VG469_VSENSE   0x1f
#define	VG469_VSELECT   0x2f
#define	VG468_CTL   0x38
#define	VG468_TIMER   0x39
#define	VG468_MISC   0x3a
#define	VG468_GPIO_CFG   0x3b
#define	VG469_EXT_MODE   0x3c
#define	VG468_SELECT   0x3d
#define	VG468_SELECT_CFG   0x3e
#define	VG468_ATA   0x3f
#define	VG469_VSENSE_A_VS1   0x01
#define	VG469_VSENSE_A_VS2   0x02
#define	VG469_VSENSE_B_VS1   0x04
#define	VG469_VSENSE_B_VS2   0x08
#define	VG469_VSEL_VCC   0x03
#define	VG469_VSEL_5V   0x00
#define	VG469_VSEL_3V   0x03
#define	VG469_VSEL_MAX   0x0c
#define	VG469_VSEL_EXT_STAT   0x10
#define	VG469_VSEL_EXT_BUS   0x20
#define	VG469_VSEL_MIXED   0x40
#define	VG469_VSEL_ISA   0x80
#define	VG468_CTL_SLOW   0x01
#define	VG468_CTL_ASYNC   0x02
#define	VG468_CTL_TSSI   0x08
#define	VG468_CTL_DELAY   0x10
#define	VG468_CTL_INPACK   0x20
#define	VG468_CTL_POLARITY   0x40
#define	VG468_CTL_COMPAT   0x80
#define	VG469_CTL_WS_COMPAT   0x04
#define	VG469_CTL_STRETCH   0x10
#define	VG468_TIMER_ZEROPWR   0x10
#define	VG468_TIMER_SIGEN   0x20
#define	VG468_TIMER_STATUS   0x40
#define	VG468_TIMER_RES   0x80
#define	VG468_TIMER_MASK   0x0f
#define	VG468_MISC_GPIO   0x04
#define	VG468_MISC_DMAWSB   0x08
#define	VG469_MISC_LEDENA   0x10
#define	VG468_MISC_VADEMREV   0x40
#define	VG468_MISC_UNLOCK   0x80
#define	VG469_MODE_VPPST   0x03
#define	VG469_MODE_INT_SENSE   0x04
#define	VG469_MODE_CABLE   0x08
#define	VG469_MODE_COMPAT   0x10
#define	VG469_MODE_TEST   0x20
#define	VG469_MODE_RIO   0x40
#define	VG469_MODE_B_3V   0x01
#define	RF5C_MODE_CTL   0x1f
#define	RF5C_PWR_CTL   0x2f
#define	RF5C_CHIP_ID   0x3a
#define	RF5C_MODE_CTL_3   0x3b
#define	RF5C_IO_OFF(w)   (0x36+((w)<<1))
#define	RF5C_MODE_ATA   0x01
#define	RF5C_MODE_LED_ENA   0x02
#define	RF5C_MODE_CA21   0x04
#define	RF5C_MODE_CA22   0x08
#define	RF5C_MODE_CA23   0x10
#define	RF5C_MODE_CA24   0x20
#define	RF5C_MODE_CA25   0x40
#define	RF5C_MODE_3STATE_BIT7   0x80
#define	RF5C_PWR_VCC_3V   0x01
#define	RF5C_PWR_IREQ_HIGH   0x02
#define	RF5C_PWR_INPACK_ENA   0x04
#define	RF5C_PWR_5V_DET   0x08
#define	RF5C_PWR_TC_SEL   0x10
#define	RF5C_PWR_DREQ_LOW   0x20
#define	RF5C_PWR_DREQ_OFF   0x00
#define	RF5C_PWR_DREQ_INPACK   0x40
#define	RF5C_PWR_DREQ_SPKR   0x80
#define	RF5C_PWR_DREQ_IOIS16   0xc0
#define	RF5C_CHIP_RF5C296   0x32
#define	RF5C_CHIP_RF5C396   0xb2
#define	RF5C_MCTL3_DISABLE   0x01
#define	RF5C_MCTL3_DMA_ENA   0x02
#define	RL5C46X_BCR_3E0_ENA   0x0800
#define	RL5C46X_BCR_3E2_ENA   0x1000
#define	RL5C4XX_CONFIG   0x80
#define	RL5C4XX_CONFIG_IO_1_MODE   0x0200
#define	RL5C4XX_CONFIG_IO_0_MODE   0x0100
#define	RL5C4XX_CONFIG_PREFETCH   0x0001
#define	RL5C4XX_MISC   0x0082
#define	RL5C4XX_MISC_HW_SUSPEND_ENA   0x0002
#define	RL5C4XX_MISC_VCCEN_POL   0x0100
#define	RL5C4XX_MISC_VPPEN_POL   0x0200
#define	RL5C46X_MISC_SUSPEND   0x0001
#define	RL5C46X_MISC_PWR_SAVE_2   0x0004
#define	RL5C46X_MISC_IFACE_BUSY   0x0008
#define	RL5C46X_MISC_B_LOCK   0x0010
#define	RL5C46X_MISC_A_LOCK   0x0020
#define	RL5C46X_MISC_PCI_LOCK   0x0040
#define	RL5C47X_MISC_IFACE_BUSY   0x0004
#define	RL5C47X_MISC_PCI_INT_MASK   0x0018
#define	RL5C47X_MISC_PCI_INT_DIS   0x0020
#define	RL5C47X_MISC_SUBSYS_WR   0x0040
#define	RL5C47X_MISC_SRIRQ_ENA   0x0080
#define	RL5C47X_MISC_5V_DISABLE   0x0400
#define	RL5C47X_MISC_LED_POL   0x0800
#define	RL5C4XX_16BIT_CTL   0x0084
#define	RL5C4XX_16CTL_IO_TIMING   0x0100
#define	RL5C4XX_16CTL_MEM_TIMING   0x0200
#define	RL5C46X_16CTL_LEVEL_1   0x0010
#define	RL5C46X_16CTL_LEVEL_2   0x0020
#define	RL5C4XX_16BIT_IO_0   0x0088
#define	RL5C4XX_16BIT_MEM_0   0x0088
#define	RL5C4XX_SETUP_MASK   0x0007
#define	RL5C4XX_SETUP_SHIFT   0
#define	RL5C4XX_CMD_MASK   0x01f0
#define	RL5C4XX_CMD_SHIFT   4
#define	RL5C4XX_HOLD_MASK   0x1c00
#define	RL5C4XX_HOLD_SHIFT   10
#define	RL5C4XX_MISC_CONTROL   0x2F
#define	RL5C4XX_ZV_ENABLE   0x08
#define	PCI_VENDOR_ID_CIRRUS   0x1013
#define	PCI_DEVICE_ID_CIRRUS_6729   0x1100
#define	PCI_DEVICE_ID_CIRRUS_6832   0x1110
#define	PD67_MISC_CTL_1   0x16
#define	PD67_FIFO_CTL   0x17
#define	PD67_MISC_CTL_2   0x1E
#define	PD67_CHIP_INFO   0x1f
#define	PD67_ATA_CTL   0x026
#define	PD67_EXT_INDEX   0x2e
#define	PD67_EXT_DATA   0x2f
#define	PD67_DATA_MASK0   0x01
#define	PD67_DATA_MASK1   0x02
#define	PD67_DMA_CTL   0x03
#define	PD67_EXT_CTL_1   0x03
#define	PD67_MEM_PAGE(n)   ((n)+5)
#define	PD67_EXTERN_DATA   0x0a
#define	PD67_MISC_CTL_3   0x25
#define	PD67_SMB_PWR_CTL   0x26
#define	PD67_IO_OFF(w)   (0x36+((w)<<1))
#define	PD67_TIME_SETUP(n)   (0x3a + 3*(n))
#define	PD67_TIME_CMD(n)   (0x3b + 3*(n))
#define	PD67_TIME_RECOV(n)   (0x3c + 3*(n))
#define	PD67_MC1_5V_DET   0x01
#define	PD67_MC1_MEDIA_ENA   0x01
#define	PD67_MC1_VCC_3V   0x02
#define	PD67_MC1_PULSE_MGMT   0x04
#define	PD67_MC1_PULSE_IRQ   0x08
#define	PD67_MC1_SPKR_ENA   0x10
#define	PD67_MC1_INPACK_ENA   0x80
#define	PD67_FIFO_EMPTY   0x80
#define	PD67_MC2_FREQ_BYPASS   0x01
#define	PD67_MC2_DYNAMIC_MODE   0x02
#define	PD67_MC2_SUSPEND   0x04
#define	PD67_MC2_5V_CORE   0x08
#define	PD67_MC2_LED_ENA   0x10
#define	PD67_MC2_FAST_PCI   0x10
#define	PD67_MC2_3STATE_BIT7   0x20
#define	PD67_MC2_DMA_MODE   0x40
#define	PD67_MC2_IRQ15_RI   0x80
#define	PD67_INFO_SLOTS   0x20
#define	PD67_INFO_CHIP_ID   0xc0
#define	PD67_INFO_REV   0x1c
#define	PD67_TIME_SCALE   0xc0
#define	PD67_TIME_SCALE_1   0x00
#define	PD67_TIME_SCALE_16   0x40
#define	PD67_TIME_SCALE_256   0x80
#define	PD67_TIME_SCALE_4096   0xc0
#define	PD67_TIME_MULT   0x3f
#define	PD67_DMA_MODE   0xc0
#define	PD67_DMA_OFF   0x00
#define	PD67_DMA_DREQ_INPACK   0x40
#define	PD67_DMA_DREQ_WP   0x80
#define	PD67_DMA_DREQ_BVD2   0xc0
#define	PD67_DMA_PULLUP   0x20
#define	PD67_EC1_VCC_PWR_LOCK   0x01
#define	PD67_EC1_AUTO_PWR_CLEAR   0x02
#define	PD67_EC1_LED_ENA   0x04
#define	PD67_EC1_INV_CARD_IRQ   0x08
#define	PD67_EC1_INV_MGMT_IRQ   0x10
#define	PD67_EC1_PULLUP_CTL   0x20
#define	PD67_MC3_IRQ_MASK   0x03
#define	PD67_MC3_IRQ_PCPCI   0x00
#define	PD67_MC3_IRQ_EXTERN   0x01
#define	PD67_MC3_IRQ_PCIWAY   0x02
#define	PD67_MC3_IRQ_PCI   0x03
#define	PD67_MC3_PWR_MASK   0x0c
#define	PD67_MC3_PWR_SERIAL   0x00
#define	PD67_MC3_PWR_TI2202   0x08
#define	PD67_MC3_PWR_SMB   0x0c
#define	PD68_EXT_CTL_2   0x0b
#define	PD68_PCI_SPACE   0x22
#define	PD68_PCCARD_SPACE   0x23
#define	PD68_WINDOW_TYPE   0x24
#define	PD68_EXT_CSC   0x2e
#define	PD68_MISC_CTL_4   0x2f
#define	PD68_MISC_CTL_5   0x30
#define	PD68_MISC_CTL_6   0x31
#define	PD68_MC3_HW_SUSP   0x10
#define	PD68_MC3_MM_EXPAND   0x40
#define	PD68_MC3_MM_ARM   0x80
#define	PD6832_BCR_MGMT_IRQ_ENA   0x0800
#define	PD6832_SOCKET_NUMBER   0x004c

---

Define Documentation

#define I365_IDENT   0x00

Definition at line 23 of file i82365.h.

#define I365_STATUS   0x01

Definition at line 24 of file i82365.h.

#define I365_POWER   0x02

Definition at line 25 of file i82365.h.

#define I365_INTCTL   0x03

Definition at line 26 of file i82365.h.

#define I365_CSC   0x04

Definition at line 27 of file i82365.h.

#define I365_CSCINT   0x05

Definition at line 28 of file i82365.h.

#define I365_ADDRWIN   0x06

Definition at line 29 of file i82365.h.

#define I365_IOCTL   0x07

Definition at line 30 of file i82365.h.

#define I365_GENCTL   0x16

Definition at line 31 of file i82365.h.

#define I365_GBLCTL   0x1E

Definition at line 32 of file i82365.h.

#define I365_IO

(

map

)

(0x08+((map)<<2))

Definition at line 35 of file i82365.h.

#define I365_MEM

(

map

)

(0x10+((map)<<3))

Definition at line 36 of file i82365.h.

#define I365_W_START   0

Definition at line 37 of file i82365.h.

#define I365_W_STOP   2

Definition at line 38 of file i82365.h.

#define I365_W_OFF   4

Definition at line 39 of file i82365.h.

#define I365_CS_BVD1   0x01

Definition at line 42 of file i82365.h.

#define I365_CS_STSCHG   0x01

Definition at line 43 of file i82365.h.

#define I365_CS_BVD2   0x02

Definition at line 44 of file i82365.h.

#define I365_CS_SPKR   0x02

Definition at line 45 of file i82365.h.

#define I365_CS_DETECT   0x0C

Definition at line 46 of file i82365.h.

#define I365_CS_WRPROT   0x10

Definition at line 47 of file i82365.h.

#define I365_CS_READY   0x20

Definition at line 48 of file i82365.h.

#define I365_CS_POWERON   0x40

Definition at line 49 of file i82365.h.

#define I365_CS_GPI   0x80

Definition at line 50 of file i82365.h.

#define I365_PWR_OFF   0x00

Definition at line 53 of file i82365.h.

#define I365_PWR_OUT   0x80

Definition at line 54 of file i82365.h.

#define I365_PWR_NORESET   0x40

Definition at line 55 of file i82365.h.

#define I365_PWR_AUTO   0x20

Definition at line 56 of file i82365.h.

#define I365_VCC_MASK   0x18

Definition at line 57 of file i82365.h.

#define I365_VCC_5V   0x10

Definition at line 61 of file i82365.h.

#define I365_VCC_3V   0x18

Definition at line 62 of file i82365.h.

#define I365_VPP2_MASK   0x0c

Definition at line 63 of file i82365.h.

#define I365_VPP2_5V   0x04

Definition at line 64 of file i82365.h.

#define I365_VPP2_12V   0x08

Definition at line 65 of file i82365.h.

#define I365_VPP1_MASK   0x03

Definition at line 66 of file i82365.h.

#define I365_VPP1_5V   0x01

Definition at line 67 of file i82365.h.

#define I365_VPP1_12V   0x02

Definition at line 68 of file i82365.h.

#define I365_RING_ENA   0x80

Definition at line 71 of file i82365.h.

#define I365_PC_RESET   0x40

Definition at line 72 of file i82365.h.

#define I365_PC_IOCARD   0x20

Definition at line 73 of file i82365.h.

#define I365_INTR_ENA   0x10

Definition at line 74 of file i82365.h.

#define I365_IRQ_MASK   0x0F

Definition at line 75 of file i82365.h.

#define I365_CSC_BVD1   0x01

Definition at line 78 of file i82365.h.

#define I365_CSC_STSCHG   0x01

Definition at line 79 of file i82365.h.

#define I365_CSC_BVD2   0x02

Definition at line 80 of file i82365.h.

#define I365_CSC_READY   0x04

Definition at line 81 of file i82365.h.

#define I365_CSC_DETECT   0x08

Definition at line 82 of file i82365.h.

#define I365_CSC_ANY   0x0F

Definition at line 83 of file i82365.h.

#define I365_CSC_GPI   0x10

Definition at line 84 of file i82365.h.

#define I365_ENA_IO

(

map

)

(0x40 << (map))

Definition at line 87 of file i82365.h.

#define I365_ENA_MEM

(

map

)

(0x01 << (map))

Definition at line 88 of file i82365.h.

#define I365_IOCTL_MASK

(

map

)

(0x0F << (map<<2))

Definition at line 91 of file i82365.h.

#define I365_IOCTL_WAIT

(

map

)

(0x08 << (map<<2))

Definition at line 92 of file i82365.h.

#define I365_IOCTL_0WS

(

map

)

(0x04 << (map<<2))

Definition at line 93 of file i82365.h.

#define I365_IOCTL_IOCS16

(

map

)

(0x02 << (map<<2))

Definition at line 94 of file i82365.h.

#define I365_IOCTL_16BIT

(

map

)

(0x01 << (map<<2))

Definition at line 95 of file i82365.h.

#define I365_CTL_16DELAY   0x01

Definition at line 98 of file i82365.h.

#define I365_CTL_RESET   0x02

Definition at line 99 of file i82365.h.

#define I365_CTL_GPI_ENA   0x04

Definition at line 100 of file i82365.h.

#define I365_CTL_GPI_CTL   0x08

Definition at line 101 of file i82365.h.

#define I365_CTL_RESUME   0x10

Definition at line 102 of file i82365.h.

#define I365_CTL_SW_IRQ   0x20

Definition at line 103 of file i82365.h.

#define I365_GBL_PWRDOWN   0x01

Definition at line 106 of file i82365.h.

#define I365_GBL_CSC_LEV   0x02

Definition at line 107 of file i82365.h.

#define I365_GBL_WRBACK   0x04

Definition at line 108 of file i82365.h.

#define I365_GBL_IRQ_0_LEV   0x08

Definition at line 109 of file i82365.h.

#define I365_GBL_IRQ_1_LEV   0x10

Definition at line 110 of file i82365.h.

#define I365_MEM_16BIT   0x8000

Definition at line 113 of file i82365.h.

#define I365_MEM_0WS   0x4000

Definition at line 114 of file i82365.h.

#define I365_MEM_WS1   0x8000

Definition at line 115 of file i82365.h.

#define I365_MEM_WS0   0x4000

Definition at line 116 of file i82365.h.

#define I365_MEM_WRPROT   0x8000

Definition at line 117 of file i82365.h.

#define I365_MEM_REG   0x4000

Definition at line 118 of file i82365.h.

#define I365_REG	(	slot,
		reg		)	(((slot) << 6) + reg)

Definition at line 120 of file i82365.h.

#define I365_IDENT_VADEM   0x08

Definition at line 135 of file i82365.h.

#define VG468_VPP2_MASK   0x0c

Definition at line 138 of file i82365.h.

#define VG468_VPP2_5V   0x04

Definition at line 139 of file i82365.h.

#define VG468_VPP2_12V   0x08

Definition at line 140 of file i82365.h.

#define VG469_VSENSE   0x1f

Definition at line 143 of file i82365.h.

#define VG469_VSELECT   0x2f

Definition at line 144 of file i82365.h.

#define VG468_CTL   0x38

Definition at line 145 of file i82365.h.

#define VG468_TIMER   0x39

Definition at line 146 of file i82365.h.

#define VG468_MISC   0x3a

Definition at line 147 of file i82365.h.

#define VG468_GPIO_CFG   0x3b

Definition at line 148 of file i82365.h.

#define VG469_EXT_MODE   0x3c

Definition at line 149 of file i82365.h.

#define VG468_SELECT   0x3d

Definition at line 150 of file i82365.h.

#define VG468_SELECT_CFG   0x3e

Definition at line 151 of file i82365.h.

#define VG468_ATA   0x3f

Definition at line 152 of file i82365.h.

#define VG469_VSENSE_A_VS1   0x01

Definition at line 155 of file i82365.h.

#define VG469_VSENSE_A_VS2   0x02

Definition at line 156 of file i82365.h.

#define VG469_VSENSE_B_VS1   0x04

Definition at line 157 of file i82365.h.

#define VG469_VSENSE_B_VS2   0x08

Definition at line 158 of file i82365.h.

#define VG469_VSEL_VCC   0x03

Definition at line 161 of file i82365.h.

#define VG469_VSEL_5V   0x00

Definition at line 162 of file i82365.h.

#define VG469_VSEL_3V   0x03

Definition at line 163 of file i82365.h.

#define VG469_VSEL_MAX   0x0c

Definition at line 164 of file i82365.h.

#define VG469_VSEL_EXT_STAT   0x10

Definition at line 165 of file i82365.h.

#define VG469_VSEL_EXT_BUS   0x20

Definition at line 166 of file i82365.h.

#define VG469_VSEL_MIXED   0x40

Definition at line 167 of file i82365.h.

#define VG469_VSEL_ISA   0x80

Definition at line 168 of file i82365.h.

#define VG468_CTL_SLOW   0x01

Definition at line 171 of file i82365.h.

#define VG468_CTL_ASYNC   0x02

Definition at line 172 of file i82365.h.

#define VG468_CTL_TSSI   0x08

Definition at line 173 of file i82365.h.

#define VG468_CTL_DELAY   0x10

Definition at line 174 of file i82365.h.

#define VG468_CTL_INPACK   0x20

Definition at line 175 of file i82365.h.

#define VG468_CTL_POLARITY   0x40

Definition at line 176 of file i82365.h.

#define VG468_CTL_COMPAT   0x80

Definition at line 177 of file i82365.h.

#define VG469_CTL_WS_COMPAT   0x04

Definition at line 179 of file i82365.h.

#define VG469_CTL_STRETCH   0x10

Definition at line 180 of file i82365.h.

#define VG468_TIMER_ZEROPWR   0x10

Definition at line 183 of file i82365.h.

#define VG468_TIMER_SIGEN   0x20

Definition at line 184 of file i82365.h.

#define VG468_TIMER_STATUS   0x40

Definition at line 185 of file i82365.h.

#define VG468_TIMER_RES   0x80

Definition at line 186 of file i82365.h.

#define VG468_TIMER_MASK   0x0f

Definition at line 187 of file i82365.h.

#define VG468_MISC_GPIO   0x04

Definition at line 190 of file i82365.h.

#define VG468_MISC_DMAWSB   0x08

Definition at line 191 of file i82365.h.

#define VG469_MISC_LEDENA   0x10

Definition at line 192 of file i82365.h.

#define VG468_MISC_VADEMREV   0x40

Definition at line 193 of file i82365.h.

#define VG468_MISC_UNLOCK   0x80

Definition at line 194 of file i82365.h.

#define VG469_MODE_VPPST   0x03

Definition at line 197 of file i82365.h.

#define VG469_MODE_INT_SENSE   0x04

Definition at line 198 of file i82365.h.

#define VG469_MODE_CABLE   0x08

Definition at line 199 of file i82365.h.

#define VG469_MODE_COMPAT   0x10

Definition at line 200 of file i82365.h.

#define VG469_MODE_TEST   0x20

Definition at line 201 of file i82365.h.

#define VG469_MODE_RIO   0x40

Definition at line 202 of file i82365.h.

#define VG469_MODE_B_3V   0x01

Definition at line 205 of file i82365.h.

#define RF5C_MODE_CTL   0x1f

Definition at line 221 of file i82365.h.

#define RF5C_PWR_CTL   0x2f

Definition at line 222 of file i82365.h.

#define RF5C_CHIP_ID   0x3a

Definition at line 223 of file i82365.h.

#define RF5C_MODE_CTL_3   0x3b

Definition at line 224 of file i82365.h.

#define RF5C_IO_OFF

(

w

)

(0x36+((w)<<1))

Definition at line 227 of file i82365.h.

#define RF5C_MODE_ATA   0x01

Definition at line 230 of file i82365.h.

#define RF5C_MODE_LED_ENA   0x02

Definition at line 231 of file i82365.h.

#define RF5C_MODE_CA21   0x04

Definition at line 232 of file i82365.h.

#define RF5C_MODE_CA22   0x08

Definition at line 233 of file i82365.h.

#define RF5C_MODE_CA23   0x10

Definition at line 234 of file i82365.h.

#define RF5C_MODE_CA24   0x20

Definition at line 235 of file i82365.h.

#define RF5C_MODE_CA25   0x40

Definition at line 236 of file i82365.h.

#define RF5C_MODE_3STATE_BIT7   0x80

Definition at line 237 of file i82365.h.

#define RF5C_PWR_VCC_3V   0x01

Definition at line 240 of file i82365.h.

#define RF5C_PWR_IREQ_HIGH   0x02

Definition at line 241 of file i82365.h.

#define RF5C_PWR_INPACK_ENA   0x04

Definition at line 242 of file i82365.h.

#define RF5C_PWR_5V_DET   0x08

Definition at line 243 of file i82365.h.

#define RF5C_PWR_TC_SEL   0x10

Definition at line 244 of file i82365.h.

#define RF5C_PWR_DREQ_LOW   0x20

Definition at line 245 of file i82365.h.

#define RF5C_PWR_DREQ_OFF   0x00

Definition at line 246 of file i82365.h.

#define RF5C_PWR_DREQ_INPACK   0x40

Definition at line 247 of file i82365.h.

#define RF5C_PWR_DREQ_SPKR   0x80

Definition at line 248 of file i82365.h.

#define RF5C_PWR_DREQ_IOIS16   0xc0

Definition at line 249 of file i82365.h.

#define RF5C_CHIP_RF5C296   0x32

Definition at line 252 of file i82365.h.

#define RF5C_CHIP_RF5C396   0xb2

Definition at line 253 of file i82365.h.

#define RF5C_MCTL3_DISABLE   0x01

Definition at line 256 of file i82365.h.

#define RF5C_MCTL3_DMA_ENA   0x02

Definition at line 257 of file i82365.h.

#define RL5C46X_BCR_3E0_ENA   0x0800

Definition at line 262 of file i82365.h.

#define RL5C46X_BCR_3E2_ENA   0x1000

Definition at line 263 of file i82365.h.

#define RL5C4XX_CONFIG   0x80

Definition at line 266 of file i82365.h.

#define RL5C4XX_CONFIG_IO_1_MODE   0x0200

Definition at line 267 of file i82365.h.

#define RL5C4XX_CONFIG_IO_0_MODE   0x0100

Definition at line 268 of file i82365.h.

#define RL5C4XX_CONFIG_PREFETCH   0x0001

Definition at line 269 of file i82365.h.

#define RL5C4XX_MISC   0x0082

Definition at line 273 of file i82365.h.

#define RL5C4XX_MISC_HW_SUSPEND_ENA   0x0002

Definition at line 274 of file i82365.h.

#define RL5C4XX_MISC_VCCEN_POL   0x0100

Definition at line 275 of file i82365.h.

#define RL5C4XX_MISC_VPPEN_POL   0x0200

Definition at line 276 of file i82365.h.

#define RL5C46X_MISC_SUSPEND   0x0001

Definition at line 277 of file i82365.h.

#define RL5C46X_MISC_PWR_SAVE_2   0x0004

Definition at line 278 of file i82365.h.

#define RL5C46X_MISC_IFACE_BUSY   0x0008

Definition at line 279 of file i82365.h.

#define RL5C46X_MISC_B_LOCK   0x0010

Definition at line 280 of file i82365.h.

#define RL5C46X_MISC_A_LOCK   0x0020

Definition at line 281 of file i82365.h.

#define RL5C46X_MISC_PCI_LOCK   0x0040

Definition at line 282 of file i82365.h.

#define RL5C47X_MISC_IFACE_BUSY   0x0004

Definition at line 283 of file i82365.h.

#define RL5C47X_MISC_PCI_INT_MASK   0x0018

Definition at line 284 of file i82365.h.

#define RL5C47X_MISC_PCI_INT_DIS   0x0020

Definition at line 285 of file i82365.h.

#define RL5C47X_MISC_SUBSYS_WR   0x0040

Definition at line 286 of file i82365.h.

#define RL5C47X_MISC_SRIRQ_ENA   0x0080

Definition at line 287 of file i82365.h.

#define RL5C47X_MISC_5V_DISABLE   0x0400

Definition at line 288 of file i82365.h.

#define RL5C47X_MISC_LED_POL   0x0800

Definition at line 289 of file i82365.h.

#define RL5C4XX_16BIT_CTL   0x0084

Definition at line 292 of file i82365.h.

#define RL5C4XX_16CTL_IO_TIMING   0x0100

Definition at line 293 of file i82365.h.

#define RL5C4XX_16CTL_MEM_TIMING   0x0200

Definition at line 294 of file i82365.h.

#define RL5C46X_16CTL_LEVEL_1   0x0010

Definition at line 295 of file i82365.h.

#define RL5C46X_16CTL_LEVEL_2   0x0020

Definition at line 296 of file i82365.h.

#define RL5C4XX_16BIT_IO_0   0x0088

Definition at line 299 of file i82365.h.

#define RL5C4XX_16BIT_MEM_0   0x0088

Definition at line 300 of file i82365.h.

#define RL5C4XX_SETUP_MASK   0x0007

Definition at line 301 of file i82365.h.

#define RL5C4XX_SETUP_SHIFT   0

Definition at line 302 of file i82365.h.

#define RL5C4XX_CMD_MASK   0x01f0

Definition at line 303 of file i82365.h.

#define RL5C4XX_CMD_SHIFT   4

Definition at line 304 of file i82365.h.

#define RL5C4XX_HOLD_MASK   0x1c00

Definition at line 305 of file i82365.h.

#define RL5C4XX_HOLD_SHIFT   10

Definition at line 306 of file i82365.h.

#define RL5C4XX_MISC_CONTROL   0x2F

Definition at line 307 of file i82365.h.

#define RL5C4XX_ZV_ENABLE   0x08

Definition at line 308 of file i82365.h.

#define PCI_VENDOR_ID_CIRRUS   0x1013

Definition at line 324 of file i82365.h.

#define PCI_DEVICE_ID_CIRRUS_6729   0x1100

Definition at line 327 of file i82365.h.

#define PCI_DEVICE_ID_CIRRUS_6832   0x1110

Definition at line 330 of file i82365.h.

#define PD67_MISC_CTL_1   0x16

Definition at line 333 of file i82365.h.

#define PD67_FIFO_CTL   0x17

Definition at line 334 of file i82365.h.

#define PD67_MISC_CTL_2   0x1E

Definition at line 335 of file i82365.h.

#define PD67_CHIP_INFO   0x1f

Definition at line 336 of file i82365.h.

#define PD67_ATA_CTL   0x026

Definition at line 337 of file i82365.h.

#define PD67_EXT_INDEX   0x2e

Definition at line 338 of file i82365.h.

#define PD67_EXT_DATA   0x2f

Definition at line 339 of file i82365.h.

#define PD67_DATA_MASK0   0x01

Definition at line 342 of file i82365.h.

#define PD67_DATA_MASK1   0x02

Definition at line 343 of file i82365.h.

#define PD67_DMA_CTL   0x03

Definition at line 344 of file i82365.h.

#define PD67_EXT_CTL_1   0x03

Definition at line 347 of file i82365.h.

#define PD67_MEM_PAGE

(

n

)

((n)+5)

Definition at line 348 of file i82365.h.

#define PD67_EXTERN_DATA   0x0a

Definition at line 349 of file i82365.h.

#define PD67_MISC_CTL_3   0x25

Definition at line 350 of file i82365.h.

#define PD67_SMB_PWR_CTL   0x26

Definition at line 351 of file i82365.h.

#define PD67_IO_OFF

(

w

)

(0x36+((w)<<1))

Definition at line 354 of file i82365.h.

#define PD67_TIME_SETUP

(

n

)

(0x3a + 3*(n))

Definition at line 357 of file i82365.h.

#define PD67_TIME_CMD

(

n

)

(0x3b + 3*(n))

Definition at line 358 of file i82365.h.

#define PD67_TIME_RECOV

(

n

)

(0x3c + 3*(n))

Definition at line 359 of file i82365.h.

#define PD67_MC1_5V_DET   0x01

Definition at line 362 of file i82365.h.

#define PD67_MC1_MEDIA_ENA   0x01

Definition at line 363 of file i82365.h.

#define PD67_MC1_VCC_3V   0x02

Definition at line 364 of file i82365.h.

#define PD67_MC1_PULSE_MGMT   0x04

Definition at line 365 of file i82365.h.

#define PD67_MC1_PULSE_IRQ   0x08

Definition at line 366 of file i82365.h.

#define PD67_MC1_SPKR_ENA   0x10

Definition at line 367 of file i82365.h.

#define PD67_MC1_INPACK_ENA   0x80

Definition at line 368 of file i82365.h.

#define PD67_FIFO_EMPTY   0x80

Definition at line 371 of file i82365.h.

#define PD67_MC2_FREQ_BYPASS   0x01

Definition at line 374 of file i82365.h.

#define PD67_MC2_DYNAMIC_MODE   0x02

Definition at line 375 of file i82365.h.

#define PD67_MC2_SUSPEND   0x04

Definition at line 376 of file i82365.h.

#define PD67_MC2_5V_CORE   0x08

Definition at line 377 of file i82365.h.

#define PD67_MC2_LED_ENA   0x10

Definition at line 378 of file i82365.h.

#define PD67_MC2_FAST_PCI   0x10

Definition at line 379 of file i82365.h.

#define PD67_MC2_3STATE_BIT7   0x20

Definition at line 380 of file i82365.h.

#define PD67_MC2_DMA_MODE   0x40

Definition at line 381 of file i82365.h.

#define PD67_MC2_IRQ15_RI   0x80

Definition at line 382 of file i82365.h.

#define PD67_INFO_SLOTS   0x20

Definition at line 385 of file i82365.h.

#define PD67_INFO_CHIP_ID   0xc0

Definition at line 386 of file i82365.h.

#define PD67_INFO_REV   0x1c

Definition at line 387 of file i82365.h.

#define PD67_TIME_SCALE   0xc0

Definition at line 390 of file i82365.h.

#define PD67_TIME_SCALE_1   0x00

Definition at line 391 of file i82365.h.

#define PD67_TIME_SCALE_16   0x40

Definition at line 392 of file i82365.h.

#define PD67_TIME_SCALE_256   0x80

Definition at line 393 of file i82365.h.

#define PD67_TIME_SCALE_4096   0xc0

Definition at line 394 of file i82365.h.

#define PD67_TIME_MULT   0x3f

Definition at line 395 of file i82365.h.

#define PD67_DMA_MODE   0xc0

Definition at line 398 of file i82365.h.

#define PD67_DMA_OFF   0x00

Definition at line 399 of file i82365.h.

#define PD67_DMA_DREQ_INPACK   0x40

Definition at line 400 of file i82365.h.

#define PD67_DMA_DREQ_WP   0x80

Definition at line 401 of file i82365.h.

#define PD67_DMA_DREQ_BVD2   0xc0

Definition at line 402 of file i82365.h.

#define PD67_DMA_PULLUP   0x20

Definition at line 403 of file i82365.h.

#define PD67_EC1_VCC_PWR_LOCK   0x01

Definition at line 406 of file i82365.h.

#define PD67_EC1_AUTO_PWR_CLEAR   0x02

Definition at line 407 of file i82365.h.

#define PD67_EC1_LED_ENA   0x04

Definition at line 408 of file i82365.h.

#define PD67_EC1_INV_CARD_IRQ   0x08

Definition at line 409 of file i82365.h.

#define PD67_EC1_INV_MGMT_IRQ   0x10

Definition at line 410 of file i82365.h.

#define PD67_EC1_PULLUP_CTL   0x20

Definition at line 411 of file i82365.h.

#define PD67_MC3_IRQ_MASK   0x03

Definition at line 414 of file i82365.h.

#define PD67_MC3_IRQ_PCPCI   0x00

Definition at line 415 of file i82365.h.

#define PD67_MC3_IRQ_EXTERN   0x01

Definition at line 416 of file i82365.h.

#define PD67_MC3_IRQ_PCIWAY   0x02

Definition at line 417 of file i82365.h.

#define PD67_MC3_IRQ_PCI   0x03

Definition at line 418 of file i82365.h.

#define PD67_MC3_PWR_MASK   0x0c

Definition at line 419 of file i82365.h.

#define PD67_MC3_PWR_SERIAL   0x00

Definition at line 420 of file i82365.h.

#define PD67_MC3_PWR_TI2202   0x08

Definition at line 421 of file i82365.h.

#define PD67_MC3_PWR_SMB   0x0c

Definition at line 422 of file i82365.h.

#define PD68_EXT_CTL_2   0x0b

Definition at line 427 of file i82365.h.

#define PD68_PCI_SPACE   0x22

Definition at line 428 of file i82365.h.

#define PD68_PCCARD_SPACE   0x23

Definition at line 429 of file i82365.h.

#define PD68_WINDOW_TYPE   0x24

Definition at line 430 of file i82365.h.

#define PD68_EXT_CSC   0x2e

Definition at line 431 of file i82365.h.

#define PD68_MISC_CTL_4   0x2f

Definition at line 432 of file i82365.h.

#define PD68_MISC_CTL_5   0x30

Definition at line 433 of file i82365.h.

#define PD68_MISC_CTL_6   0x31

Definition at line 434 of file i82365.h.

#define PD68_MC3_HW_SUSP   0x10

Definition at line 437 of file i82365.h.

#define PD68_MC3_MM_EXPAND   0x40

Definition at line 438 of file i82365.h.

#define PD68_MC3_MM_ARM   0x80

Definition at line 439 of file i82365.h.

#define PD6832_BCR_MGMT_IRQ_ENA   0x0800

Definition at line 442 of file i82365.h.

#define PD6832_SOCKET_NUMBER   0x004c

Definition at line 445 of file i82365.h.