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00029 FILE_LICENCE ( GPL2_OR_LATER );
00030
00031
00032
00033 #ifndef _E1000E_H_
00034 #define _E1000E_H_
00035
00036 #include <stdint.h>
00037 #include <stdlib.h>
00038 #include <stdio.h>
00039 #include <string.h>
00040 #include <unistd.h>
00041 #include <gpxe/io.h>
00042 #include <errno.h>
00043 #include <byteswap.h>
00044 #include <gpxe/pci.h>
00045 #include <gpxe/malloc.h>
00046 #include <gpxe/if_ether.h>
00047 #include <gpxe/ethernet.h>
00048 #include <gpxe/iobuf.h>
00049 #include <gpxe/netdevice.h>
00050
00051
00052
00053 #define u8 unsigned char
00054 #define bool boolean_t
00055 #define dma_addr_t unsigned long
00056 #define __le16 uint16_t
00057 #define __le32 uint32_t
00058 #define __le64 uint64_t
00059
00060 #define __iomem
00061
00062 #define msleep(x) mdelay(x)
00063
00064 #define ETH_FCS_LEN 4
00065
00066 typedef int spinlock_t;
00067 typedef enum {
00068 false = 0,
00069 true = 1
00070 } boolean_t;
00071
00072
00073
00074 #include "e1000e_hw.h"
00075
00076 #define E1000_TX_FLAGS_CSUM 0x00000001
00077 #define E1000_TX_FLAGS_VLAN 0x00000002
00078 #define E1000_TX_FLAGS_TSO 0x00000004
00079 #define E1000_TX_FLAGS_IPV4 0x00000008
00080 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
00081 #define E1000_TX_FLAGS_VLAN_SHIFT 16
00082
00083 #define E1000_MAX_PER_TXD 8192
00084 #define E1000_MAX_TXD_PWR 12
00085
00086 #define MINIMUM_DHCP_PACKET_SIZE 282
00087
00088 struct e1000_info;
00089
00090 #define e_dbg(arg...) if (0) { printf (arg); };
00091
00092 #ifdef CONFIG_E1000E_MSIX
00093
00094 #define E1000E_INT_MODE_LEGACY 0
00095 #define E1000E_INT_MODE_MSI 1
00096 #define E1000E_INT_MODE_MSIX 2
00097
00098 #endif
00099 #ifndef CONFIG_E1000E_NAPI
00100 #define E1000_MAX_INTR 10
00101
00102 #endif
00103
00104 #define E1000_DEFAULT_TXD 256
00105 #define E1000_MAX_TXD 4096
00106 #define E1000_MIN_TXD 64
00107
00108 #define E1000_DEFAULT_RXD 256
00109 #define E1000_MAX_RXD 4096
00110 #define E1000_MIN_RXD 64
00111
00112 #define E1000_MIN_ITR_USECS 10
00113 #define E1000_MAX_ITR_USECS 10000
00114
00115
00116 #define E1000_ERT_2048 0x100
00117
00118 #define E1000_FC_PAUSE_TIME 0x0680
00119
00120
00121
00122 #define E1000_RX_BUFFER_WRITE 16
00123
00124 #define AUTO_ALL_MODES 0
00125 #define E1000_EEPROM_APME 0x0400
00126
00127 #define E1000_MNG_VLAN_NONE (-1)
00128
00129
00130 #define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1)
00131
00132 #define MAXIMUM_ETHERNET_VLAN_SIZE 1522
00133
00134 #define DEFAULT_JUMBO 9234
00135
00136 enum e1000_boards {
00137 board_82571,
00138 board_82572,
00139 board_82573,
00140 board_82574,
00141 board_80003es2lan,
00142 board_ich8lan,
00143 board_ich9lan,
00144 board_ich10lan,
00145 board_pchlan,
00146 board_82583,
00147 };
00148
00149
00150 struct e1000_adapter {
00151 const struct e1000_info *ei;
00152
00153
00154 struct net_device *netdev;
00155 struct pci_device *pdev;
00156 struct net_device_stats net_stats;
00157
00158
00159 struct e1000_hw hw;
00160
00161 struct e1000_phy_info phy_info;
00162
00163 u32 wol;
00164 u32 pba;
00165 u32 max_hw_frame_size;
00166
00167 bool fc_autoneg;
00168
00169 unsigned int flags;
00170 unsigned int flags2;
00171
00172 #define NUM_TX_DESC 8
00173 #define NUM_RX_DESC 8
00174
00175 struct io_buffer *tx_iobuf[NUM_TX_DESC];
00176 struct io_buffer *rx_iobuf[NUM_RX_DESC];
00177
00178 struct e1000_tx_desc *tx_base;
00179 struct e1000_rx_desc *rx_base;
00180
00181 uint32_t tx_ring_size;
00182 uint32_t rx_ring_size;
00183
00184 uint32_t tx_head;
00185 uint32_t tx_tail;
00186 uint32_t tx_fill_ctr;
00187
00188 uint32_t rx_curr;
00189
00190 uint32_t ioaddr;
00191 uint32_t irqno;
00192
00193 uint32_t tx_int_delay;
00194 uint32_t tx_abs_int_delay;
00195 uint32_t txd_cmd;
00196 };
00197
00198 struct e1000_info {
00199 enum e1000_mac_type mac;
00200 unsigned int flags;
00201 unsigned int flags2;
00202 u32 pba;
00203 u32 max_hw_frame_size;
00204 s32 (*get_variants)(struct e1000_adapter *);
00205 void (*init_ops)(struct e1000_hw *);
00206 };
00207
00208
00209 #define FLAG_HAS_AMT (1 << 0)
00210 #define FLAG_HAS_FLASH (1 << 1)
00211 #define FLAG_HAS_HW_VLAN_FILTER (1 << 2)
00212 #define FLAG_HAS_WOL (1 << 3)
00213 #define FLAG_HAS_ERT (1 << 4)
00214 #define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5)
00215 #define FLAG_HAS_SWSM_ON_LOAD (1 << 6)
00216 #define FLAG_HAS_JUMBO_FRAMES (1 << 7)
00217 #define FLAG_IS_ICH (1 << 9)
00218 #ifdef CONFIG_E1000E_MSIX
00219 #define FLAG_HAS_MSIX (1 << 10)
00220 #endif
00221 #define FLAG_HAS_SMART_POWER_DOWN (1 << 11)
00222 #define FLAG_IS_QUAD_PORT_A (1 << 12)
00223 #define FLAG_IS_QUAD_PORT (1 << 13)
00224 #define FLAG_TIPG_MEDIUM_FOR_80003ESLAN (1 << 14)
00225 #define FLAG_APME_IN_WUC (1 << 15)
00226 #define FLAG_APME_IN_CTRL3 (1 << 16)
00227 #define FLAG_APME_CHECK_PORT_B (1 << 17)
00228 #define FLAG_DISABLE_FC_PAUSE_TIME (1 << 18)
00229 #define FLAG_NO_WAKE_UCAST (1 << 19)
00230 #define FLAG_MNG_PT_ENABLED (1 << 20)
00231 #define FLAG_RESET_OVERWRITES_LAA (1 << 21)
00232 #define FLAG_TARC_SPEED_MODE_BIT (1 << 22)
00233 #define FLAG_TARC_SET_BIT_ZERO (1 << 23)
00234 #define FLAG_RX_NEEDS_RESTART (1 << 24)
00235 #define FLAG_LSC_GIG_SPEED_DROP (1 << 25)
00236 #define FLAG_SMART_POWER_DOWN (1 << 26)
00237 #define FLAG_MSI_ENABLED (1 << 27)
00238 #define FLAG_RX_CSUM_ENABLED (1 << 28)
00239 #define FLAG_TSO_FORCE (1 << 29)
00240 #define FLAG_RX_RESTART_NOW (1 << 30)
00241 #define FLAG_MSI_TEST_FAILED (1 << 31)
00242
00243
00244 #define FLAG2_CRC_STRIPPING (1 << 0)
00245 #define FLAG2_HAS_PHY_WAKEUP (1 << 1)
00246
00247 #define E1000_RX_DESC_PS(R, i) \
00248 (&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
00249 #define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i]))
00250 #define E1000_RX_DESC(R, i) E1000_GET_DESC(R, i, e1000_rx_desc)
00251 #define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc)
00252 #define E1000_CONTEXT_DESC(R, i) E1000_GET_DESC(R, i, e1000_context_desc)
00253
00254 enum e1000_state_t {
00255 __E1000E_TESTING,
00256 __E1000E_RESETTING,
00257 __E1000E_DOWN
00258 };
00259
00260 enum latency_range {
00261 lowest_latency = 0,
00262 low_latency = 1,
00263 bulk_latency = 2,
00264 latency_invalid = 255
00265 };
00266
00267 extern void e1000e_check_options(struct e1000_adapter *adapter);
00268
00269 extern void e1000e_reset(struct e1000_adapter *adapter);
00270 extern void e1000e_power_up_phy(struct e1000_adapter *adapter);
00271
00272 extern void e1000e_init_function_pointers_82571(struct e1000_hw *hw)
00273 __attribute__((weak));
00274 extern void e1000e_init_function_pointers_80003es2lan(struct e1000_hw *hw)
00275 __attribute__((weak));
00276 extern void e1000e_init_function_pointers_ich8lan(struct e1000_hw *hw)
00277 __attribute__((weak));
00278
00279 extern int e1000e_probe(struct pci_device *pdev,
00280 const struct pci_device_id *id __unused);
00281
00282 extern void e1000e_remove(struct pci_device *pdev);
00283
00284 extern s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num);
00285
00286 static inline s32 e1000e_commit_phy(struct e1000_hw *hw)
00287 {
00288 if (hw->phy.ops.commit)
00289 return hw->phy.ops.commit(hw);
00290
00291 return 0;
00292 }
00293
00294 extern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw);
00295
00296 extern bool e1000e_get_laa_state_82571(struct e1000_hw *hw);
00297 extern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state);
00298
00299 extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
00300 bool state);
00301 extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
00302 extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw);
00303 extern void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw);
00304
00305 extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw);
00306 extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw);
00307 extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw);
00308 extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw);
00309 extern s32 e1000e_led_on_generic(struct e1000_hw *hw);
00310 extern s32 e1000e_led_off_generic(struct e1000_hw *hw);
00311 extern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw);
00312 extern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex);
00313 extern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex);
00314 extern s32 e1000e_disable_pcie_master(struct e1000_hw *hw);
00315 extern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw);
00316 extern s32 e1000e_id_led_init(struct e1000_hw *hw);
00317 extern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw);
00318 extern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw);
00319 extern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw);
00320 extern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw);
00321 extern s32 e1000e_setup_link(struct e1000_hw *hw);
00322 static inline void e1000e_clear_vfta(struct e1000_hw *hw)
00323 {
00324 hw->mac.ops.clear_vfta(hw);
00325 }
00326 extern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
00327 extern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
00328 u8 *mc_addr_list,
00329 u32 mc_addr_count);
00330 extern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
00331 extern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw);
00332 extern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop);
00333 extern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw);
00334 extern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data);
00335 extern void e1000e_config_collision_dist(struct e1000_hw *hw);
00336 extern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw);
00337 extern s32 e1000e_force_mac_fc(struct e1000_hw *hw);
00338 extern s32 e1000e_blink_led(struct e1000_hw *hw);
00339 extern void e1000e_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
00340 static inline void e1000e_write_vfta(struct e1000_hw *hw, u32 offset, u32 value)
00341 {
00342 if (hw->mac.ops.write_vfta)
00343 hw->mac.ops.write_vfta(hw, offset, value);
00344 }
00345 extern void e1000e_reset_adaptive(struct e1000_hw *hw);
00346 extern void e1000e_update_adaptive(struct e1000_hw *hw);
00347
00348 extern s32 e1000e_setup_copper_link(struct e1000_hw *hw);
00349 extern void e1000e_put_hw_semaphore(struct e1000_hw *hw);
00350 extern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw);
00351 #if 0
00352 extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw);
00353 #endif
00354 #if 0
00355 extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw);
00356 #endif
00357 extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw);
00358 extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
00359 extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw);
00360 extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active);
00361 extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
00362 extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw);
00363 #if 0
00364 extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw);
00365 #endif
00366 extern s32 e1000e_get_cfg_done(struct e1000_hw *hw);
00367 #if 0
00368 extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw);
00369 #endif
00370 extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw);
00371 extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
00372 extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
00373 extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
00374 extern s32 e1000e_determine_phy_address(struct e1000_hw *hw);
00375 extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
00376 extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
00377 #if 0
00378 extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
00379 #endif
00380 extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
00381 extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
00382 extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
00383 u32 usec_interval, bool *success);
00384 extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
00385 extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
00386 extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
00387 extern s32 e1000e_check_downshift(struct e1000_hw *hw);
00388
00389 static inline s32 e1000e_phy_hw_reset(struct e1000_hw *hw)
00390 {
00391 if (hw->phy.ops.reset)
00392 return hw->phy.ops.reset(hw);
00393
00394 return 0;
00395 }
00396
00397 static inline s32 e1000e_check_reset_block(struct e1000_hw *hw)
00398 {
00399 if (hw->phy.ops.check_reset_block)
00400 return hw->phy.ops.check_reset_block(hw);
00401
00402 return 0;
00403 }
00404
00405 static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data)
00406 {
00407 if (hw->phy.ops.read_reg)
00408 return hw->phy.ops.read_reg(hw, offset, data);
00409
00410 return 0;
00411 }
00412
00413 static inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data)
00414 {
00415 if (hw->phy.ops.write_reg)
00416 return hw->phy.ops.write_reg(hw, offset, data);
00417
00418 return 0;
00419 }
00420
00421 #if 0
00422 static inline s32 e1000e_get_cable_length(struct e1000_hw *hw)
00423 {
00424 if (hw->phy.ops.get_cable_length)
00425 return hw->phy.ops.get_cable_length(hw);
00426
00427 return 0;
00428 }
00429 #endif
00430
00431 extern s32 e1000e_acquire_nvm(struct e1000_hw *hw);
00432 extern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
00433 extern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw);
00434 extern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
00435 extern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
00436 extern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw);
00437 extern void e1000e_release_nvm(struct e1000_hw *hw);
00438
00439 static inline s32 e1000e_read_mac_addr(struct e1000_hw *hw)
00440 {
00441 if (hw->mac.ops.read_mac_addr)
00442 return hw->mac.ops.read_mac_addr(hw);
00443
00444 return e1000e_read_mac_addr_generic(hw);
00445 }
00446
00447 static inline s32 e1000e_validate_nvm_checksum(struct e1000_hw *hw)
00448 {
00449 return hw->nvm.ops.validate(hw);
00450 }
00451
00452 static inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw)
00453 {
00454 return hw->nvm.ops.update(hw);
00455 }
00456
00457 static inline s32 e1000e_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
00458 {
00459 return hw->nvm.ops.read(hw, offset, words, data);
00460 }
00461
00462 static inline s32 e1000e_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
00463 {
00464 return hw->nvm.ops.write(hw, offset, words, data);
00465 }
00466
00467 static inline s32 e1000e_get_phy_info(struct e1000_hw *hw)
00468 {
00469 if (hw->phy.ops.get_info)
00470 return hw->phy.ops.get_info(hw);
00471
00472 return 0;
00473 }
00474
00475 extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);
00476 #if 0
00477 extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
00478 #endif
00479
00480 static inline u32 __er32(struct e1000_hw *hw, unsigned long reg)
00481 {
00482 return readl(hw->hw_addr + reg);
00483 }
00484
00485 static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
00486 {
00487 writel(val, hw->hw_addr + reg);
00488 }
00489
00490 #define er32(reg) __er32(hw, E1000_##reg)
00491 #define ew32(reg, val) __ew32(hw, E1000_##reg, (val))
00492 #define e1e_flush() er32(STATUS)
00493
00494 #define E1000_WRITE_REG(a, reg, value) \
00495 writel((value), ((a)->hw_addr + reg))
00496
00497 #define E1000_READ_REG(a, reg) (readl((a)->hw_addr + reg))
00498
00499 #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) \
00500 writel((value), ((a)->hw_addr + reg + ((offset) << 2)))
00501
00502 #define E1000_READ_REG_ARRAY(a, reg, offset) ( \
00503 readl((a)->hw_addr + reg + ((offset) << 2)))
00504
00505 #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
00506 #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
00507
00508 static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg)
00509 {
00510 return readw(hw->flash_address + reg);
00511 }
00512
00513 static inline u32 __er32flash(struct e1000_hw *hw, unsigned long reg)
00514 {
00515 return readl(hw->flash_address + reg);
00516 }
00517
00518 static inline void __ew16flash(struct e1000_hw *hw, unsigned long reg, u16 val)
00519 {
00520 writew(val, hw->flash_address + reg);
00521 }
00522
00523 static inline void __ew32flash(struct e1000_hw *hw, unsigned long reg, u32 val)
00524 {
00525 writel(val, hw->flash_address + reg);
00526 }
00527
00528 #define er16flash(reg) __er16flash(hw, (reg))
00529 #define er32flash(reg) __er32flash(hw, (reg))
00530 #define ew16flash(reg, val) __ew16flash(hw, (reg), (val))
00531 #define ew32flash(reg, val) __ew32flash(hw, (reg), (val))
00532
00533 #endif