e1000_defines.h File Reference

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Defines

#define REQ_TX_DESCRIPTOR_MULTIPLE   8
#define REQ_RX_DESCRIPTOR_MULTIPLE   8
#define E1000_WUC_APME   0x00000001
#define E1000_WUC_PME_EN   0x00000002
#define E1000_WUC_PME_STATUS   0x00000004
#define E1000_WUC_APMPME   0x00000008
#define E1000_WUC_LSCWE   0x00000010
#define E1000_WUC_LSCWO   0x00000020
#define E1000_WUC_SPM   0x80000000
#define E1000_WUC_PHY_WAKE   0x00000100
#define E1000_WUFC_LNKC   0x00000001
#define E1000_WUFC_MAG   0x00000002
#define E1000_WUFC_EX   0x00000004
#define E1000_WUFC_MC   0x00000008
#define E1000_WUFC_BC   0x00000010
#define E1000_WUFC_ARP   0x00000020
#define E1000_WUFC_IPV4   0x00000040
#define E1000_WUFC_IPV6   0x00000080
#define E1000_WUFC_IGNORE_TCO   0x00008000
#define E1000_WUFC_FLX0   0x00010000
#define E1000_WUFC_FLX1   0x00020000
#define E1000_WUFC_FLX2   0x00040000
#define E1000_WUFC_FLX3   0x00080000
#define E1000_WUFC_ALL_FILTERS   0x000F00FF
#define E1000_WUFC_FLX_OFFSET   16
#define E1000_WUFC_FLX_FILTERS   0x000F0000
#define E1000_WUS_LNKC   E1000_WUFC_LNKC
#define E1000_WUS_MAG   E1000_WUFC_MAG
#define E1000_WUS_EX   E1000_WUFC_EX
#define E1000_WUS_MC   E1000_WUFC_MC
#define E1000_WUS_BC   E1000_WUFC_BC
#define E1000_WUS_ARP   E1000_WUFC_ARP
#define E1000_WUS_IPV4   E1000_WUFC_IPV4
#define E1000_WUS_IPV6   E1000_WUFC_IPV6
#define E1000_WUS_FLX0   E1000_WUFC_FLX0
#define E1000_WUS_FLX1   E1000_WUFC_FLX1
#define E1000_WUS_FLX2   E1000_WUFC_FLX2
#define E1000_WUS_FLX3   E1000_WUFC_FLX3
#define E1000_WUS_FLX_FILTERS   E1000_WUFC_FLX_FILTERS
#define E1000_WUPL_LENGTH_MASK   0x0FFF
#define E1000_FLEXIBLE_FILTER_COUNT_MAX   4
#define E1000_FLEXIBLE_FILTER_SIZE_MAX   128
#define E1000_FFLT_SIZE   E1000_FLEXIBLE_FILTER_COUNT_MAX
#define E1000_FFMT_SIZE   E1000_FLEXIBLE_FILTER_SIZE_MAX
#define E1000_FFVT_SIZE   E1000_FLEXIBLE_FILTER_SIZE_MAX
#define E1000_CTRL_EXT_GPI0_EN   0x00000001
#define E1000_CTRL_EXT_GPI1_EN   0x00000002
#define E1000_CTRL_EXT_PHYINT_EN   E1000_CTRL_EXT_GPI1_EN
#define E1000_CTRL_EXT_GPI2_EN   0x00000004
#define E1000_CTRL_EXT_GPI3_EN   0x00000008
#define E1000_CTRL_EXT_SDP4_DATA   0x00000010
#define E1000_CTRL_EXT_SDP5_DATA   0x00000020
#define E1000_CTRL_EXT_PHY_INT   E1000_CTRL_EXT_SDP5_DATA
#define E1000_CTRL_EXT_SDP6_DATA   0x00000040
#define E1000_CTRL_EXT_SDP7_DATA   0x00000080
#define E1000_CTRL_EXT_SDP4_DIR   0x00000100
#define E1000_CTRL_EXT_SDP5_DIR   0x00000200
#define E1000_CTRL_EXT_SDP6_DIR   0x00000400
#define E1000_CTRL_EXT_SDP7_DIR   0x00000800
#define E1000_CTRL_EXT_ASDCHK   0x00001000
#define E1000_CTRL_EXT_EE_RST   0x00002000
#define E1000_CTRL_EXT_IPS   0x00004000
#define E1000_CTRL_EXT_SPD_BYPS   0x00008000
#define E1000_CTRL_EXT_RO_DIS   0x00020000
#define E1000_CTRL_EXT_DMA_DYN_CLK_EN   0x00080000
#define E1000_CTRL_EXT_LINK_MODE_MASK   0x00C00000
#define E1000_CTRL_EXT_LINK_MODE_GMII   0x00000000
#define E1000_CTRL_EXT_LINK_MODE_TBI   0x00C00000
#define E1000_CTRL_EXT_LINK_MODE_KMRN   0x00000000
#define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES   0x00C00000
#define E1000_CTRL_EXT_LINK_MODE_PCIX_SERDES   0x00800000
#define E1000_CTRL_EXT_LINK_MODE_SGMII   0x00800000
#define E1000_CTRL_EXT_EIAME   0x01000000
#define E1000_CTRL_EXT_IRCA   0x00000001
#define E1000_CTRL_EXT_WR_WMARK_MASK   0x03000000
#define E1000_CTRL_EXT_WR_WMARK_256   0x00000000
#define E1000_CTRL_EXT_WR_WMARK_320   0x01000000
#define E1000_CTRL_EXT_WR_WMARK_384   0x02000000
#define E1000_CTRL_EXT_WR_WMARK_448   0x03000000
#define E1000_CTRL_EXT_CANC   0x04000000
#define E1000_CTRL_EXT_DRV_LOAD   0x10000000
#define E1000_CTRL_EXT_IAME   0x08000000
#define E1000_CRTL_EXT_PB_PAREN   0x01000000
#define E1000_CTRL_EXT_DF_PAREN   0x02000000
#define E1000_CTRL_EXT_GHOST_PAREN   0x40000000
#define E1000_CTRL_EXT_PBA_CLR   0x80000000
#define E1000_I2CCMD_REG_ADDR_SHIFT   16
#define E1000_I2CCMD_REG_ADDR   0x00FF0000
#define E1000_I2CCMD_PHY_ADDR_SHIFT   24
#define E1000_I2CCMD_PHY_ADDR   0x07000000
#define E1000_I2CCMD_OPCODE_READ   0x08000000
#define E1000_I2CCMD_OPCODE_WRITE   0x00000000
#define E1000_I2CCMD_RESET   0x10000000
#define E1000_I2CCMD_READY   0x20000000
#define E1000_I2CCMD_INTERRUPT_ENA   0x40000000
#define E1000_I2CCMD_ERROR   0x80000000
#define E1000_MAX_SGMII_PHY_REG_ADDR   255
#define E1000_I2CCMD_PHY_TIMEOUT   200
#define E1000_RXD_STAT_DD   0x01
#define E1000_RXD_STAT_EOP   0x02
#define E1000_RXD_STAT_IXSM   0x04
#define E1000_RXD_STAT_VP   0x08
#define E1000_RXD_STAT_UDPCS   0x10
#define E1000_RXD_STAT_TCPCS   0x20
#define E1000_RXD_STAT_IPCS   0x40
#define E1000_RXD_STAT_PIF   0x80
#define E1000_RXD_STAT_CRCV   0x100
#define E1000_RXD_STAT_IPIDV   0x200
#define E1000_RXD_STAT_UDPV   0x400
#define E1000_RXD_STAT_DYNINT   0x800
#define E1000_RXD_STAT_ACK   0x8000
#define E1000_RXD_ERR_CE   0x01
#define E1000_RXD_ERR_SE   0x02
#define E1000_RXD_ERR_SEQ   0x04
#define E1000_RXD_ERR_CXE   0x10
#define E1000_RXD_ERR_TCPE   0x20
#define E1000_RXD_ERR_IPE   0x40
#define E1000_RXD_ERR_RXE   0x80
#define E1000_RXD_SPC_VLAN_MASK   0x0FFF
#define E1000_RXD_SPC_PRI_MASK   0xE000
#define E1000_RXD_SPC_PRI_SHIFT   13
#define E1000_RXD_SPC_CFI_MASK   0x1000
#define E1000_RXD_SPC_CFI_SHIFT   12
#define E1000_RXDEXT_STATERR_CE   0x01000000
#define E1000_RXDEXT_STATERR_SE   0x02000000
#define E1000_RXDEXT_STATERR_SEQ   0x04000000
#define E1000_RXDEXT_STATERR_CXE   0x10000000
#define E1000_RXDEXT_STATERR_TCPE   0x20000000
#define E1000_RXDEXT_STATERR_IPE   0x40000000
#define E1000_RXDEXT_STATERR_RXE   0x80000000
#define E1000_RXD_ERR_FRAME_ERR_MASK
#define E1000_RXDEXT_ERR_FRAME_ERR_MASK
#define E1000_MRQC_ENABLE_MASK   0x00000007
#define E1000_MRQC_ENABLE_RSS_2Q   0x00000001
#define E1000_MRQC_ENABLE_RSS_INT   0x00000004
#define E1000_MRQC_RSS_FIELD_MASK   0xFFFF0000
#define E1000_MRQC_RSS_FIELD_IPV4_TCP   0x00010000
#define E1000_MRQC_RSS_FIELD_IPV4   0x00020000
#define E1000_MRQC_RSS_FIELD_IPV6_TCP_EX   0x00040000
#define E1000_MRQC_RSS_FIELD_IPV6_EX   0x00080000
#define E1000_MRQC_RSS_FIELD_IPV6   0x00100000
#define E1000_MRQC_RSS_FIELD_IPV6_TCP   0x00200000
#define E1000_RXDPS_HDRSTAT_HDRSP   0x00008000
#define E1000_RXDPS_HDRSTAT_HDRLEN_MASK   0x000003FF
#define E1000_MANC_SMBUS_EN   0x00000001
#define E1000_MANC_ASF_EN   0x00000002
#define E1000_MANC_R_ON_FORCE   0x00000004
#define E1000_MANC_RMCP_EN   0x00000100
#define E1000_MANC_0298_EN   0x00000200
#define E1000_MANC_IPV4_EN   0x00000400
#define E1000_MANC_IPV6_EN   0x00000800
#define E1000_MANC_SNAP_EN   0x00001000
#define E1000_MANC_ARP_EN   0x00002000
#define E1000_MANC_NEIGHBOR_EN   0x00004000
#define E1000_MANC_ARP_RES_EN   0x00008000
#define E1000_MANC_TCO_RESET   0x00010000
#define E1000_MANC_RCV_TCO_EN   0x00020000
#define E1000_MANC_REPORT_STATUS   0x00040000
#define E1000_MANC_RCV_ALL   0x00080000
#define E1000_MANC_BLK_PHY_RST_ON_IDE   0x00040000
#define E1000_MANC_EN_MAC_ADDR_FILTER   0x00100000
#define E1000_MANC_EN_MNG2HOST   0x00200000
#define E1000_MANC_EN_IP_ADDR_FILTER   0x00400000
#define E1000_MANC_EN_XSUM_FILTER   0x00800000
#define E1000_MANC_BR_EN   0x01000000
#define E1000_MANC_SMB_REQ   0x01000000
#define E1000_MANC_SMB_GNT   0x02000000
#define E1000_MANC_SMB_CLK_IN   0x04000000
#define E1000_MANC_SMB_DATA_IN   0x08000000
#define E1000_MANC_SMB_DATA_OUT   0x10000000
#define E1000_MANC_SMB_CLK_OUT   0x20000000
#define E1000_MANC_SMB_DATA_OUT_SHIFT   28
#define E1000_MANC_SMB_CLK_OUT_SHIFT   29
#define E1000_RCTL_RST   0x00000001
#define E1000_RCTL_EN   0x00000002
#define E1000_RCTL_SBP   0x00000004
#define E1000_RCTL_UPE   0x00000008
#define E1000_RCTL_MPE   0x00000010
#define E1000_RCTL_LPE   0x00000020
#define E1000_RCTL_LBM_NO   0x00000000
#define E1000_RCTL_LBM_MAC   0x00000040
#define E1000_RCTL_LBM_SLP   0x00000080
#define E1000_RCTL_LBM_TCVR   0x000000C0
#define E1000_RCTL_DTYP_MASK   0x00000C00
#define E1000_RCTL_DTYP_PS   0x00000400
#define E1000_RCTL_RDMTS_HALF   0x00000000
#define E1000_RCTL_RDMTS_QUAT   0x00000100
#define E1000_RCTL_RDMTS_EIGTH   0x00000200
#define E1000_RCTL_MO_SHIFT   12
#define E1000_RCTL_MO_0   0x00000000
#define E1000_RCTL_MO_1   0x00001000
#define E1000_RCTL_MO_2   0x00002000
#define E1000_RCTL_MO_3   0x00003000
#define E1000_RCTL_MDR   0x00004000
#define E1000_RCTL_BAM   0x00008000
#define E1000_RCTL_SZ_2048   0x00000000
#define E1000_RCTL_SZ_1024   0x00010000
#define E1000_RCTL_SZ_512   0x00020000
#define E1000_RCTL_SZ_256   0x00030000
#define E1000_RCTL_SZ_16384   0x00010000
#define E1000_RCTL_SZ_8192   0x00020000
#define E1000_RCTL_SZ_4096   0x00030000
#define E1000_RCTL_VFE   0x00040000
#define E1000_RCTL_CFIEN   0x00080000
#define E1000_RCTL_CFI   0x00100000
#define E1000_RCTL_DPF   0x00400000
#define E1000_RCTL_PMCF   0x00800000
#define E1000_RCTL_BSEX   0x02000000
#define E1000_RCTL_SECRC   0x04000000
#define E1000_RCTL_FLXBUF_MASK   0x78000000
#define E1000_RCTL_FLXBUF_SHIFT   27
#define E1000_PSRCTL_BSIZE0_MASK   0x0000007F
#define E1000_PSRCTL_BSIZE1_MASK   0x00003F00
#define E1000_PSRCTL_BSIZE2_MASK   0x003F0000
#define E1000_PSRCTL_BSIZE3_MASK   0x3F000000
#define E1000_PSRCTL_BSIZE0_SHIFT   7
#define E1000_PSRCTL_BSIZE1_SHIFT   2
#define E1000_PSRCTL_BSIZE2_SHIFT   6
#define E1000_PSRCTL_BSIZE3_SHIFT   14
#define E1000_SWFW_EEP_SM   0x01
#define E1000_SWFW_PHY0_SM   0x02
#define E1000_SWFW_PHY1_SM   0x04
#define E1000_SWFW_CSR_SM   0x08
#define E1000_FACTPS_LFS   0x40000000
#define E1000_CTRL_FD   0x00000001
#define E1000_CTRL_BEM   0x00000002
#define E1000_CTRL_PRIOR   0x00000004
#define E1000_CTRL_GIO_MASTER_DISABLE   0x00000004
#define E1000_CTRL_LRST   0x00000008
#define E1000_CTRL_TME   0x00000010
#define E1000_CTRL_SLE   0x00000020
#define E1000_CTRL_ASDE   0x00000020
#define E1000_CTRL_SLU   0x00000040
#define E1000_CTRL_ILOS   0x00000080
#define E1000_CTRL_SPD_SEL   0x00000300
#define E1000_CTRL_SPD_10   0x00000000
#define E1000_CTRL_SPD_100   0x00000100
#define E1000_CTRL_SPD_1000   0x00000200
#define E1000_CTRL_BEM32   0x00000400
#define E1000_CTRL_FRCSPD   0x00000800
#define E1000_CTRL_FRCDPX   0x00001000
#define E1000_CTRL_D_UD_EN   0x00002000
#define E1000_CTRL_D_UD_POLARITY   0x00004000
#define E1000_CTRL_FORCE_PHY_RESET   0x00008000
#define E1000_CTRL_EXT_LINK_EN   0x00010000
#define E1000_CTRL_SWDPIN0   0x00040000
#define E1000_CTRL_SWDPIN1   0x00080000
#define E1000_CTRL_SWDPIN2   0x00100000
#define E1000_CTRL_SWDPIN3   0x00200000
#define E1000_CTRL_SWDPIO0   0x00400000
#define E1000_CTRL_SWDPIO1   0x00800000
#define E1000_CTRL_SWDPIO2   0x01000000
#define E1000_CTRL_SWDPIO3   0x02000000
#define E1000_CTRL_RST   0x04000000
#define E1000_CTRL_RFCE   0x08000000
#define E1000_CTRL_TFCE   0x10000000
#define E1000_CTRL_RTE   0x20000000
#define E1000_CTRL_VME   0x40000000
#define E1000_CTRL_PHY_RST   0x80000000
#define E1000_CTRL_SW2FW_INT   0x02000000
#define E1000_CTRL_I2C_ENA   0x02000000
#define E1000_CTRL_PHY_RESET_DIR   E1000_CTRL_SWDPIO0
#define E1000_CTRL_PHY_RESET   E1000_CTRL_SWDPIN0
#define E1000_CTRL_MDIO_DIR   E1000_CTRL_SWDPIO2
#define E1000_CTRL_MDIO   E1000_CTRL_SWDPIN2
#define E1000_CTRL_MDC_DIR   E1000_CTRL_SWDPIO3
#define E1000_CTRL_MDC   E1000_CTRL_SWDPIN3
#define E1000_CTRL_PHY_RESET_DIR4   E1000_CTRL_EXT_SDP4_DIR
#define E1000_CTRL_PHY_RESET4   E1000_CTRL_EXT_SDP4_DATA
#define E1000_CONNSW_ENRGSRC   0x4
#define E1000_PCS_CFG_PCS_EN   8
#define E1000_PCS_LCTL_FLV_LINK_UP   1
#define E1000_PCS_LCTL_FSV_10   0
#define E1000_PCS_LCTL_FSV_100   2
#define E1000_PCS_LCTL_FSV_1000   4
#define E1000_PCS_LCTL_FDV_FULL   8
#define E1000_PCS_LCTL_FSD   0x10
#define E1000_PCS_LCTL_FORCE_LINK   0x20
#define E1000_PCS_LCTL_LOW_LINK_LATCH   0x40
#define E1000_PCS_LCTL_FORCE_FCTRL   0x80
#define E1000_PCS_LCTL_AN_ENABLE   0x10000
#define E1000_PCS_LCTL_AN_RESTART   0x20000
#define E1000_PCS_LCTL_AN_TIMEOUT   0x40000
#define E1000_PCS_LCTL_AN_SGMII_BYPASS   0x80000
#define E1000_PCS_LCTL_AN_SGMII_TRIGGER   0x100000
#define E1000_PCS_LCTL_FAST_LINK_TIMER   0x1000000
#define E1000_PCS_LCTL_LINK_OK_FIX   0x2000000
#define E1000_PCS_LCTL_CRS_ON_NI   0x4000000
#define E1000_ENABLE_SERDES_LOOPBACK   0x0410
#define E1000_PCS_LSTS_LINK_OK   1
#define E1000_PCS_LSTS_SPEED_10   0
#define E1000_PCS_LSTS_SPEED_100   2
#define E1000_PCS_LSTS_SPEED_1000   4
#define E1000_PCS_LSTS_DUPLEX_FULL   8
#define E1000_PCS_LSTS_SYNK_OK   0x10
#define E1000_PCS_LSTS_AN_COMPLETE   0x10000
#define E1000_PCS_LSTS_AN_PAGE_RX   0x20000
#define E1000_PCS_LSTS_AN_TIMED_OUT   0x40000
#define E1000_PCS_LSTS_AN_REMOTE_FAULT   0x80000
#define E1000_PCS_LSTS_AN_ERROR_RWS   0x100000
#define E1000_STATUS_FD   0x00000001
#define E1000_STATUS_LU   0x00000002
#define E1000_STATUS_FUNC_MASK   0x0000000C
#define E1000_STATUS_FUNC_SHIFT   2
#define E1000_STATUS_FUNC_0   0x00000000
#define E1000_STATUS_FUNC_1   0x00000004
#define E1000_STATUS_TXOFF   0x00000010
#define E1000_STATUS_TBIMODE   0x00000020
#define E1000_STATUS_SPEED_MASK   0x000000C0
#define E1000_STATUS_SPEED_10   0x00000000
#define E1000_STATUS_SPEED_100   0x00000040
#define E1000_STATUS_SPEED_1000   0x00000080
#define E1000_STATUS_LAN_INIT_DONE   0x00000200
#define E1000_STATUS_ASDV   0x00000300
#define E1000_STATUS_PHYRA   0x00000400
#define E1000_STATUS_DOCK_CI   0x00000800
#define E1000_STATUS_GIO_MASTER_ENABLE   0x00080000
#define E1000_STATUS_MTXCKOK   0x00000400
#define E1000_STATUS_PCI66   0x00000800
#define E1000_STATUS_BUS64   0x00001000
#define E1000_STATUS_PCIX_MODE   0x00002000
#define E1000_STATUS_PCIX_SPEED   0x0000C000
#define E1000_STATUS_BMC_SKU_0   0x00100000
#define E1000_STATUS_BMC_SKU_1   0x00200000
#define E1000_STATUS_BMC_SKU_2   0x00400000
#define E1000_STATUS_BMC_CRYPTO   0x00800000
#define E1000_STATUS_BMC_LITE   0x01000000
#define E1000_STATUS_RGMII_ENABLE   0x02000000
#define E1000_STATUS_FUSE_8   0x04000000
#define E1000_STATUS_FUSE_9   0x08000000
#define E1000_STATUS_SERDES0_DIS   0x10000000
#define E1000_STATUS_SERDES1_DIS   0x20000000
#define E1000_STATUS_PCIX_SPEED_66   0x00000000
#define E1000_STATUS_PCIX_SPEED_100   0x00004000
#define E1000_STATUS_PCIX_SPEED_133   0x00008000
#define SPEED_10   10
#define SPEED_100   100
#define SPEED_1000   1000
#define HALF_DUPLEX   1
#define FULL_DUPLEX   2
#define PHY_FORCE_TIME   20
#define ADVERTISE_10_HALF   0x0001
#define ADVERTISE_10_FULL   0x0002
#define ADVERTISE_100_HALF   0x0004
#define ADVERTISE_100_FULL   0x0008
#define ADVERTISE_1000_HALF   0x0010
#define ADVERTISE_1000_FULL   0x0020
#define E1000_ALL_SPEED_DUPLEX
#define E1000_ALL_NOT_GIG
#define E1000_ALL_100_SPEED   (ADVERTISE_100_HALF | ADVERTISE_100_FULL)
#define E1000_ALL_10_SPEED   (ADVERTISE_10_HALF | ADVERTISE_10_FULL)
#define E1000_ALL_FULL_DUPLEX
#define E1000_ALL_HALF_DUPLEX   (ADVERTISE_10_HALF | ADVERTISE_100_HALF)
#define AUTONEG_ADVERTISE_SPEED_DEFAULT   E1000_ALL_SPEED_DUPLEX
#define E1000_LEDCTL_LED0_MODE_MASK   0x0000000F
#define E1000_LEDCTL_LED0_MODE_SHIFT   0
#define E1000_LEDCTL_LED0_BLINK_RATE   0x00000020
#define E1000_LEDCTL_LED0_IVRT   0x00000040
#define E1000_LEDCTL_LED0_BLINK   0x00000080
#define E1000_LEDCTL_LED1_MODE_MASK   0x00000F00
#define E1000_LEDCTL_LED1_MODE_SHIFT   8
#define E1000_LEDCTL_LED1_BLINK_RATE   0x00002000
#define E1000_LEDCTL_LED1_IVRT   0x00004000
#define E1000_LEDCTL_LED1_BLINK   0x00008000
#define E1000_LEDCTL_LED2_MODE_MASK   0x000F0000
#define E1000_LEDCTL_LED2_MODE_SHIFT   16
#define E1000_LEDCTL_LED2_BLINK_RATE   0x00200000
#define E1000_LEDCTL_LED2_IVRT   0x00400000
#define E1000_LEDCTL_LED2_BLINK   0x00800000
#define E1000_LEDCTL_LED3_MODE_MASK   0x0F000000
#define E1000_LEDCTL_LED3_MODE_SHIFT   24
#define E1000_LEDCTL_LED3_BLINK_RATE   0x20000000
#define E1000_LEDCTL_LED3_IVRT   0x40000000
#define E1000_LEDCTL_LED3_BLINK   0x80000000
#define E1000_LEDCTL_MODE_LINK_10_1000   0x0
#define E1000_LEDCTL_MODE_LINK_100_1000   0x1
#define E1000_LEDCTL_MODE_LINK_UP   0x2
#define E1000_LEDCTL_MODE_ACTIVITY   0x3
#define E1000_LEDCTL_MODE_LINK_ACTIVITY   0x4
#define E1000_LEDCTL_MODE_LINK_10   0x5
#define E1000_LEDCTL_MODE_LINK_100   0x6
#define E1000_LEDCTL_MODE_LINK_1000   0x7
#define E1000_LEDCTL_MODE_PCIX_MODE   0x8
#define E1000_LEDCTL_MODE_FULL_DUPLEX   0x9
#define E1000_LEDCTL_MODE_COLLISION   0xA
#define E1000_LEDCTL_MODE_BUS_SPEED   0xB
#define E1000_LEDCTL_MODE_BUS_SIZE   0xC
#define E1000_LEDCTL_MODE_PAUSED   0xD
#define E1000_LEDCTL_MODE_LED_ON   0xE
#define E1000_LEDCTL_MODE_LED_OFF   0xF
#define E1000_TXD_DTYP_D   0x00100000
#define E1000_TXD_DTYP_C   0x00000000
#define E1000_TXD_POPTS_SHIFT   8
#define E1000_TXD_POPTS_IXSM   0x01
#define E1000_TXD_POPTS_TXSM   0x02
#define E1000_TXD_CMD_EOP   0x01000000
#define E1000_TXD_CMD_IFCS   0x02000000
#define E1000_TXD_CMD_IC   0x04000000
#define E1000_TXD_CMD_RS   0x08000000
#define E1000_TXD_CMD_RPS   0x10000000
#define E1000_TXD_CMD_DEXT   0x20000000
#define E1000_TXD_CMD_VLE   0x40000000
#define E1000_TXD_CMD_IDE   0x80000000
#define E1000_TXD_STAT_DD   0x00000001
#define E1000_TXD_STAT_EC   0x00000002
#define E1000_TXD_STAT_LC   0x00000004
#define E1000_TXD_STAT_TU   0x00000008
#define E1000_TXD_CMD_TCP   0x01000000
#define E1000_TXD_CMD_IP   0x02000000
#define E1000_TXD_CMD_TSE   0x04000000
#define E1000_TXD_STAT_TC   0x00000004
#define E1000_TCTL_RST   0x00000001
#define E1000_TCTL_EN   0x00000002
#define E1000_TCTL_BCE   0x00000004
#define E1000_TCTL_PSP   0x00000008
#define E1000_TCTL_CT   0x00000ff0
#define E1000_TCTL_COLD   0x003ff000
#define E1000_TCTL_SWXOFF   0x00400000
#define E1000_TCTL_PBE   0x00800000
#define E1000_TCTL_RTLC   0x01000000
#define E1000_TCTL_NRTU   0x02000000
#define E1000_TCTL_MULR   0x10000000
#define E1000_TARC0_ENABLE   0x00000400
#define E1000_SCTL_DISABLE_SERDES_LOOPBACK   0x0400
#define E1000_RXCSUM_PCSS_MASK   0x000000FF
#define E1000_RXCSUM_IPOFL   0x00000100
#define E1000_RXCSUM_TUOFL   0x00000200
#define E1000_RXCSUM_IPV6OFL   0x00000400
#define E1000_RXCSUM_CRCOFL   0x00000800
#define E1000_RXCSUM_IPPCSE   0x00001000
#define E1000_RXCSUM_PCSD   0x00002000
#define E1000_RFCTL_ISCSI_DIS   0x00000001
#define E1000_RFCTL_ISCSI_DWC_MASK   0x0000003E
#define E1000_RFCTL_ISCSI_DWC_SHIFT   1
#define E1000_RFCTL_NFSW_DIS   0x00000040
#define E1000_RFCTL_NFSR_DIS   0x00000080
#define E1000_RFCTL_NFS_VER_MASK   0x00000300
#define E1000_RFCTL_NFS_VER_SHIFT   8
#define E1000_RFCTL_IPV6_DIS   0x00000400
#define E1000_RFCTL_IPV6_XSUM_DIS   0x00000800
#define E1000_RFCTL_ACK_DIS   0x00001000
#define E1000_RFCTL_ACKD_DIS   0x00002000
#define E1000_RFCTL_IPFRSP_DIS   0x00004000
#define E1000_RFCTL_EXTEN   0x00008000
#define E1000_RFCTL_IPV6_EX_DIS   0x00010000
#define E1000_RFCTL_NEW_IPV6_EXT_DIS   0x00020000
#define E1000_RFCTL_LEF   0x00040000
#define E1000_COLLISION_THRESHOLD   15
#define E1000_CT_SHIFT   4
#define E1000_COLLISION_DISTANCE   63
#define E1000_COLD_SHIFT   12
#define DEFAULT_82542_TIPG_IPGT   10
#define DEFAULT_82543_TIPG_IPGT_FIBER   9
#define DEFAULT_82543_TIPG_IPGT_COPPER   8
#define E1000_TIPG_IPGT_MASK   0x000003FF
#define E1000_TIPG_IPGR1_MASK   0x000FFC00
#define E1000_TIPG_IPGR2_MASK   0x3FF00000
#define DEFAULT_82542_TIPG_IPGR1   2
#define DEFAULT_82543_TIPG_IPGR1   8
#define E1000_TIPG_IPGR1_SHIFT   10
#define DEFAULT_82542_TIPG_IPGR2   10
#define DEFAULT_82543_TIPG_IPGR2   6
#define DEFAULT_80003ES2LAN_TIPG_IPGR2   7
#define E1000_TIPG_IPGR2_SHIFT   20
#define ETHERNET_IEEE_VLAN_TYPE   0x8100
#define ETHERNET_FCS_SIZE   4
#define MAX_JUMBO_FRAME_SIZE   0x3F00
#define E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP   0x00000020
#define E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE   0x00000001
#define E1000_EXTCNF_CTRL_SWFLAG   0x00000020
#define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK   0x00FF0000
#define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT   16
#define E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK   0x0FFF0000
#define E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT   16
#define E1000_PHY_CTRL_SPD_EN   0x00000001
#define E1000_PHY_CTRL_D0A_LPLU   0x00000002
#define E1000_PHY_CTRL_NOND0A_LPLU   0x00000004
#define E1000_PHY_CTRL_NOND0A_GBE_DISABLE   0x00000008
#define E1000_PHY_CTRL_GBE_DISABLE   0x00000040
#define E1000_KABGTXD_BGSQLBIAS   0x00050000
#define E1000_PBA_6K   0x0006
#define E1000_PBA_8K   0x0008
#define E1000_PBA_10K   0x000A
#define E1000_PBA_12K   0x000C
#define E1000_PBA_14K   0x000E
#define E1000_PBA_16K   0x0010
#define E1000_PBA_18K   0x0012
#define E1000_PBA_20K   0x0014
#define E1000_PBA_22K   0x0016
#define E1000_PBA_24K   0x0018
#define E1000_PBA_26K   0x001A
#define E1000_PBA_30K   0x001E
#define E1000_PBA_32K   0x0020
#define E1000_PBA_34K   0x0022
#define E1000_PBA_35K   0x0023
#define E1000_PBA_38K   0x0026
#define E1000_PBA_40K   0x0028
#define E1000_PBA_48K   0x0030
#define E1000_PBA_64K   0x0040
#define E1000_PBS_16K   E1000_PBA_16K
#define E1000_PBS_24K   E1000_PBA_24K
#define IFS_MAX   80
#define IFS_MIN   40
#define IFS_RATIO   4
#define IFS_STEP   10
#define MIN_NUM_XMITS   1000
#define E1000_SWSM_SMBI   0x00000001
#define E1000_SWSM_SWESMBI   0x00000002
#define E1000_SWSM_WMNG   0x00000004
#define E1000_SWSM_DRV_LOAD   0x00000008
#define E1000_SWSM2_LOCK   0x00000002
#define E1000_ICR_TXDW   0x00000001
#define E1000_ICR_TXQE   0x00000002
#define E1000_ICR_LSC   0x00000004
#define E1000_ICR_RXSEQ   0x00000008
#define E1000_ICR_RXDMT0   0x00000010
#define E1000_ICR_RXO   0x00000040
#define E1000_ICR_RXT0   0x00000080
#define E1000_ICR_VMMB   0x00000100
#define E1000_ICR_MDAC   0x00000200
#define E1000_ICR_RXCFG   0x00000400
#define E1000_ICR_GPI_EN0   0x00000800
#define E1000_ICR_GPI_EN1   0x00001000
#define E1000_ICR_GPI_EN2   0x00002000
#define E1000_ICR_GPI_EN3   0x00004000
#define E1000_ICR_TXD_LOW   0x00008000
#define E1000_ICR_SRPD   0x00010000
#define E1000_ICR_ACK   0x00020000
#define E1000_ICR_MNG   0x00040000
#define E1000_ICR_DOCK   0x00080000
#define E1000_ICR_INT_ASSERTED   0x80000000
#define E1000_ICR_RXD_FIFO_PAR0   0x00100000
#define E1000_ICR_TXD_FIFO_PAR0   0x00200000
#define E1000_ICR_HOST_ARB_PAR   0x00400000
#define E1000_ICR_PB_PAR   0x00800000
#define E1000_ICR_RXD_FIFO_PAR1   0x01000000
#define E1000_ICR_TXD_FIFO_PAR1   0x02000000
#define E1000_ICR_ALL_PARITY   0x03F00000
#define E1000_ICR_DSW   0x00000020
#define E1000_ICR_PHYINT   0x00001000
#define E1000_ICR_DOUTSYNC   0x10000000
#define E1000_ICR_EPRST   0x00100000
#define POLL_IMS_ENABLE_MASK
#define IMS_ENABLE_MASK
#define E1000_IMS_TXDW   E1000_ICR_TXDW
#define E1000_IMS_TXQE   E1000_ICR_TXQE
#define E1000_IMS_LSC   E1000_ICR_LSC
#define E1000_IMS_VMMB   E1000_ICR_VMMB
#define E1000_IMS_RXSEQ   E1000_ICR_RXSEQ
#define E1000_IMS_RXDMT0   E1000_ICR_RXDMT0
#define E1000_IMS_RXO   E1000_ICR_RXO
#define E1000_IMS_RXT0   E1000_ICR_RXT0
#define E1000_IMS_MDAC   E1000_ICR_MDAC
#define E1000_IMS_RXCFG   E1000_ICR_RXCFG
#define E1000_IMS_GPI_EN0   E1000_ICR_GPI_EN0
#define E1000_IMS_GPI_EN1   E1000_ICR_GPI_EN1
#define E1000_IMS_GPI_EN2   E1000_ICR_GPI_EN2
#define E1000_IMS_GPI_EN3   E1000_ICR_GPI_EN3
#define E1000_IMS_TXD_LOW   E1000_ICR_TXD_LOW
#define E1000_IMS_SRPD   E1000_ICR_SRPD
#define E1000_IMS_ACK   E1000_ICR_ACK
#define E1000_IMS_MNG   E1000_ICR_MNG
#define E1000_IMS_DOCK   E1000_ICR_DOCK
#define E1000_IMS_RXD_FIFO_PAR0   E1000_ICR_RXD_FIFO_PAR0
#define E1000_IMS_TXD_FIFO_PAR0   E1000_ICR_TXD_FIFO_PAR0
#define E1000_IMS_HOST_ARB_PAR   E1000_ICR_HOST_ARB_PAR
#define E1000_IMS_PB_PAR   E1000_ICR_PB_PAR
#define E1000_IMS_RXD_FIFO_PAR1   E1000_ICR_RXD_FIFO_PAR1
#define E1000_IMS_TXD_FIFO_PAR1   E1000_ICR_TXD_FIFO_PAR1
#define E1000_IMS_DSW   E1000_ICR_DSW
#define E1000_IMS_PHYINT   E1000_ICR_PHYINT
#define E1000_IMS_DOUTSYNC   E1000_ICR_DOUTSYNC
#define E1000_IMS_EPRST   E1000_ICR_EPRST
#define E1000_ICS_TXDW   E1000_ICR_TXDW
#define E1000_ICS_TXQE   E1000_ICR_TXQE
#define E1000_ICS_LSC   E1000_ICR_LSC
#define E1000_ICS_RXSEQ   E1000_ICR_RXSEQ
#define E1000_ICS_RXDMT0   E1000_ICR_RXDMT0
#define E1000_ICS_RXO   E1000_ICR_RXO
#define E1000_ICS_RXT0   E1000_ICR_RXT0
#define E1000_ICS_MDAC   E1000_ICR_MDAC
#define E1000_ICS_RXCFG   E1000_ICR_RXCFG
#define E1000_ICS_GPI_EN0   E1000_ICR_GPI_EN0
#define E1000_ICS_GPI_EN1   E1000_ICR_GPI_EN1
#define E1000_ICS_GPI_EN2   E1000_ICR_GPI_EN2
#define E1000_ICS_GPI_EN3   E1000_ICR_GPI_EN3
#define E1000_ICS_TXD_LOW   E1000_ICR_TXD_LOW
#define E1000_ICS_SRPD   E1000_ICR_SRPD
#define E1000_ICS_ACK   E1000_ICR_ACK
#define E1000_ICS_MNG   E1000_ICR_MNG
#define E1000_ICS_DOCK   E1000_ICR_DOCK
#define E1000_ICS_RXD_FIFO_PAR0   E1000_ICR_RXD_FIFO_PAR0
#define E1000_ICS_TXD_FIFO_PAR0   E1000_ICR_TXD_FIFO_PAR0
#define E1000_ICS_HOST_ARB_PAR   E1000_ICR_HOST_ARB_PAR
#define E1000_ICS_PB_PAR   E1000_ICR_PB_PAR
#define E1000_ICS_RXD_FIFO_PAR1   E1000_ICR_RXD_FIFO_PAR1
#define E1000_ICS_TXD_FIFO_PAR1   E1000_ICR_TXD_FIFO_PAR1
#define E1000_ICS_DSW   E1000_ICR_DSW
#define E1000_ICS_DOUTSYNC   E1000_ICR_DOUTSYNC
#define E1000_ICS_PHYINT   E1000_ICR_PHYINT
#define E1000_ICS_EPRST   E1000_ICR_EPRST
#define E1000_TXDCTL_PTHRESH   0x0000003F
#define E1000_TXDCTL_HTHRESH   0x00003F00
#define E1000_TXDCTL_WTHRESH   0x003F0000
#define E1000_TXDCTL_GRAN   0x01000000
#define E1000_TXDCTL_LWTHRESH   0xFE000000
#define E1000_TXDCTL_FULL_TX_DESC_WB   0x01010000
#define E1000_TXDCTL_MAX_TX_DESC_PREFETCH   0x0100001F
#define E1000_TXDCTL_COUNT_DESC   0x00400000
#define FLOW_CONTROL_ADDRESS_LOW   0x00C28001
#define FLOW_CONTROL_ADDRESS_HIGH   0x00000100
#define FLOW_CONTROL_TYPE   0x8808
#define VLAN_TAG_SIZE   4
#define E1000_VLAN_FILTER_TBL_SIZE   128
#define E1000_RAR_ENTRIES   15
#define E1000_RAH_AV   0x80000000
#define E1000_RAL_MAC_ADDR_LEN   4
#define E1000_RAH_MAC_ADDR_LEN   2
#define E1000_RAH_POOL_MASK   0x03FC0000
#define E1000_RAH_POOL_1   0x00040000
#define E1000_SUCCESS   0
#define E1000_ERR_NVM   1
#define E1000_ERR_PHY   2
#define E1000_ERR_CONFIG   3
#define E1000_ERR_PARAM   4
#define E1000_ERR_MAC_INIT   5
#define E1000_ERR_PHY_TYPE   6
#define E1000_ERR_RESET   9
#define E1000_ERR_MASTER_REQUESTS_PENDING   10
#define E1000_ERR_HOST_INTERFACE_COMMAND   11
#define E1000_BLK_PHY_RESET   12
#define E1000_ERR_SWFW_SYNC   13
#define E1000_NOT_IMPLEMENTED   14
#define E1000_ERR_MBX   15
#define FIBER_LINK_UP_LIMIT   50
#define COPPER_LINK_UP_LIMIT   10
#define PHY_AUTO_NEG_LIMIT   45
#define PHY_FORCE_LIMIT   20
#define MASTER_DISABLE_TIMEOUT   800
#define PHY_CFG_TIMEOUT   100
#define MDIO_OWNERSHIP_TIMEOUT   10
#define AUTO_READ_DONE_TIMEOUT   10
#define E1000_FCRTH_RTH   0x0000FFF8
#define E1000_FCRTH_XFCE   0x80000000
#define E1000_FCRTL_RTL   0x0000FFF8
#define E1000_FCRTL_XONE   0x80000000
#define E1000_TXCW_FD   0x00000020
#define E1000_TXCW_HD   0x00000040
#define E1000_TXCW_PAUSE   0x00000080
#define E1000_TXCW_ASM_DIR   0x00000100
#define E1000_TXCW_PAUSE_MASK   0x00000180
#define E1000_TXCW_RF   0x00003000
#define E1000_TXCW_NP   0x00008000
#define E1000_TXCW_CW   0x0000ffff
#define E1000_TXCW_TXC   0x40000000
#define E1000_TXCW_ANE   0x80000000
#define E1000_RXCW_CW   0x0000ffff
#define E1000_RXCW_NC   0x04000000
#define E1000_RXCW_IV   0x08000000
#define E1000_RXCW_CC   0x10000000
#define E1000_RXCW_C   0x20000000
#define E1000_RXCW_SYNCH   0x40000000
#define E1000_RXCW_ANC   0x80000000
#define E1000_GCR_RXD_NO_SNOOP   0x00000001
#define E1000_GCR_RXDSCW_NO_SNOOP   0x00000002
#define E1000_GCR_RXDSCR_NO_SNOOP   0x00000004
#define E1000_GCR_TXD_NO_SNOOP   0x00000008
#define E1000_GCR_TXDSCW_NO_SNOOP   0x00000010
#define E1000_GCR_TXDSCR_NO_SNOOP   0x00000020
#define E1000_GCR_CMPL_TMOUT_MASK   0x0000F000
#define E1000_GCR_CMPL_TMOUT_10ms   0x00001000
#define E1000_GCR_CMPL_TMOUT_RESEND   0x00010000
#define E1000_GCR_CAP_VER2   0x00040000
#define PCIE_NO_SNOOP_ALL
#define MII_CR_SPEED_SELECT_MSB   0x0040
#define MII_CR_COLL_TEST_ENABLE   0x0080
#define MII_CR_FULL_DUPLEX   0x0100
#define MII_CR_RESTART_AUTO_NEG   0x0200
#define MII_CR_ISOLATE   0x0400
#define MII_CR_POWER_DOWN   0x0800
#define MII_CR_AUTO_NEG_EN   0x1000
#define MII_CR_SPEED_SELECT_LSB   0x2000
#define MII_CR_LOOPBACK   0x4000
#define MII_CR_RESET   0x8000
#define MII_CR_SPEED_1000   0x0040
#define MII_CR_SPEED_100   0x2000
#define MII_CR_SPEED_10   0x0000
#define MII_SR_EXTENDED_CAPS   0x0001
#define MII_SR_JABBER_DETECT   0x0002
#define MII_SR_LINK_STATUS   0x0004
#define MII_SR_AUTONEG_CAPS   0x0008
#define MII_SR_REMOTE_FAULT   0x0010
#define MII_SR_AUTONEG_COMPLETE   0x0020
#define MII_SR_PREAMBLE_SUPPRESS   0x0040
#define MII_SR_EXTENDED_STATUS   0x0100
#define MII_SR_100T2_HD_CAPS   0x0200
#define MII_SR_100T2_FD_CAPS   0x0400
#define MII_SR_10T_HD_CAPS   0x0800
#define MII_SR_10T_FD_CAPS   0x1000
#define MII_SR_100X_HD_CAPS   0x2000
#define MII_SR_100X_FD_CAPS   0x4000
#define MII_SR_100T4_CAPS   0x8000
#define NWAY_AR_SELECTOR_FIELD   0x0001
#define NWAY_AR_10T_HD_CAPS   0x0020
#define NWAY_AR_10T_FD_CAPS   0x0040
#define NWAY_AR_100TX_HD_CAPS   0x0080
#define NWAY_AR_100TX_FD_CAPS   0x0100
#define NWAY_AR_100T4_CAPS   0x0200
#define NWAY_AR_PAUSE   0x0400
#define NWAY_AR_ASM_DIR   0x0800
#define NWAY_AR_REMOTE_FAULT   0x2000
#define NWAY_AR_NEXT_PAGE   0x8000
#define NWAY_LPAR_SELECTOR_FIELD   0x0000
#define NWAY_LPAR_10T_HD_CAPS   0x0020
#define NWAY_LPAR_10T_FD_CAPS   0x0040
#define NWAY_LPAR_100TX_HD_CAPS   0x0080
#define NWAY_LPAR_100TX_FD_CAPS   0x0100
#define NWAY_LPAR_100T4_CAPS   0x0200
#define NWAY_LPAR_PAUSE   0x0400
#define NWAY_LPAR_ASM_DIR   0x0800
#define NWAY_LPAR_REMOTE_FAULT   0x2000
#define NWAY_LPAR_ACKNOWLEDGE   0x4000
#define NWAY_LPAR_NEXT_PAGE   0x8000
#define NWAY_ER_LP_NWAY_CAPS   0x0001
#define NWAY_ER_PAGE_RXD   0x0002
#define NWAY_ER_NEXT_PAGE_CAPS   0x0004
#define NWAY_ER_LP_NEXT_PAGE_CAPS   0x0008
#define NWAY_ER_PAR_DETECT_FAULT   0x0010
#define CR_1000T_ASYM_PAUSE   0x0080
#define CR_1000T_HD_CAPS   0x0100
#define CR_1000T_FD_CAPS   0x0200
#define CR_1000T_REPEATER_DTE   0x0400
#define CR_1000T_MS_VALUE   0x0800
#define CR_1000T_MS_ENABLE   0x1000
#define CR_1000T_TEST_MODE_NORMAL   0x0000
#define CR_1000T_TEST_MODE_1   0x2000
#define CR_1000T_TEST_MODE_2   0x4000
#define CR_1000T_TEST_MODE_3   0x6000
#define CR_1000T_TEST_MODE_4   0x8000
#define SR_1000T_IDLE_ERROR_CNT   0x00FF
#define SR_1000T_ASYM_PAUSE_DIR   0x0100
#define SR_1000T_LP_HD_CAPS   0x0400
#define SR_1000T_LP_FD_CAPS   0x0800
#define SR_1000T_REMOTE_RX_STATUS   0x1000
#define SR_1000T_LOCAL_RX_STATUS   0x2000
#define SR_1000T_MS_CONFIG_RES   0x4000
#define SR_1000T_MS_CONFIG_FAULT   0x8000
#define SR_1000T_PHY_EXCESSIVE_IDLE_ERR_COUNT   5
#define PHY_CONTROL   0x00
#define PHY_STATUS   0x01
#define PHY_ID1   0x02
#define PHY_ID2   0x03
#define PHY_AUTONEG_ADV   0x04
#define PHY_LP_ABILITY   0x05
#define PHY_AUTONEG_EXP   0x06
#define PHY_NEXT_PAGE_TX   0x07
#define PHY_LP_NEXT_PAGE   0x08
#define PHY_1000T_CTRL   0x09
#define PHY_1000T_STATUS   0x0A
#define PHY_EXT_STATUS   0x0F
#define PHY_CONTROL_LB   0x4000
#define E1000_EECD_SK   0x00000001
#define E1000_EECD_CS   0x00000002
#define E1000_EECD_DI   0x00000004
#define E1000_EECD_DO   0x00000008
#define E1000_EECD_FWE_MASK   0x00000030
#define E1000_EECD_FWE_DIS   0x00000010
#define E1000_EECD_FWE_EN   0x00000020
#define E1000_EECD_FWE_SHIFT   4
#define E1000_EECD_REQ   0x00000040
#define E1000_EECD_GNT   0x00000080
#define E1000_EECD_PRES   0x00000100
#define E1000_EECD_SIZE   0x00000200
#define E1000_EECD_ADDR_BITS   0x00000400
#define E1000_EECD_TYPE   0x00002000
#define E1000_NVM_GRANT_ATTEMPTS   1000
#define E1000_EECD_AUTO_RD   0x00000200
#define E1000_EECD_SIZE_EX_MASK   0x00007800
#define E1000_EECD_SIZE_EX_SHIFT   11
#define E1000_EECD_NVADDS   0x00018000
#define E1000_EECD_SELSHAD   0x00020000
#define E1000_EECD_INITSRAM   0x00040000
#define E1000_EECD_FLUPD   0x00080000
#define E1000_EECD_AUPDEN   0x00100000
#define E1000_EECD_SHADV   0x00200000
#define E1000_EECD_SEC1VAL   0x00400000
#define E1000_EECD_SECVAL_SHIFT   22
#define E1000_EECD_SEC1VAL_VALID_MASK   (E1000_EECD_AUTO_RD | E1000_EECD_PRES)
#define E1000_NVM_SWDPIN0   0x0001
#define E1000_NVM_LED_LOGIC   0x0020
#define E1000_NVM_RW_REG_DATA   16
#define E1000_NVM_RW_REG_DONE   2
#define E1000_NVM_RW_REG_START   1
#define E1000_NVM_RW_ADDR_SHIFT   2
#define E1000_NVM_POLL_WRITE   1
#define E1000_NVM_POLL_READ   0
#define E1000_FLASH_UPDATES   2000
#define NVM_COMPAT   0x0003
#define NVM_ID_LED_SETTINGS   0x0004
#define NVM_VERSION   0x0005
#define NVM_SERDES_AMPLITUDE   0x0006
#define NVM_PHY_CLASS_WORD   0x0007
#define NVM_INIT_CONTROL1_REG   0x000A
#define NVM_INIT_CONTROL2_REG   0x000F
#define NVM_SWDEF_PINS_CTRL_PORT_1   0x0010
#define NVM_INIT_CONTROL3_PORT_B   0x0014
#define NVM_INIT_3GIO_3   0x001A
#define NVM_SWDEF_PINS_CTRL_PORT_0   0x0020
#define NVM_INIT_CONTROL3_PORT_A   0x0024
#define NVM_CFG   0x0012
#define NVM_FLASH_VERSION   0x0032
#define NVM_ALT_MAC_ADDR_PTR   0x0037
#define NVM_CHECKSUM_REG   0x003F
#define E1000_NVM_CFG_DONE_PORT_0   0x040000
#define E1000_NVM_CFG_DONE_PORT_1   0x080000
#define NVM_WORD0F_PAUSE_MASK   0x3000
#define NVM_WORD0F_PAUSE   0x1000
#define NVM_WORD0F_ASM_DIR   0x2000
#define NVM_WORD0F_ANE   0x0800
#define NVM_WORD0F_SWPDIO_EXT_MASK   0x00F0
#define NVM_WORD0F_LPLU   0x0001
#define NVM_WORD1A_ASPM_MASK   0x000C
#define NVM_SUM   0xBABA
#define NVM_MAC_ADDR_OFFSET   0
#define NVM_PBA_OFFSET_0   8
#define NVM_PBA_OFFSET_1   9
#define NVM_RESERVED_WORD   0xFFFF
#define NVM_PHY_CLASS_A   0x8000
#define NVM_SERDES_AMPLITUDE_MASK   0x000F
#define NVM_SIZE_MASK   0x1C00
#define NVM_SIZE_SHIFT   10
#define NVM_WORD_SIZE_BASE_SHIFT   6
#define NVM_SWDPIO_EXT_SHIFT   4
#define NVM_READ_OPCODE_MICROWIRE   0x6
#define NVM_WRITE_OPCODE_MICROWIRE   0x5
#define NVM_ERASE_OPCODE_MICROWIRE   0x7
#define NVM_EWEN_OPCODE_MICROWIRE   0x13
#define NVM_EWDS_OPCODE_MICROWIRE   0x10
#define NVM_MAX_RETRY_SPI   5000
#define NVM_READ_OPCODE_SPI   0x03
#define NVM_WRITE_OPCODE_SPI   0x02
#define NVM_A8_OPCODE_SPI   0x08
#define NVM_WREN_OPCODE_SPI   0x06
#define NVM_WRDI_OPCODE_SPI   0x04
#define NVM_RDSR_OPCODE_SPI   0x05
#define NVM_WRSR_OPCODE_SPI   0x01
#define NVM_STATUS_RDY_SPI   0x01
#define NVM_STATUS_WEN_SPI   0x02
#define NVM_STATUS_BP0_SPI   0x04
#define NVM_STATUS_BP1_SPI   0x08
#define NVM_STATUS_WPEN_SPI   0x80
#define ID_LED_RESERVED_0000   0x0000
#define ID_LED_RESERVED_FFFF   0xFFFF
#define ID_LED_DEFAULT
#define ID_LED_DEF1_DEF2   0x1
#define ID_LED_DEF1_ON2   0x2
#define ID_LED_DEF1_OFF2   0x3
#define ID_LED_ON1_DEF2   0x4
#define ID_LED_ON1_ON2   0x5
#define ID_LED_ON1_OFF2   0x6
#define ID_LED_OFF1_DEF2   0x7
#define ID_LED_OFF1_ON2   0x8
#define ID_LED_OFF1_OFF2   0x9
#define IGP_ACTIVITY_LED_MASK   0xFFFFF0FF
#define IGP_ACTIVITY_LED_ENABLE   0x0300
#define IGP_LED3_MODE   0x07000000
#define PCIX_COMMAND_REGISTER   0xE6
#define PCIX_STATUS_REGISTER_LO   0xE8
#define PCIX_STATUS_REGISTER_HI   0xEA
#define PCI_HEADER_TYPE_REGISTER   0x0E
#define PCIE_LINK_STATUS   0x12
#define PCIE_DEVICE_CONTROL2   0x28
#define PCIX_COMMAND_MMRBC_MASK   0x000C
#define PCIX_COMMAND_MMRBC_SHIFT   0x2
#define PCIX_STATUS_HI_MMRBC_MASK   0x0060
#define PCIX_STATUS_HI_MMRBC_SHIFT   0x5
#define PCIX_STATUS_HI_MMRBC_4K   0x3
#define PCIX_STATUS_HI_MMRBC_2K   0x2
#define PCIX_STATUS_LO_FUNC_MASK   0x7
#define PCI_HEADER_TYPE_MULTIFUNC   0x80
#define PCIE_LINK_WIDTH_MASK   0x3F0
#define PCIE_LINK_WIDTH_SHIFT   4
#define PCIE_DEVICE_CONTROL2_16ms   0x0005
#define ETH_ADDR_LEN   6
#define PHY_REVISION_MASK   0xFFFFFFF0
#define MAX_PHY_REG_ADDRESS   0x1F
#define MAX_PHY_MULTI_PAGE_REG   0xF
#define M88E1000_E_PHY_ID   0x01410C50
#define M88E1000_I_PHY_ID   0x01410C30
#define M88E1011_I_PHY_ID   0x01410C20
#define IGP01E1000_I_PHY_ID   0x02A80380
#define M88E1011_I_REV_4   0x04
#define M88E1111_I_PHY_ID   0x01410CC0
#define GG82563_E_PHY_ID   0x01410CA0
#define IGP03E1000_E_PHY_ID   0x02A80390
#define IFE_E_PHY_ID   0x02A80330
#define IFE_PLUS_E_PHY_ID   0x02A80320
#define IFE_C_E_PHY_ID   0x02A80310
#define M88_VENDOR   0x0141
#define M88E1000_PHY_SPEC_CTRL   0x10
#define M88E1000_PHY_SPEC_STATUS   0x11
#define M88E1000_INT_ENABLE   0x12
#define M88E1000_INT_STATUS   0x13
#define M88E1000_EXT_PHY_SPEC_CTRL   0x14
#define M88E1000_RX_ERR_CNTR   0x15
#define M88E1000_PHY_EXT_CTRL   0x1A
#define M88E1000_PHY_PAGE_SELECT   0x1D
#define M88E1000_PHY_GEN_CONTROL   0x1E
#define M88E1000_PHY_VCO_REG_BIT8   0x100
#define M88E1000_PHY_VCO_REG_BIT11   0x800
#define M88E1000_PSCR_JABBER_DISABLE   0x0001
#define M88E1000_PSCR_POLARITY_REVERSAL   0x0002
#define M88E1000_PSCR_SQE_TEST   0x0004
#define M88E1000_PSCR_CLK125_DISABLE   0x0010
#define M88E1000_PSCR_MDI_MANUAL_MODE   0x0000
#define M88E1000_PSCR_MDIX_MANUAL_MODE   0x0020
#define M88E1000_PSCR_AUTO_X_1000T   0x0040
#define M88E1000_PSCR_AUTO_X_MODE   0x0060
#define M88E1000_PSCR_EN_10BT_EXT_DIST   0x0080
#define M88E1000_PSCR_MII_5BIT_ENABLE   0x0100
#define M88E1000_PSCR_SCRAMBLER_DISABLE   0x0200
#define M88E1000_PSCR_FORCE_LINK_GOOD   0x0400
#define M88E1000_PSCR_ASSERT_CRS_ON_TX   0x0800
#define M88E1000_PSSR_JABBER   0x0001
#define M88E1000_PSSR_REV_POLARITY   0x0002
#define M88E1000_PSSR_DOWNSHIFT   0x0020
#define M88E1000_PSSR_MDIX   0x0040
#define M88E1000_PSSR_CABLE_LENGTH   0x0380
#define M88E1000_PSSR_LINK   0x0400
#define M88E1000_PSSR_SPD_DPLX_RESOLVED   0x0800
#define M88E1000_PSSR_PAGE_RCVD   0x1000
#define M88E1000_PSSR_DPLX   0x2000
#define M88E1000_PSSR_SPEED   0xC000
#define M88E1000_PSSR_10MBS   0x0000
#define M88E1000_PSSR_100MBS   0x4000
#define M88E1000_PSSR_1000MBS   0x8000
#define M88E1000_PSSR_CABLE_LENGTH_SHIFT   7
#define M88E1000_EPSCR_FIBER_LOOPBACK   0x4000
#define M88E1000_EPSCR_DOWN_NO_IDLE   0x8000
#define M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK   0x0C00
#define M88E1000_EPSCR_MASTER_DOWNSHIFT_1X   0x0000
#define M88E1000_EPSCR_MASTER_DOWNSHIFT_2X   0x0400
#define M88E1000_EPSCR_MASTER_DOWNSHIFT_3X   0x0800
#define M88E1000_EPSCR_MASTER_DOWNSHIFT_4X   0x0C00
#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK   0x0300
#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_DIS   0x0000
#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X   0x0100
#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_2X   0x0200
#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_3X   0x0300
#define M88E1000_EPSCR_TX_CLK_2_5   0x0060
#define M88E1000_EPSCR_TX_CLK_25   0x0070
#define M88E1000_EPSCR_TX_CLK_0   0x0000
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK   0x0E00
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_1X   0x0000
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_2X   0x0200
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_3X   0x0400
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_4X   0x0600
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X   0x0800
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_6X   0x0A00
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_7X   0x0C00
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_8X   0x0E00
#define GG82563_PAGE_SHIFT   5
#define GG82563_REG(page, reg)   (((page) << GG82563_PAGE_SHIFT) | ((reg) & MAX_PHY_REG_ADDRESS))
#define GG82563_MIN_ALT_REG   30
#define GG82563_PHY_SPEC_CTRL   GG82563_REG(0, 16)
#define GG82563_PHY_SPEC_STATUS   GG82563_REG(0, 17)
#define GG82563_PHY_INT_ENABLE   GG82563_REG(0, 18)
#define GG82563_PHY_SPEC_STATUS_2   GG82563_REG(0, 19)
#define GG82563_PHY_RX_ERR_CNTR   GG82563_REG(0, 21)
#define GG82563_PHY_PAGE_SELECT   GG82563_REG(0, 22)
#define GG82563_PHY_SPEC_CTRL_2   GG82563_REG(0, 26)
#define GG82563_PHY_PAGE_SELECT_ALT   GG82563_REG(0, 29)
#define GG82563_PHY_TEST_CLK_CTRL   GG82563_REG(0, 30)
#define GG82563_PHY_MAC_SPEC_CTRL   GG82563_REG(2, 21)
#define GG82563_PHY_MAC_SPEC_CTRL_2   GG82563_REG(2, 26)
#define GG82563_PHY_DSP_DISTANCE   GG82563_REG(5, 26)
#define GG82563_PHY_KMRN_MODE_CTRL   GG82563_REG(193, 16)
#define GG82563_PHY_PORT_RESET   GG82563_REG(193, 17)
#define GG82563_PHY_REVISION_ID   GG82563_REG(193, 18)
#define GG82563_PHY_DEVICE_ID   GG82563_REG(193, 19)
#define GG82563_PHY_PWR_MGMT_CTRL   GG82563_REG(193, 20)
#define GG82563_PHY_RATE_ADAPT_CTRL   GG82563_REG(193, 25)
#define GG82563_PHY_KMRN_FIFO_CTRL_STAT   GG82563_REG(194, 16)
#define GG82563_PHY_KMRN_CTRL   GG82563_REG(194, 17)
#define GG82563_PHY_INBAND_CTRL   GG82563_REG(194, 18)
#define GG82563_PHY_KMRN_DIAGNOSTIC   GG82563_REG(194, 19)
#define GG82563_PHY_ACK_TIMEOUTS   GG82563_REG(194, 20)
#define GG82563_PHY_ADV_ABILITY   GG82563_REG(194, 21)
#define GG82563_PHY_LINK_PARTNER_ADV_ABILITY   GG82563_REG(194, 23)
#define GG82563_PHY_ADV_NEXT_PAGE   GG82563_REG(194, 24)
#define GG82563_PHY_LINK_PARTNER_ADV_NEXT_PAGE   GG82563_REG(194, 25)
#define GG82563_PHY_KMRN_MISC   GG82563_REG(194, 26)
#define E1000_MDIC_DATA_MASK   0x0000FFFF
#define E1000_MDIC_REG_MASK   0x001F0000
#define E1000_MDIC_REG_SHIFT   16
#define E1000_MDIC_PHY_MASK   0x03E00000
#define E1000_MDIC_PHY_SHIFT   21
#define E1000_MDIC_OP_WRITE   0x04000000
#define E1000_MDIC_OP_READ   0x08000000
#define E1000_MDIC_READY   0x10000000
#define E1000_MDIC_INT_EN   0x20000000
#define E1000_MDIC_ERROR   0x40000000
#define E1000_GEN_CTL_READY   0x80000000
#define E1000_GEN_CTL_ADDRESS_SHIFT   8
#define E1000_GEN_POLL_TIMEOUT   640

Functions

 FILE_LICENCE (GPL2_OR_LATER)


Define Documentation

#define REQ_TX_DESCRIPTOR_MULTIPLE   8

Definition at line 35 of file e1000_defines.h.

#define REQ_RX_DESCRIPTOR_MULTIPLE   8

Definition at line 36 of file e1000_defines.h.

#define E1000_WUC_APME   0x00000001

Definition at line 40 of file e1000_defines.h.

#define E1000_WUC_PME_EN   0x00000002

Definition at line 41 of file e1000_defines.h.

#define E1000_WUC_PME_STATUS   0x00000004

Definition at line 42 of file e1000_defines.h.

#define E1000_WUC_APMPME   0x00000008

Definition at line 43 of file e1000_defines.h.

#define E1000_WUC_LSCWE   0x00000010

Definition at line 44 of file e1000_defines.h.

#define E1000_WUC_LSCWO   0x00000020

Definition at line 45 of file e1000_defines.h.

#define E1000_WUC_SPM   0x80000000

Definition at line 46 of file e1000_defines.h.

#define E1000_WUC_PHY_WAKE   0x00000100

Definition at line 47 of file e1000_defines.h.

#define E1000_WUFC_LNKC   0x00000001

Definition at line 50 of file e1000_defines.h.

#define E1000_WUFC_MAG   0x00000002

Definition at line 51 of file e1000_defines.h.

#define E1000_WUFC_EX   0x00000004

Definition at line 52 of file e1000_defines.h.

#define E1000_WUFC_MC   0x00000008

Definition at line 53 of file e1000_defines.h.

#define E1000_WUFC_BC   0x00000010

Definition at line 54 of file e1000_defines.h.

#define E1000_WUFC_ARP   0x00000020

Definition at line 55 of file e1000_defines.h.

#define E1000_WUFC_IPV4   0x00000040

Definition at line 56 of file e1000_defines.h.

#define E1000_WUFC_IPV6   0x00000080

Definition at line 57 of file e1000_defines.h.

#define E1000_WUFC_IGNORE_TCO   0x00008000

Definition at line 58 of file e1000_defines.h.

#define E1000_WUFC_FLX0   0x00010000

Definition at line 59 of file e1000_defines.h.

#define E1000_WUFC_FLX1   0x00020000

Definition at line 60 of file e1000_defines.h.

#define E1000_WUFC_FLX2   0x00040000

Definition at line 61 of file e1000_defines.h.

#define E1000_WUFC_FLX3   0x00080000

Definition at line 62 of file e1000_defines.h.

#define E1000_WUFC_ALL_FILTERS   0x000F00FF

Definition at line 63 of file e1000_defines.h.

#define E1000_WUFC_FLX_OFFSET   16

Definition at line 64 of file e1000_defines.h.

#define E1000_WUFC_FLX_FILTERS   0x000F0000

Definition at line 65 of file e1000_defines.h.

#define E1000_WUS_LNKC   E1000_WUFC_LNKC

Definition at line 68 of file e1000_defines.h.

#define E1000_WUS_MAG   E1000_WUFC_MAG

Definition at line 69 of file e1000_defines.h.

#define E1000_WUS_EX   E1000_WUFC_EX

Definition at line 70 of file e1000_defines.h.

#define E1000_WUS_MC   E1000_WUFC_MC

Definition at line 71 of file e1000_defines.h.

#define E1000_WUS_BC   E1000_WUFC_BC

Definition at line 72 of file e1000_defines.h.

#define E1000_WUS_ARP   E1000_WUFC_ARP

Definition at line 73 of file e1000_defines.h.

#define E1000_WUS_IPV4   E1000_WUFC_IPV4

Definition at line 74 of file e1000_defines.h.

#define E1000_WUS_IPV6   E1000_WUFC_IPV6

Definition at line 75 of file e1000_defines.h.

#define E1000_WUS_FLX0   E1000_WUFC_FLX0

Definition at line 76 of file e1000_defines.h.

#define E1000_WUS_FLX1   E1000_WUFC_FLX1

Definition at line 77 of file e1000_defines.h.

#define E1000_WUS_FLX2   E1000_WUFC_FLX2

Definition at line 78 of file e1000_defines.h.

#define E1000_WUS_FLX3   E1000_WUFC_FLX3

Definition at line 79 of file e1000_defines.h.

#define E1000_WUS_FLX_FILTERS   E1000_WUFC_FLX_FILTERS

Definition at line 80 of file e1000_defines.h.

#define E1000_WUPL_LENGTH_MASK   0x0FFF

Definition at line 83 of file e1000_defines.h.

#define E1000_FLEXIBLE_FILTER_COUNT_MAX   4

Definition at line 86 of file e1000_defines.h.

#define E1000_FLEXIBLE_FILTER_SIZE_MAX   128

Definition at line 89 of file e1000_defines.h.

#define E1000_FFLT_SIZE   E1000_FLEXIBLE_FILTER_COUNT_MAX

Definition at line 91 of file e1000_defines.h.

#define E1000_FFMT_SIZE   E1000_FLEXIBLE_FILTER_SIZE_MAX

Definition at line 92 of file e1000_defines.h.

#define E1000_FFVT_SIZE   E1000_FLEXIBLE_FILTER_SIZE_MAX

Definition at line 93 of file e1000_defines.h.

#define E1000_CTRL_EXT_GPI0_EN   0x00000001

Definition at line 96 of file e1000_defines.h.

#define E1000_CTRL_EXT_GPI1_EN   0x00000002

Definition at line 97 of file e1000_defines.h.

#define E1000_CTRL_EXT_PHYINT_EN   E1000_CTRL_EXT_GPI1_EN

Definition at line 98 of file e1000_defines.h.

#define E1000_CTRL_EXT_GPI2_EN   0x00000004

Definition at line 99 of file e1000_defines.h.

#define E1000_CTRL_EXT_GPI3_EN   0x00000008

Definition at line 100 of file e1000_defines.h.

#define E1000_CTRL_EXT_SDP4_DATA   0x00000010

Definition at line 102 of file e1000_defines.h.

Referenced by e1000_phy_hw_reset_82543().

#define E1000_CTRL_EXT_SDP5_DATA   0x00000020

Definition at line 103 of file e1000_defines.h.

#define E1000_CTRL_EXT_PHY_INT   E1000_CTRL_EXT_SDP5_DATA

Definition at line 104 of file e1000_defines.h.

#define E1000_CTRL_EXT_SDP6_DATA   0x00000040

Definition at line 105 of file e1000_defines.h.

#define E1000_CTRL_EXT_SDP7_DATA   0x00000080

Definition at line 106 of file e1000_defines.h.

#define E1000_CTRL_EXT_SDP4_DIR   0x00000100

Definition at line 108 of file e1000_defines.h.

Referenced by e1000_phy_hw_reset_82543().

#define E1000_CTRL_EXT_SDP5_DIR   0x00000200

Definition at line 109 of file e1000_defines.h.

#define E1000_CTRL_EXT_SDP6_DIR   0x00000400

Definition at line 110 of file e1000_defines.h.

#define E1000_CTRL_EXT_SDP7_DIR   0x00000800

Definition at line 111 of file e1000_defines.h.

#define E1000_CTRL_EXT_ASDCHK   0x00001000

Definition at line 112 of file e1000_defines.h.

#define E1000_CTRL_EXT_EE_RST   0x00002000

#define E1000_CTRL_EXT_IPS   0x00004000

Definition at line 114 of file e1000_defines.h.

#define E1000_CTRL_EXT_SPD_BYPS   0x00008000

Definition at line 115 of file e1000_defines.h.

Referenced by e1000e_configure_k1_ich8lan().

#define E1000_CTRL_EXT_RO_DIS   0x00020000

Definition at line 116 of file e1000_defines.h.

Referenced by e1000_init_hw_82540(), and e1000e_init_hw_ich8lan().

#define E1000_CTRL_EXT_DMA_DYN_CLK_EN   0x00080000

Definition at line 117 of file e1000_defines.h.

Referenced by e1000e_initialize_hw_bits_82571().

#define E1000_CTRL_EXT_LINK_MODE_MASK   0x00C00000

#define E1000_CTRL_EXT_LINK_MODE_GMII   0x00000000

Definition at line 119 of file e1000_defines.h.

#define E1000_CTRL_EXT_LINK_MODE_TBI   0x00C00000

Definition at line 120 of file e1000_defines.h.

#define E1000_CTRL_EXT_LINK_MODE_KMRN   0x00000000

Definition at line 121 of file e1000_defines.h.

#define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES   0x00C00000

Definition at line 122 of file e1000_defines.h.

Referenced by igb_init_mac_params_82575().

#define E1000_CTRL_EXT_LINK_MODE_PCIX_SERDES   0x00800000

Definition at line 123 of file e1000_defines.h.

#define E1000_CTRL_EXT_LINK_MODE_SGMII   0x00800000

Definition at line 124 of file e1000_defines.h.

Referenced by igb_init_mac_params_82575().

#define E1000_CTRL_EXT_EIAME   0x01000000

Definition at line 125 of file e1000_defines.h.

#define E1000_CTRL_EXT_IRCA   0x00000001

Definition at line 126 of file e1000_defines.h.

#define E1000_CTRL_EXT_WR_WMARK_MASK   0x03000000

Definition at line 127 of file e1000_defines.h.

#define E1000_CTRL_EXT_WR_WMARK_256   0x00000000

Definition at line 128 of file e1000_defines.h.

#define E1000_CTRL_EXT_WR_WMARK_320   0x01000000

Definition at line 129 of file e1000_defines.h.

#define E1000_CTRL_EXT_WR_WMARK_384   0x02000000

Definition at line 130 of file e1000_defines.h.

#define E1000_CTRL_EXT_WR_WMARK_448   0x03000000

Definition at line 131 of file e1000_defines.h.

#define E1000_CTRL_EXT_CANC   0x04000000

Definition at line 132 of file e1000_defines.h.

#define E1000_CTRL_EXT_DRV_LOAD   0x10000000

Definition at line 133 of file e1000_defines.h.

Referenced by e1000e_get_hw_control(), and igb_get_hw_control().

#define E1000_CTRL_EXT_IAME   0x08000000

Definition at line 135 of file e1000_defines.h.

#define E1000_CRTL_EXT_PB_PAREN   0x01000000

Definition at line 136 of file e1000_defines.h.

#define E1000_CTRL_EXT_DF_PAREN   0x02000000

Definition at line 138 of file e1000_defines.h.

#define E1000_CTRL_EXT_GHOST_PAREN   0x40000000

Definition at line 140 of file e1000_defines.h.

#define E1000_CTRL_EXT_PBA_CLR   0x80000000

Definition at line 141 of file e1000_defines.h.

#define E1000_I2CCMD_REG_ADDR_SHIFT   16

Definition at line 142 of file e1000_defines.h.

Referenced by igb_read_phy_reg_i2c(), and igb_write_phy_reg_i2c().

#define E1000_I2CCMD_REG_ADDR   0x00FF0000

Definition at line 143 of file e1000_defines.h.

#define E1000_I2CCMD_PHY_ADDR_SHIFT   24

Definition at line 144 of file e1000_defines.h.

Referenced by igb_read_phy_reg_i2c(), and igb_write_phy_reg_i2c().

#define E1000_I2CCMD_PHY_ADDR   0x07000000

Definition at line 145 of file e1000_defines.h.

#define E1000_I2CCMD_OPCODE_READ   0x08000000

Definition at line 146 of file e1000_defines.h.

Referenced by igb_read_phy_reg_i2c().

#define E1000_I2CCMD_OPCODE_WRITE   0x00000000

Definition at line 147 of file e1000_defines.h.

Referenced by igb_write_phy_reg_i2c().

#define E1000_I2CCMD_RESET   0x10000000

Definition at line 148 of file e1000_defines.h.

#define E1000_I2CCMD_READY   0x20000000

Definition at line 149 of file e1000_defines.h.

Referenced by igb_read_phy_reg_i2c(), and igb_write_phy_reg_i2c().

#define E1000_I2CCMD_INTERRUPT_ENA   0x40000000

Definition at line 150 of file e1000_defines.h.

#define E1000_I2CCMD_ERROR   0x80000000

Definition at line 151 of file e1000_defines.h.

Referenced by igb_read_phy_reg_i2c(), and igb_write_phy_reg_i2c().

#define E1000_MAX_SGMII_PHY_REG_ADDR   255

Definition at line 152 of file e1000_defines.h.

Referenced by igb_read_phy_reg_sgmii_82575(), and igb_write_phy_reg_sgmii_82575().

#define E1000_I2CCMD_PHY_TIMEOUT   200

Definition at line 153 of file e1000_defines.h.

Referenced by igb_read_phy_reg_i2c(), and igb_write_phy_reg_i2c().

#define E1000_RXD_STAT_DD   0x01

#define E1000_RXD_STAT_EOP   0x02

Definition at line 157 of file e1000_defines.h.

#define E1000_RXD_STAT_IXSM   0x04

Definition at line 158 of file e1000_defines.h.

#define E1000_RXD_STAT_VP   0x08

Definition at line 159 of file e1000_defines.h.

#define E1000_RXD_STAT_UDPCS   0x10

Definition at line 160 of file e1000_defines.h.

#define E1000_RXD_STAT_TCPCS   0x20

Definition at line 161 of file e1000_defines.h.

#define E1000_RXD_STAT_IPCS   0x40

Definition at line 162 of file e1000_defines.h.

#define E1000_RXD_STAT_PIF   0x80

Definition at line 163 of file e1000_defines.h.

#define E1000_RXD_STAT_CRCV   0x100

Definition at line 164 of file e1000_defines.h.

#define E1000_RXD_STAT_IPIDV   0x200

Definition at line 165 of file e1000_defines.h.

#define E1000_RXD_STAT_UDPV   0x400

Definition at line 166 of file e1000_defines.h.

#define E1000_RXD_STAT_DYNINT   0x800

Definition at line 167 of file e1000_defines.h.

#define E1000_RXD_STAT_ACK   0x8000

Definition at line 168 of file e1000_defines.h.

#define E1000_RXD_ERR_CE   0x01

Definition at line 169 of file e1000_defines.h.

#define E1000_RXD_ERR_SE   0x02

Definition at line 170 of file e1000_defines.h.

#define E1000_RXD_ERR_SEQ   0x04

Definition at line 171 of file e1000_defines.h.

#define E1000_RXD_ERR_CXE   0x10

Definition at line 172 of file e1000_defines.h.

#define E1000_RXD_ERR_TCPE   0x20

Definition at line 173 of file e1000_defines.h.

#define E1000_RXD_ERR_IPE   0x40

Definition at line 174 of file e1000_defines.h.

#define E1000_RXD_ERR_RXE   0x80

Definition at line 175 of file e1000_defines.h.

#define E1000_RXD_SPC_VLAN_MASK   0x0FFF

Definition at line 176 of file e1000_defines.h.

#define E1000_RXD_SPC_PRI_MASK   0xE000

Definition at line 177 of file e1000_defines.h.

#define E1000_RXD_SPC_PRI_SHIFT   13

Definition at line 178 of file e1000_defines.h.

#define E1000_RXD_SPC_CFI_MASK   0x1000

Definition at line 179 of file e1000_defines.h.

#define E1000_RXD_SPC_CFI_SHIFT   12

Definition at line 180 of file e1000_defines.h.

#define E1000_RXDEXT_STATERR_CE   0x01000000

Definition at line 182 of file e1000_defines.h.

#define E1000_RXDEXT_STATERR_SE   0x02000000

Definition at line 183 of file e1000_defines.h.

#define E1000_RXDEXT_STATERR_SEQ   0x04000000

Definition at line 184 of file e1000_defines.h.

#define E1000_RXDEXT_STATERR_CXE   0x10000000

Definition at line 185 of file e1000_defines.h.

#define E1000_RXDEXT_STATERR_TCPE   0x20000000

Definition at line 186 of file e1000_defines.h.

#define E1000_RXDEXT_STATERR_IPE   0x40000000

Definition at line 187 of file e1000_defines.h.

#define E1000_RXDEXT_STATERR_RXE   0x80000000

Definition at line 188 of file e1000_defines.h.

#define E1000_RXD_ERR_FRAME_ERR_MASK

#define E1000_RXDEXT_ERR_FRAME_ERR_MASK

#define E1000_MRQC_ENABLE_MASK   0x00000007

Definition at line 206 of file e1000_defines.h.

#define E1000_MRQC_ENABLE_RSS_2Q   0x00000001

Definition at line 207 of file e1000_defines.h.

#define E1000_MRQC_ENABLE_RSS_INT   0x00000004

Definition at line 208 of file e1000_defines.h.

#define E1000_MRQC_RSS_FIELD_MASK   0xFFFF0000

Definition at line 209 of file e1000_defines.h.

#define E1000_MRQC_RSS_FIELD_IPV4_TCP   0x00010000

Definition at line 210 of file e1000_defines.h.

#define E1000_MRQC_RSS_FIELD_IPV4   0x00020000

Definition at line 211 of file e1000_defines.h.

#define E1000_MRQC_RSS_FIELD_IPV6_TCP_EX   0x00040000

Definition at line 212 of file e1000_defines.h.

#define E1000_MRQC_RSS_FIELD_IPV6_EX   0x00080000

Definition at line 213 of file e1000_defines.h.

#define E1000_MRQC_RSS_FIELD_IPV6   0x00100000

Definition at line 214 of file e1000_defines.h.

#define E1000_MRQC_RSS_FIELD_IPV6_TCP   0x00200000

Definition at line 215 of file e1000_defines.h.

#define E1000_RXDPS_HDRSTAT_HDRSP   0x00008000

Definition at line 217 of file e1000_defines.h.

#define E1000_RXDPS_HDRSTAT_HDRLEN_MASK   0x000003FF

Definition at line 218 of file e1000_defines.h.

#define E1000_MANC_SMBUS_EN   0x00000001

#define E1000_MANC_ASF_EN   0x00000002

Definition at line 222 of file e1000_defines.h.

#define E1000_MANC_R_ON_FORCE   0x00000004

Definition at line 223 of file e1000_defines.h.

#define E1000_MANC_RMCP_EN   0x00000100

Definition at line 224 of file e1000_defines.h.

#define E1000_MANC_0298_EN   0x00000200

Definition at line 225 of file e1000_defines.h.

#define E1000_MANC_IPV4_EN   0x00000400

Definition at line 226 of file e1000_defines.h.

#define E1000_MANC_IPV6_EN   0x00000800

Definition at line 227 of file e1000_defines.h.

#define E1000_MANC_SNAP_EN   0x00001000

Definition at line 228 of file e1000_defines.h.

#define E1000_MANC_ARP_EN   0x00002000

#define E1000_MANC_NEIGHBOR_EN   0x00004000

Definition at line 231 of file e1000_defines.h.

#define E1000_MANC_ARP_RES_EN   0x00008000

Definition at line 232 of file e1000_defines.h.

#define E1000_MANC_TCO_RESET   0x00010000

Definition at line 233 of file e1000_defines.h.

#define E1000_MANC_RCV_TCO_EN   0x00020000

Definition at line 234 of file e1000_defines.h.

Referenced by igb_rx_fifo_flush_82575().

#define E1000_MANC_REPORT_STATUS   0x00040000

Definition at line 235 of file e1000_defines.h.

#define E1000_MANC_RCV_ALL   0x00080000

Definition at line 236 of file e1000_defines.h.

#define E1000_MANC_BLK_PHY_RST_ON_IDE   0x00040000

#define E1000_MANC_EN_MAC_ADDR_FILTER   0x00100000

Definition at line 239 of file e1000_defines.h.

#define E1000_MANC_EN_MNG2HOST   0x00200000

Definition at line 241 of file e1000_defines.h.

#define E1000_MANC_EN_IP_ADDR_FILTER   0x00400000

Definition at line 243 of file e1000_defines.h.

#define E1000_MANC_EN_XSUM_FILTER   0x00800000

Definition at line 244 of file e1000_defines.h.

#define E1000_MANC_BR_EN   0x01000000

Definition at line 245 of file e1000_defines.h.

#define E1000_MANC_SMB_REQ   0x01000000

Definition at line 246 of file e1000_defines.h.

#define E1000_MANC_SMB_GNT   0x02000000

Definition at line 247 of file e1000_defines.h.

#define E1000_MANC_SMB_CLK_IN   0x04000000

Definition at line 248 of file e1000_defines.h.

#define E1000_MANC_SMB_DATA_IN   0x08000000

Definition at line 249 of file e1000_defines.h.

#define E1000_MANC_SMB_DATA_OUT   0x10000000

Definition at line 250 of file e1000_defines.h.

#define E1000_MANC_SMB_CLK_OUT   0x20000000

Definition at line 251 of file e1000_defines.h.

#define E1000_MANC_SMB_DATA_OUT_SHIFT   28

Definition at line 253 of file e1000_defines.h.

#define E1000_MANC_SMB_CLK_OUT_SHIFT   29

Definition at line 254 of file e1000_defines.h.

#define E1000_RCTL_RST   0x00000001

Definition at line 257 of file e1000_defines.h.

Referenced by e1000_init_hw_82542().

#define E1000_RCTL_EN   0x00000002

#define E1000_RCTL_SBP   0x00000004

#define E1000_RCTL_UPE   0x00000008

Definition at line 260 of file e1000_defines.h.

Referenced by igb_configure_rx().

#define E1000_RCTL_MPE   0x00000010

Definition at line 261 of file e1000_defines.h.

Referenced by e1000_configure_rx(), e1000e_configure_rx(), and igb_configure_rx().

#define E1000_RCTL_LPE   0x00000020

Definition at line 262 of file e1000_defines.h.

Referenced by igb_configure_rx(), and igb_rx_fifo_flush_82575().

#define E1000_RCTL_LBM_NO   0x00000000

Definition at line 263 of file e1000_defines.h.

#define E1000_RCTL_LBM_MAC   0x00000040

Definition at line 264 of file e1000_defines.h.

Referenced by igb_configure_rx().

#define E1000_RCTL_LBM_SLP   0x00000080

Definition at line 265 of file e1000_defines.h.

#define E1000_RCTL_LBM_TCVR   0x000000C0

Definition at line 266 of file e1000_defines.h.

Referenced by igb_configure_rx().

#define E1000_RCTL_DTYP_MASK   0x00000C00

Definition at line 267 of file e1000_defines.h.

#define E1000_RCTL_DTYP_PS   0x00000400

Definition at line 268 of file e1000_defines.h.

#define E1000_RCTL_RDMTS_HALF   0x00000000

Definition at line 269 of file e1000_defines.h.

#define E1000_RCTL_RDMTS_QUAT   0x00000100

Definition at line 270 of file e1000_defines.h.

#define E1000_RCTL_RDMTS_EIGTH   0x00000200

Definition at line 271 of file e1000_defines.h.

#define E1000_RCTL_MO_SHIFT   12

Definition at line 272 of file e1000_defines.h.

#define E1000_RCTL_MO_0   0x00000000

Definition at line 273 of file e1000_defines.h.

#define E1000_RCTL_MO_1   0x00001000

Definition at line 274 of file e1000_defines.h.

#define E1000_RCTL_MO_2   0x00002000

Definition at line 275 of file e1000_defines.h.

#define E1000_RCTL_MO_3   0x00003000

Definition at line 276 of file e1000_defines.h.

#define E1000_RCTL_MDR   0x00004000

Definition at line 277 of file e1000_defines.h.

#define E1000_RCTL_BAM   0x00008000

Definition at line 278 of file e1000_defines.h.

Referenced by e1000_configure_rx(), e1000e_configure_rx(), and igb_configure_rx().

#define E1000_RCTL_SZ_2048   0x00000000

Definition at line 280 of file e1000_defines.h.

Referenced by e1000_configure_rx(), e1000e_configure_rx(), and igb_configure_rx().

#define E1000_RCTL_SZ_1024   0x00010000

Definition at line 281 of file e1000_defines.h.

#define E1000_RCTL_SZ_512   0x00020000

Definition at line 282 of file e1000_defines.h.

#define E1000_RCTL_SZ_256   0x00030000

Definition at line 283 of file e1000_defines.h.

#define E1000_RCTL_SZ_16384   0x00010000

Definition at line 285 of file e1000_defines.h.

#define E1000_RCTL_SZ_8192   0x00020000

Definition at line 286 of file e1000_defines.h.

#define E1000_RCTL_SZ_4096   0x00030000

Definition at line 287 of file e1000_defines.h.

#define E1000_RCTL_VFE   0x00040000

Definition at line 288 of file e1000_defines.h.

#define E1000_RCTL_CFIEN   0x00080000

Definition at line 289 of file e1000_defines.h.

#define E1000_RCTL_CFI   0x00100000

Definition at line 290 of file e1000_defines.h.

#define E1000_RCTL_DPF   0x00400000

Definition at line 291 of file e1000_defines.h.

#define E1000_RCTL_PMCF   0x00800000

Definition at line 292 of file e1000_defines.h.

#define E1000_RCTL_BSEX   0x02000000

Definition at line 293 of file e1000_defines.h.

#define E1000_RCTL_SECRC   0x04000000

Definition at line 294 of file e1000_defines.h.

Referenced by igb_configure_rx().

#define E1000_RCTL_FLXBUF_MASK   0x78000000

Definition at line 295 of file e1000_defines.h.

#define E1000_RCTL_FLXBUF_SHIFT   27

Definition at line 296 of file e1000_defines.h.

#define E1000_PSRCTL_BSIZE0_MASK   0x0000007F

Definition at line 315 of file e1000_defines.h.

#define E1000_PSRCTL_BSIZE1_MASK   0x00003F00

Definition at line 316 of file e1000_defines.h.

#define E1000_PSRCTL_BSIZE2_MASK   0x003F0000

Definition at line 317 of file e1000_defines.h.

#define E1000_PSRCTL_BSIZE3_MASK   0x3F000000

Definition at line 318 of file e1000_defines.h.

#define E1000_PSRCTL_BSIZE0_SHIFT   7

Definition at line 320 of file e1000_defines.h.

#define E1000_PSRCTL_BSIZE1_SHIFT   2

Definition at line 321 of file e1000_defines.h.

#define E1000_PSRCTL_BSIZE2_SHIFT   6

Definition at line 322 of file e1000_defines.h.

#define E1000_PSRCTL_BSIZE3_SHIFT   14

Definition at line 323 of file e1000_defines.h.

#define E1000_SWFW_EEP_SM   0x01

#define E1000_SWFW_PHY0_SM   0x02

#define E1000_SWFW_PHY1_SM   0x04

#define E1000_SWFW_CSR_SM   0x08

#define E1000_FACTPS_LFS   0x40000000

Definition at line 332 of file e1000_defines.h.

#define E1000_CTRL_FD   0x00000001

#define E1000_CTRL_BEM   0x00000002

Definition at line 335 of file e1000_defines.h.

#define E1000_CTRL_PRIOR   0x00000004

Definition at line 336 of file e1000_defines.h.

Referenced by e1000_init_hw_82542(), and e1000_init_hw_82543().

#define E1000_CTRL_GIO_MASTER_DISABLE   0x00000004

#define E1000_CTRL_LRST   0x00000008

#define E1000_CTRL_TME   0x00000010

Definition at line 339 of file e1000_defines.h.

#define E1000_CTRL_SLE   0x00000020

Definition at line 340 of file e1000_defines.h.

#define E1000_CTRL_ASDE   0x00000020

Definition at line 341 of file e1000_defines.h.

#define E1000_CTRL_SLU   0x00000040

#define E1000_CTRL_ILOS   0x00000080

Definition at line 343 of file e1000_defines.h.

Referenced by e1000_config_mac_to_phy_82543().

#define E1000_CTRL_SPD_SEL   0x00000300

Definition at line 344 of file e1000_defines.h.

Referenced by e1000_config_mac_to_phy_82543().

#define E1000_CTRL_SPD_10   0x00000000

Definition at line 345 of file e1000_defines.h.

#define E1000_CTRL_SPD_100   0x00000100

Definition at line 346 of file e1000_defines.h.

Referenced by e1000_config_mac_to_phy_82543(), and e1000e_configure_k1_ich8lan().

#define E1000_CTRL_SPD_1000   0x00000200

#define E1000_CTRL_BEM32   0x00000400

Definition at line 348 of file e1000_defines.h.

#define E1000_CTRL_FRCSPD   0x00000800

#define E1000_CTRL_FRCDPX   0x00001000

#define E1000_CTRL_D_UD_EN   0x00002000

Definition at line 351 of file e1000_defines.h.

#define E1000_CTRL_D_UD_POLARITY   0x00004000

Definition at line 352 of file e1000_defines.h.

#define E1000_CTRL_FORCE_PHY_RESET   0x00008000

Definition at line 354 of file e1000_defines.h.

#define E1000_CTRL_EXT_LINK_EN   0x00010000

Definition at line 356 of file e1000_defines.h.

#define E1000_CTRL_SWDPIN0   0x00040000

#define E1000_CTRL_SWDPIN1   0x00080000

#define E1000_CTRL_SWDPIN2   0x00100000

Definition at line 360 of file e1000_defines.h.

#define E1000_CTRL_SWDPIN3   0x00200000

Definition at line 361 of file e1000_defines.h.

#define E1000_CTRL_SWDPIO0   0x00400000

#define E1000_CTRL_SWDPIO1   0x00800000

Definition at line 363 of file e1000_defines.h.

#define E1000_CTRL_SWDPIO2   0x01000000

Definition at line 364 of file e1000_defines.h.

#define E1000_CTRL_SWDPIO3   0x02000000

Definition at line 365 of file e1000_defines.h.

#define E1000_CTRL_RST   0x04000000

#define E1000_CTRL_RFCE   0x08000000

#define E1000_CTRL_TFCE   0x10000000

#define E1000_CTRL_RTE   0x20000000

Definition at line 369 of file e1000_defines.h.

#define E1000_CTRL_VME   0x40000000

Definition at line 370 of file e1000_defines.h.

#define E1000_CTRL_PHY_RST   0x80000000

#define E1000_CTRL_SW2FW_INT   0x02000000

Definition at line 372 of file e1000_defines.h.

#define E1000_CTRL_I2C_ENA   0x02000000

Definition at line 373 of file e1000_defines.h.

Referenced by igb_init_mac_params_82575().

#define E1000_CTRL_PHY_RESET_DIR   E1000_CTRL_SWDPIO0

Definition at line 379 of file e1000_defines.h.

#define E1000_CTRL_PHY_RESET   E1000_CTRL_SWDPIN0

Definition at line 380 of file e1000_defines.h.

#define E1000_CTRL_MDIO_DIR   E1000_CTRL_SWDPIO2

#define E1000_CTRL_MDIO   E1000_CTRL_SWDPIN2

#define E1000_CTRL_MDC_DIR   E1000_CTRL_SWDPIO3

Definition at line 383 of file e1000_defines.h.

Referenced by e1000_shift_out_mdi_bits_82543().

#define E1000_CTRL_MDC   E1000_CTRL_SWDPIN3

Definition at line 384 of file e1000_defines.h.

Referenced by e1000_lower_mdi_clk_82543(), and e1000_raise_mdi_clk_82543().

#define E1000_CTRL_PHY_RESET_DIR4   E1000_CTRL_EXT_SDP4_DIR

Definition at line 385 of file e1000_defines.h.

#define E1000_CTRL_PHY_RESET4   E1000_CTRL_EXT_SDP4_DATA

Definition at line 386 of file e1000_defines.h.

#define E1000_CONNSW_ENRGSRC   0x4

Definition at line 388 of file e1000_defines.h.

Referenced by igb_setup_serdes_link_82575().

#define E1000_PCS_CFG_PCS_EN   8

Definition at line 389 of file e1000_defines.h.

Referenced by igb_shutdown_serdes_link_82575().

#define E1000_PCS_LCTL_FLV_LINK_UP   1

Definition at line 390 of file e1000_defines.h.

Referenced by igb_setup_serdes_link_82575().

#define E1000_PCS_LCTL_FSV_10   0

Definition at line 391 of file e1000_defines.h.

#define E1000_PCS_LCTL_FSV_100   2

Definition at line 392 of file e1000_defines.h.

Referenced by igb_setup_serdes_link_82575().

#define E1000_PCS_LCTL_FSV_1000   4

Definition at line 393 of file e1000_defines.h.

Referenced by igb_setup_serdes_link_82575().

#define E1000_PCS_LCTL_FDV_FULL   8

Definition at line 394 of file e1000_defines.h.

Referenced by igb_setup_serdes_link_82575().

#define E1000_PCS_LCTL_FSD   0x10

Definition at line 395 of file e1000_defines.h.

Referenced by igb_setup_serdes_link_82575().

#define E1000_PCS_LCTL_FORCE_LINK   0x20

Definition at line 396 of file e1000_defines.h.

Referenced by igb_setup_serdes_link_82575().

#define E1000_PCS_LCTL_LOW_LINK_LATCH   0x40

Definition at line 397 of file e1000_defines.h.

#define E1000_PCS_LCTL_FORCE_FCTRL   0x80

Definition at line 398 of file e1000_defines.h.

Referenced by igb_setup_serdes_link_82575().

#define E1000_PCS_LCTL_AN_ENABLE   0x10000

Definition at line 399 of file e1000_defines.h.

Referenced by igb_setup_serdes_link_82575().

#define E1000_PCS_LCTL_AN_RESTART   0x20000

Definition at line 400 of file e1000_defines.h.

Referenced by igb_setup_serdes_link_82575().

#define E1000_PCS_LCTL_AN_TIMEOUT   0x40000

Definition at line 401 of file e1000_defines.h.

Referenced by igb_setup_serdes_link_82575().

#define E1000_PCS_LCTL_AN_SGMII_BYPASS   0x80000

Definition at line 402 of file e1000_defines.h.

#define E1000_PCS_LCTL_AN_SGMII_TRIGGER   0x100000

Definition at line 403 of file e1000_defines.h.

#define E1000_PCS_LCTL_FAST_LINK_TIMER   0x1000000

Definition at line 404 of file e1000_defines.h.

#define E1000_PCS_LCTL_LINK_OK_FIX   0x2000000

Definition at line 405 of file e1000_defines.h.

#define E1000_PCS_LCTL_CRS_ON_NI   0x4000000

Definition at line 406 of file e1000_defines.h.

#define E1000_ENABLE_SERDES_LOOPBACK   0x0410

Definition at line 407 of file e1000_defines.h.

#define E1000_PCS_LSTS_LINK_OK   1

Definition at line 409 of file e1000_defines.h.

Referenced by igb_get_pcs_speed_and_duplex_82575().

#define E1000_PCS_LSTS_SPEED_10   0

Definition at line 410 of file e1000_defines.h.

#define E1000_PCS_LSTS_SPEED_100   2

Definition at line 411 of file e1000_defines.h.

Referenced by igb_get_pcs_speed_and_duplex_82575().

#define E1000_PCS_LSTS_SPEED_1000   4

Definition at line 412 of file e1000_defines.h.

Referenced by igb_get_pcs_speed_and_duplex_82575().

#define E1000_PCS_LSTS_DUPLEX_FULL   8

Definition at line 413 of file e1000_defines.h.

Referenced by igb_get_pcs_speed_and_duplex_82575().

#define E1000_PCS_LSTS_SYNK_OK   0x10

Definition at line 414 of file e1000_defines.h.

Referenced by igb_get_pcs_speed_and_duplex_82575().

#define E1000_PCS_LSTS_AN_COMPLETE   0x10000

Definition at line 415 of file e1000_defines.h.

#define E1000_PCS_LSTS_AN_PAGE_RX   0x20000

Definition at line 416 of file e1000_defines.h.

#define E1000_PCS_LSTS_AN_TIMED_OUT   0x40000

Definition at line 417 of file e1000_defines.h.

#define E1000_PCS_LSTS_AN_REMOTE_FAULT   0x80000

Definition at line 418 of file e1000_defines.h.

#define E1000_PCS_LSTS_AN_ERROR_RWS   0x100000

Definition at line 419 of file e1000_defines.h.

#define E1000_STATUS_FD   0x00000001

#define E1000_STATUS_LU   0x00000002

#define E1000_STATUS_FUNC_MASK   0x0000000C

#define E1000_STATUS_FUNC_SHIFT   2

#define E1000_STATUS_FUNC_0   0x00000000

Definition at line 426 of file e1000_defines.h.

#define E1000_STATUS_FUNC_1   0x00000004

Definition at line 427 of file e1000_defines.h.

Referenced by e1000e_get_variants_82571().

#define E1000_STATUS_TXOFF   0x00000010

Definition at line 428 of file e1000_defines.h.

#define E1000_STATUS_TBIMODE   0x00000020

Definition at line 429 of file e1000_defines.h.

#define E1000_STATUS_SPEED_MASK   0x000000C0

Definition at line 430 of file e1000_defines.h.

#define E1000_STATUS_SPEED_10   0x00000000

Definition at line 431 of file e1000_defines.h.

#define E1000_STATUS_SPEED_100   0x00000040

#define E1000_STATUS_SPEED_1000   0x00000080

#define E1000_STATUS_LAN_INIT_DONE   0x00000200

Definition at line 434 of file e1000_defines.h.

Referenced by e1000e_lan_init_done_ich8lan().

#define E1000_STATUS_ASDV   0x00000300

Definition at line 435 of file e1000_defines.h.

#define E1000_STATUS_PHYRA   0x00000400

Definition at line 436 of file e1000_defines.h.

Referenced by e1000e_get_cfg_done_ich8lan(), and e1000e_reset_hw_ich8lan().

#define E1000_STATUS_DOCK_CI   0x00000800

Definition at line 437 of file e1000_defines.h.

#define E1000_STATUS_GIO_MASTER_ENABLE   0x00080000

#define E1000_STATUS_MTXCKOK   0x00000400

Definition at line 440 of file e1000_defines.h.

#define E1000_STATUS_PCI66   0x00000800

Definition at line 441 of file e1000_defines.h.

Referenced by e1000_get_bus_info_pci_generic().

#define E1000_STATUS_BUS64   0x00001000

Definition at line 442 of file e1000_defines.h.

Referenced by e1000_get_bus_info_pci_generic().

#define E1000_STATUS_PCIX_MODE   0x00002000

Definition at line 443 of file e1000_defines.h.

Referenced by e1000_get_bus_info_pci_generic().

#define E1000_STATUS_PCIX_SPEED   0x0000C000

Definition at line 444 of file e1000_defines.h.

Referenced by e1000_get_bus_info_pci_generic().

#define E1000_STATUS_BMC_SKU_0   0x00100000

Definition at line 445 of file e1000_defines.h.

#define E1000_STATUS_BMC_SKU_1   0x00200000

Definition at line 446 of file e1000_defines.h.

#define E1000_STATUS_BMC_SKU_2   0x00400000

Definition at line 447 of file e1000_defines.h.

#define E1000_STATUS_BMC_CRYPTO   0x00800000

Definition at line 448 of file e1000_defines.h.

#define E1000_STATUS_BMC_LITE   0x01000000

Definition at line 449 of file e1000_defines.h.

#define E1000_STATUS_RGMII_ENABLE   0x02000000

Definition at line 451 of file e1000_defines.h.

#define E1000_STATUS_FUSE_8   0x04000000

Definition at line 452 of file e1000_defines.h.

#define E1000_STATUS_FUSE_9   0x08000000

Definition at line 453 of file e1000_defines.h.

#define E1000_STATUS_SERDES0_DIS   0x10000000

Definition at line 454 of file e1000_defines.h.

#define E1000_STATUS_SERDES1_DIS   0x20000000

Definition at line 455 of file e1000_defines.h.

#define E1000_STATUS_PCIX_SPEED_66   0x00000000

Definition at line 458 of file e1000_defines.h.

Referenced by e1000_get_bus_info_pci_generic().

#define E1000_STATUS_PCIX_SPEED_100   0x00004000

Definition at line 459 of file e1000_defines.h.

Referenced by e1000_get_bus_info_pci_generic().

#define E1000_STATUS_PCIX_SPEED_133   0x00008000

Definition at line 460 of file e1000_defines.h.

Referenced by e1000_get_bus_info_pci_generic().

#define SPEED_10   10

Definition at line 462 of file e1000_defines.h.

#define SPEED_100   100

Definition at line 463 of file e1000_defines.h.

#define SPEED_1000   1000

Definition at line 464 of file e1000_defines.h.

#define HALF_DUPLEX   1

Definition at line 465 of file e1000_defines.h.

#define FULL_DUPLEX   2

Definition at line 466 of file e1000_defines.h.

#define PHY_FORCE_TIME   20

Definition at line 468 of file e1000_defines.h.

Referenced by e1000_polarity_reversal_workaround_82543().

#define ADVERTISE_10_HALF   0x0001

#define ADVERTISE_10_FULL   0x0002

#define ADVERTISE_100_HALF   0x0004

#define ADVERTISE_100_FULL   0x0008

#define ADVERTISE_1000_HALF   0x0010

#define ADVERTISE_1000_FULL   0x0020

#define E1000_ALL_SPEED_DUPLEX

#define E1000_ALL_NOT_GIG

#define E1000_ALL_100_SPEED   (ADVERTISE_100_HALF | ADVERTISE_100_FULL)

Definition at line 483 of file e1000_defines.h.

Referenced by igb_setup_serdes_link_82575().

#define E1000_ALL_10_SPEED   (ADVERTISE_10_HALF | ADVERTISE_10_FULL)

#define E1000_ALL_FULL_DUPLEX

#define E1000_ALL_HALF_DUPLEX   (ADVERTISE_10_HALF | ADVERTISE_100_HALF)

Definition at line 487 of file e1000_defines.h.

#define AUTONEG_ADVERTISE_SPEED_DEFAULT   E1000_ALL_SPEED_DUPLEX

#define E1000_LEDCTL_LED0_MODE_MASK   0x0000000F

#define E1000_LEDCTL_LED0_MODE_SHIFT   0

#define E1000_LEDCTL_LED0_BLINK_RATE   0x00000020

Definition at line 494 of file e1000_defines.h.

#define E1000_LEDCTL_LED0_IVRT   0x00000040

#define E1000_LEDCTL_LED0_BLINK   0x00000080

#define E1000_LEDCTL_LED1_MODE_MASK   0x00000F00

Definition at line 497 of file e1000_defines.h.

#define E1000_LEDCTL_LED1_MODE_SHIFT   8

Definition at line 498 of file e1000_defines.h.

#define E1000_LEDCTL_LED1_BLINK_RATE   0x00002000

Definition at line 499 of file e1000_defines.h.

#define E1000_LEDCTL_LED1_IVRT   0x00004000

Definition at line 500 of file e1000_defines.h.

#define E1000_LEDCTL_LED1_BLINK   0x00008000

Definition at line 501 of file e1000_defines.h.

#define E1000_LEDCTL_LED2_MODE_MASK   0x000F0000

Definition at line 502 of file e1000_defines.h.

#define E1000_LEDCTL_LED2_MODE_SHIFT   16

Definition at line 503 of file e1000_defines.h.

#define E1000_LEDCTL_LED2_BLINK_RATE   0x00200000

Definition at line 504 of file e1000_defines.h.

#define E1000_LEDCTL_LED2_IVRT   0x00400000

Definition at line 505 of file e1000_defines.h.

#define E1000_LEDCTL_LED2_BLINK   0x00800000

Definition at line 506 of file e1000_defines.h.

#define E1000_LEDCTL_LED3_MODE_MASK   0x0F000000

Definition at line 507 of file e1000_defines.h.

#define E1000_LEDCTL_LED3_MODE_SHIFT   24

Definition at line 508 of file e1000_defines.h.

#define E1000_LEDCTL_LED3_BLINK_RATE   0x20000000

Definition at line 509 of file e1000_defines.h.

#define E1000_LEDCTL_LED3_IVRT   0x40000000

Definition at line 510 of file e1000_defines.h.

#define E1000_LEDCTL_LED3_BLINK   0x80000000

Definition at line 511 of file e1000_defines.h.

#define E1000_LEDCTL_MODE_LINK_10_1000   0x0

Definition at line 513 of file e1000_defines.h.

#define E1000_LEDCTL_MODE_LINK_100_1000   0x1

Definition at line 514 of file e1000_defines.h.

#define E1000_LEDCTL_MODE_LINK_UP   0x2

#define E1000_LEDCTL_MODE_ACTIVITY   0x3

Definition at line 516 of file e1000_defines.h.

#define E1000_LEDCTL_MODE_LINK_ACTIVITY   0x4

Definition at line 517 of file e1000_defines.h.

#define E1000_LEDCTL_MODE_LINK_10   0x5

Definition at line 518 of file e1000_defines.h.

#define E1000_LEDCTL_MODE_LINK_100   0x6

Definition at line 519 of file e1000_defines.h.

#define E1000_LEDCTL_MODE_LINK_1000   0x7

Definition at line 520 of file e1000_defines.h.

#define E1000_LEDCTL_MODE_PCIX_MODE   0x8

Definition at line 521 of file e1000_defines.h.

#define E1000_LEDCTL_MODE_FULL_DUPLEX   0x9

Definition at line 522 of file e1000_defines.h.

#define E1000_LEDCTL_MODE_COLLISION   0xA

Definition at line 523 of file e1000_defines.h.

#define E1000_LEDCTL_MODE_BUS_SPEED   0xB

Definition at line 524 of file e1000_defines.h.

#define E1000_LEDCTL_MODE_BUS_SIZE   0xC

Definition at line 525 of file e1000_defines.h.

#define E1000_LEDCTL_MODE_PAUSED   0xD

Definition at line 526 of file e1000_defines.h.

#define E1000_LEDCTL_MODE_LED_ON   0xE

#define E1000_LEDCTL_MODE_LED_OFF   0xF

#define E1000_TXD_DTYP_D   0x00100000

Definition at line 531 of file e1000_defines.h.

#define E1000_TXD_DTYP_C   0x00000000

Definition at line 532 of file e1000_defines.h.

#define E1000_TXD_POPTS_SHIFT   8

Definition at line 533 of file e1000_defines.h.

#define E1000_TXD_POPTS_IXSM   0x01

Definition at line 534 of file e1000_defines.h.

#define E1000_TXD_POPTS_TXSM   0x02

Definition at line 535 of file e1000_defines.h.

#define E1000_TXD_CMD_EOP   0x01000000

Definition at line 536 of file e1000_defines.h.

Referenced by e1000_transmit(), e1000e_configure_tx(), and igb_configure_tx().

#define E1000_TXD_CMD_IFCS   0x02000000

Definition at line 537 of file e1000_defines.h.

Referenced by e1000_transmit(), e1000e_configure_tx(), and igb_configure_tx().

#define E1000_TXD_CMD_IC   0x04000000

Definition at line 538 of file e1000_defines.h.

#define E1000_TXD_CMD_RS   0x08000000

Definition at line 539 of file e1000_defines.h.

Referenced by e1000e_configure_tx(), and igb_configure_tx().

#define E1000_TXD_CMD_RPS   0x10000000

Definition at line 540 of file e1000_defines.h.

Referenced by e1000_transmit().

#define E1000_TXD_CMD_DEXT   0x20000000

Definition at line 541 of file e1000_defines.h.

#define E1000_TXD_CMD_VLE   0x40000000

Definition at line 542 of file e1000_defines.h.

#define E1000_TXD_CMD_IDE   0x80000000

Definition at line 543 of file e1000_defines.h.

#define E1000_TXD_STAT_DD   0x00000001

#define E1000_TXD_STAT_EC   0x00000002

#define E1000_TXD_STAT_LC   0x00000004

#define E1000_TXD_STAT_TU   0x00000008

#define E1000_TXD_CMD_TCP   0x01000000

Definition at line 548 of file e1000_defines.h.

#define E1000_TXD_CMD_IP   0x02000000

Definition at line 549 of file e1000_defines.h.

#define E1000_TXD_CMD_TSE   0x04000000

Definition at line 550 of file e1000_defines.h.

#define E1000_TXD_STAT_TC   0x00000004

Definition at line 551 of file e1000_defines.h.

#define E1000_TCTL_RST   0x00000001

Definition at line 555 of file e1000_defines.h.

#define E1000_TCTL_EN   0x00000002

Definition at line 556 of file e1000_defines.h.

Referenced by e1000_configure_tx(), e1000e_configure_tx(), and igb_configure_tx().

#define E1000_TCTL_BCE   0x00000004

Definition at line 557 of file e1000_defines.h.

#define E1000_TCTL_PSP   0x00000008

#define E1000_TCTL_CT   0x00000ff0

Definition at line 559 of file e1000_defines.h.

Referenced by e1000e_configure_tx(), and igb_configure_tx().

#define E1000_TCTL_COLD   0x003ff000

#define E1000_TCTL_SWXOFF   0x00400000

Definition at line 561 of file e1000_defines.h.

#define E1000_TCTL_PBE   0x00800000

Definition at line 562 of file e1000_defines.h.

#define E1000_TCTL_RTLC   0x01000000

#define E1000_TCTL_NRTU   0x02000000

Definition at line 564 of file e1000_defines.h.

#define E1000_TCTL_MULR   0x10000000

#define E1000_TARC0_ENABLE   0x00000400

Definition at line 568 of file e1000_defines.h.

#define E1000_SCTL_DISABLE_SERDES_LOOPBACK   0x0400

#define E1000_RXCSUM_PCSS_MASK   0x000000FF

Definition at line 574 of file e1000_defines.h.

#define E1000_RXCSUM_IPOFL   0x00000100

Definition at line 575 of file e1000_defines.h.

#define E1000_RXCSUM_TUOFL   0x00000200

Definition at line 576 of file e1000_defines.h.

Referenced by igb_configure_rx().

#define E1000_RXCSUM_IPV6OFL   0x00000400

Definition at line 577 of file e1000_defines.h.

#define E1000_RXCSUM_CRCOFL   0x00000800

Definition at line 578 of file e1000_defines.h.

#define E1000_RXCSUM_IPPCSE   0x00001000

Definition at line 579 of file e1000_defines.h.

Referenced by igb_configure_rx().

#define E1000_RXCSUM_PCSD   0x00002000

Definition at line 580 of file e1000_defines.h.

#define E1000_RFCTL_ISCSI_DIS   0x00000001

Definition at line 583 of file e1000_defines.h.

#define E1000_RFCTL_ISCSI_DWC_MASK   0x0000003E

Definition at line 584 of file e1000_defines.h.

#define E1000_RFCTL_ISCSI_DWC_SHIFT   1

Definition at line 585 of file e1000_defines.h.

#define E1000_RFCTL_NFSW_DIS   0x00000040

Definition at line 586 of file e1000_defines.h.

#define E1000_RFCTL_NFSR_DIS   0x00000080

Definition at line 587 of file e1000_defines.h.

#define E1000_RFCTL_NFS_VER_MASK   0x00000300

Definition at line 588 of file e1000_defines.h.

#define E1000_RFCTL_NFS_VER_SHIFT   8

Definition at line 589 of file e1000_defines.h.

#define E1000_RFCTL_IPV6_DIS   0x00000400

Definition at line 590 of file e1000_defines.h.

#define E1000_RFCTL_IPV6_XSUM_DIS   0x00000800

Definition at line 591 of file e1000_defines.h.

#define E1000_RFCTL_ACK_DIS   0x00001000

Definition at line 592 of file e1000_defines.h.

#define E1000_RFCTL_ACKD_DIS   0x00002000

Definition at line 593 of file e1000_defines.h.

#define E1000_RFCTL_IPFRSP_DIS   0x00004000

Definition at line 594 of file e1000_defines.h.

#define E1000_RFCTL_EXTEN   0x00008000

Definition at line 595 of file e1000_defines.h.

#define E1000_RFCTL_IPV6_EX_DIS   0x00010000

Definition at line 596 of file e1000_defines.h.

#define E1000_RFCTL_NEW_IPV6_EXT_DIS   0x00020000

Definition at line 597 of file e1000_defines.h.

#define E1000_RFCTL_LEF   0x00040000

Definition at line 598 of file e1000_defines.h.

Referenced by igb_rx_fifo_flush_82575().

#define E1000_COLLISION_THRESHOLD   15

Definition at line 601 of file e1000_defines.h.

Referenced by e1000_configure_tx(), e1000e_configure_tx(), and igb_configure_tx().

#define E1000_CT_SHIFT   4

Definition at line 602 of file e1000_defines.h.

Referenced by e1000_configure_tx(), e1000e_configure_tx(), and igb_configure_tx().

#define E1000_COLLISION_DISTANCE   63

#define E1000_COLD_SHIFT   12

#define DEFAULT_82542_TIPG_IPGT   10

Definition at line 607 of file e1000_defines.h.

#define DEFAULT_82543_TIPG_IPGT_FIBER   9

Definition at line 608 of file e1000_defines.h.

#define DEFAULT_82543_TIPG_IPGT_COPPER   8

Definition at line 609 of file e1000_defines.h.

Referenced by e1000e_configure_tx().

#define E1000_TIPG_IPGT_MASK   0x000003FF

#define E1000_TIPG_IPGR1_MASK   0x000FFC00

Definition at line 612 of file e1000_defines.h.

#define E1000_TIPG_IPGR2_MASK   0x3FF00000

Definition at line 613 of file e1000_defines.h.

#define DEFAULT_82542_TIPG_IPGR1   2

Definition at line 615 of file e1000_defines.h.

#define DEFAULT_82543_TIPG_IPGR1   8

Definition at line 616 of file e1000_defines.h.

Referenced by e1000e_configure_tx().

#define E1000_TIPG_IPGR1_SHIFT   10

Definition at line 617 of file e1000_defines.h.

Referenced by e1000e_configure_tx().

#define DEFAULT_82542_TIPG_IPGR2   10

Definition at line 619 of file e1000_defines.h.

#define DEFAULT_82543_TIPG_IPGR2   6

Definition at line 620 of file e1000_defines.h.

Referenced by e1000e_configure_tx().

#define DEFAULT_80003ES2LAN_TIPG_IPGR2   7

Definition at line 621 of file e1000_defines.h.

Referenced by e1000e_configure_tx().

#define E1000_TIPG_IPGR2_SHIFT   20

Definition at line 622 of file e1000_defines.h.

Referenced by e1000e_configure_tx().

#define ETHERNET_IEEE_VLAN_TYPE   0x8100

Definition at line 625 of file e1000_defines.h.

#define ETHERNET_FCS_SIZE   4

Definition at line 627 of file e1000_defines.h.

#define MAX_JUMBO_FRAME_SIZE   0x3F00

Definition at line 628 of file e1000_defines.h.

#define E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP   0x00000020

Definition at line 631 of file e1000_defines.h.

Referenced by e1000e_reset_hw_82571().

#define E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE   0x00000001

Definition at line 632 of file e1000_defines.h.

Referenced by e1000e_sw_lcd_config_ich8lan().

#define E1000_EXTCNF_CTRL_SWFLAG   0x00000020

#define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK   0x00FF0000

Definition at line 634 of file e1000_defines.h.

Referenced by e1000e_sw_lcd_config_ich8lan().

#define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT   16

Definition at line 635 of file e1000_defines.h.

Referenced by e1000e_sw_lcd_config_ich8lan().

#define E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK   0x0FFF0000

Definition at line 636 of file e1000_defines.h.

Referenced by e1000e_sw_lcd_config_ich8lan().

#define E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT   16

Definition at line 637 of file e1000_defines.h.

Referenced by e1000e_sw_lcd_config_ich8lan().

#define E1000_PHY_CTRL_SPD_EN   0x00000001

Definition at line 639 of file e1000_defines.h.

#define E1000_PHY_CTRL_D0A_LPLU   0x00000002

#define E1000_PHY_CTRL_NOND0A_LPLU   0x00000004

#define E1000_PHY_CTRL_NOND0A_GBE_DISABLE   0x00000008

#define E1000_PHY_CTRL_GBE_DISABLE   0x00000040

#define E1000_KABGTXD_BGSQLBIAS   0x00050000

Definition at line 645 of file e1000_defines.h.

Referenced by e1000e_reset_hw_ich8lan().

#define E1000_PBA_6K   0x0006

Definition at line 648 of file e1000_defines.h.

#define E1000_PBA_8K   0x0008

Definition at line 649 of file e1000_defines.h.

Referenced by e1000e_reset_hw_ich8lan().

#define E1000_PBA_10K   0x000A

Definition at line 650 of file e1000_defines.h.

#define E1000_PBA_12K   0x000C

Definition at line 651 of file e1000_defines.h.

#define E1000_PBA_14K   0x000E

Definition at line 652 of file e1000_defines.h.

#define E1000_PBA_16K   0x0010

Definition at line 653 of file e1000_defines.h.

#define E1000_PBA_18K   0x0012

Definition at line 654 of file e1000_defines.h.

#define E1000_PBA_20K   0x0014

Definition at line 655 of file e1000_defines.h.

#define E1000_PBA_22K   0x0016

Definition at line 656 of file e1000_defines.h.

#define E1000_PBA_24K   0x0018

Definition at line 657 of file e1000_defines.h.

#define E1000_PBA_26K   0x001A

Definition at line 658 of file e1000_defines.h.

#define E1000_PBA_30K   0x001E

Definition at line 659 of file e1000_defines.h.

Referenced by e1000_reset().

#define E1000_PBA_32K   0x0020

Definition at line 660 of file e1000_defines.h.

#define E1000_PBA_34K   0x0022

Definition at line 661 of file e1000_defines.h.

Referenced by igb_reset().

#define E1000_PBA_35K   0x0023

Definition at line 662 of file e1000_defines.h.

#define E1000_PBA_38K   0x0026

Definition at line 663 of file e1000_defines.h.

#define E1000_PBA_40K   0x0028

Definition at line 664 of file e1000_defines.h.

#define E1000_PBA_48K   0x0030

Definition at line 665 of file e1000_defines.h.

Referenced by e1000_reset().

#define E1000_PBA_64K   0x0040

Definition at line 666 of file e1000_defines.h.

#define E1000_PBS_16K   E1000_PBA_16K

Definition at line 668 of file e1000_defines.h.

Referenced by e1000e_reset_hw_ich8lan().

#define E1000_PBS_24K   E1000_PBA_24K

Definition at line 669 of file e1000_defines.h.

#define IFS_MAX   80

#define IFS_MIN   40

#define IFS_RATIO   4

#define IFS_STEP   10

#define MIN_NUM_XMITS   1000

#define E1000_SWSM_SMBI   0x00000001

#define E1000_SWSM_SWESMBI   0x00000002

#define E1000_SWSM_WMNG   0x00000004

Definition at line 680 of file e1000_defines.h.

#define E1000_SWSM_DRV_LOAD   0x00000008

Definition at line 681 of file e1000_defines.h.

Referenced by e1000e_get_hw_control().

#define E1000_SWSM2_LOCK   0x00000002

Definition at line 683 of file e1000_defines.h.

Referenced by e1000e_init_mac_params_82571().

#define E1000_ICR_TXDW   0x00000001

Definition at line 686 of file e1000_defines.h.

#define E1000_ICR_TXQE   0x00000002

Definition at line 687 of file e1000_defines.h.

#define E1000_ICR_LSC   0x00000004

Definition at line 688 of file e1000_defines.h.

#define E1000_ICR_RXSEQ   0x00000008

Definition at line 689 of file e1000_defines.h.

#define E1000_ICR_RXDMT0   0x00000010

Definition at line 690 of file e1000_defines.h.

#define E1000_ICR_RXO   0x00000040

Definition at line 691 of file e1000_defines.h.

#define E1000_ICR_RXT0   0x00000080

Definition at line 692 of file e1000_defines.h.

#define E1000_ICR_VMMB   0x00000100

Definition at line 693 of file e1000_defines.h.

#define E1000_ICR_MDAC   0x00000200

Definition at line 694 of file e1000_defines.h.

#define E1000_ICR_RXCFG   0x00000400

Definition at line 695 of file e1000_defines.h.

#define E1000_ICR_GPI_EN0   0x00000800

Definition at line 696 of file e1000_defines.h.

#define E1000_ICR_GPI_EN1   0x00001000

Definition at line 697 of file e1000_defines.h.

#define E1000_ICR_GPI_EN2   0x00002000

Definition at line 698 of file e1000_defines.h.

#define E1000_ICR_GPI_EN3   0x00004000

Definition at line 699 of file e1000_defines.h.

#define E1000_ICR_TXD_LOW   0x00008000

Definition at line 700 of file e1000_defines.h.

#define E1000_ICR_SRPD   0x00010000

Definition at line 701 of file e1000_defines.h.

#define E1000_ICR_ACK   0x00020000

Definition at line 702 of file e1000_defines.h.

#define E1000_ICR_MNG   0x00040000

Definition at line 703 of file e1000_defines.h.

#define E1000_ICR_DOCK   0x00080000

Definition at line 704 of file e1000_defines.h.

#define E1000_ICR_INT_ASSERTED   0x80000000

Definition at line 705 of file e1000_defines.h.

#define E1000_ICR_RXD_FIFO_PAR0   0x00100000

Definition at line 707 of file e1000_defines.h.

#define E1000_ICR_TXD_FIFO_PAR0   0x00200000

Definition at line 708 of file e1000_defines.h.

#define E1000_ICR_HOST_ARB_PAR   0x00400000

Definition at line 709 of file e1000_defines.h.

#define E1000_ICR_PB_PAR   0x00800000

Definition at line 710 of file e1000_defines.h.

#define E1000_ICR_RXD_FIFO_PAR1   0x01000000

Definition at line 711 of file e1000_defines.h.

#define E1000_ICR_TXD_FIFO_PAR1   0x02000000

Definition at line 712 of file e1000_defines.h.

#define E1000_ICR_ALL_PARITY   0x03F00000

Definition at line 713 of file e1000_defines.h.

#define E1000_ICR_DSW   0x00000020

Definition at line 714 of file e1000_defines.h.

#define E1000_ICR_PHYINT   0x00001000

Definition at line 716 of file e1000_defines.h.

#define E1000_ICR_DOUTSYNC   0x10000000

Definition at line 718 of file e1000_defines.h.

#define E1000_ICR_EPRST   0x00100000

Definition at line 719 of file e1000_defines.h.

#define POLL_IMS_ENABLE_MASK

Value:

Definition at line 728 of file e1000_defines.h.

#define IMS_ENABLE_MASK

#define E1000_IMS_TXDW   E1000_ICR_TXDW

Definition at line 749 of file e1000_defines.h.

#define E1000_IMS_TXQE   E1000_ICR_TXQE

Definition at line 750 of file e1000_defines.h.

#define E1000_IMS_LSC   E1000_ICR_LSC

Definition at line 751 of file e1000_defines.h.

#define E1000_IMS_VMMB   E1000_ICR_VMMB

Definition at line 752 of file e1000_defines.h.

#define E1000_IMS_RXSEQ   E1000_ICR_RXSEQ

Definition at line 753 of file e1000_defines.h.

#define E1000_IMS_RXDMT0   E1000_ICR_RXDMT0

Definition at line 754 of file e1000_defines.h.

#define E1000_IMS_RXO   E1000_ICR_RXO

Definition at line 755 of file e1000_defines.h.

#define E1000_IMS_RXT0   E1000_ICR_RXT0

Definition at line 756 of file e1000_defines.h.

#define E1000_IMS_MDAC   E1000_ICR_MDAC

Definition at line 757 of file e1000_defines.h.

#define E1000_IMS_RXCFG   E1000_ICR_RXCFG

Definition at line 758 of file e1000_defines.h.

#define E1000_IMS_GPI_EN0   E1000_ICR_GPI_EN0

Definition at line 759 of file e1000_defines.h.

#define E1000_IMS_GPI_EN1   E1000_ICR_GPI_EN1

Definition at line 760 of file e1000_defines.h.

#define E1000_IMS_GPI_EN2   E1000_ICR_GPI_EN2

Definition at line 761 of file e1000_defines.h.

#define E1000_IMS_GPI_EN3   E1000_ICR_GPI_EN3

Definition at line 762 of file e1000_defines.h.

#define E1000_IMS_TXD_LOW   E1000_ICR_TXD_LOW

Definition at line 763 of file e1000_defines.h.

#define E1000_IMS_SRPD   E1000_ICR_SRPD

Definition at line 764 of file e1000_defines.h.

#define E1000_IMS_ACK   E1000_ICR_ACK

Definition at line 765 of file e1000_defines.h.

#define E1000_IMS_MNG   E1000_ICR_MNG

Definition at line 766 of file e1000_defines.h.

#define E1000_IMS_DOCK   E1000_ICR_DOCK

Definition at line 767 of file e1000_defines.h.

#define E1000_IMS_RXD_FIFO_PAR0   E1000_ICR_RXD_FIFO_PAR0

Definition at line 768 of file e1000_defines.h.

#define E1000_IMS_TXD_FIFO_PAR0   E1000_ICR_TXD_FIFO_PAR0

Definition at line 770 of file e1000_defines.h.

#define E1000_IMS_HOST_ARB_PAR   E1000_ICR_HOST_ARB_PAR

Definition at line 772 of file e1000_defines.h.

#define E1000_IMS_PB_PAR   E1000_ICR_PB_PAR

Definition at line 774 of file e1000_defines.h.

#define E1000_IMS_RXD_FIFO_PAR1   E1000_ICR_RXD_FIFO_PAR1

Definition at line 776 of file e1000_defines.h.

#define E1000_IMS_TXD_FIFO_PAR1   E1000_ICR_TXD_FIFO_PAR1

Definition at line 778 of file e1000_defines.h.

#define E1000_IMS_DSW   E1000_ICR_DSW

Definition at line 780 of file e1000_defines.h.

#define E1000_IMS_PHYINT   E1000_ICR_PHYINT

Definition at line 781 of file e1000_defines.h.

#define E1000_IMS_DOUTSYNC   E1000_ICR_DOUTSYNC

Definition at line 782 of file e1000_defines.h.

#define E1000_IMS_EPRST   E1000_ICR_EPRST

Definition at line 783 of file e1000_defines.h.

#define E1000_ICS_TXDW   E1000_ICR_TXDW

Definition at line 786 of file e1000_defines.h.

#define E1000_ICS_TXQE   E1000_ICR_TXQE

Definition at line 787 of file e1000_defines.h.

#define E1000_ICS_LSC   E1000_ICR_LSC

Definition at line 788 of file e1000_defines.h.

Referenced by e1000_check_for_copper_link_82543().

#define E1000_ICS_RXSEQ   E1000_ICR_RXSEQ

Definition at line 789 of file e1000_defines.h.

#define E1000_ICS_RXDMT0   E1000_ICR_RXDMT0

Definition at line 790 of file e1000_defines.h.

#define E1000_ICS_RXO   E1000_ICR_RXO

Definition at line 791 of file e1000_defines.h.

#define E1000_ICS_RXT0   E1000_ICR_RXT0

Definition at line 792 of file e1000_defines.h.

#define E1000_ICS_MDAC   E1000_ICR_MDAC

Definition at line 793 of file e1000_defines.h.

#define E1000_ICS_RXCFG   E1000_ICR_RXCFG

Definition at line 794 of file e1000_defines.h.

#define E1000_ICS_GPI_EN0   E1000_ICR_GPI_EN0

Definition at line 795 of file e1000_defines.h.

#define E1000_ICS_GPI_EN1   E1000_ICR_GPI_EN1

Definition at line 796 of file e1000_defines.h.

#define E1000_ICS_GPI_EN2   E1000_ICR_GPI_EN2

Definition at line 797 of file e1000_defines.h.

#define E1000_ICS_GPI_EN3   E1000_ICR_GPI_EN3

Definition at line 798 of file e1000_defines.h.

#define E1000_ICS_TXD_LOW   E1000_ICR_TXD_LOW

Definition at line 799 of file e1000_defines.h.

#define E1000_ICS_SRPD   E1000_ICR_SRPD

Definition at line 800 of file e1000_defines.h.

#define E1000_ICS_ACK   E1000_ICR_ACK

Definition at line 801 of file e1000_defines.h.

#define E1000_ICS_MNG   E1000_ICR_MNG

Definition at line 802 of file e1000_defines.h.

#define E1000_ICS_DOCK   E1000_ICR_DOCK

Definition at line 803 of file e1000_defines.h.

#define E1000_ICS_RXD_FIFO_PAR0   E1000_ICR_RXD_FIFO_PAR0

Definition at line 804 of file e1000_defines.h.

#define E1000_ICS_TXD_FIFO_PAR0   E1000_ICR_TXD_FIFO_PAR0

Definition at line 806 of file e1000_defines.h.

#define E1000_ICS_HOST_ARB_PAR   E1000_ICR_HOST_ARB_PAR

Definition at line 808 of file e1000_defines.h.

#define E1000_ICS_PB_PAR   E1000_ICR_PB_PAR

Definition at line 810 of file e1000_defines.h.

#define E1000_ICS_RXD_FIFO_PAR1   E1000_ICR_RXD_FIFO_PAR1

Definition at line 812 of file e1000_defines.h.

#define E1000_ICS_TXD_FIFO_PAR1   E1000_ICR_TXD_FIFO_PAR1

Definition at line 814 of file e1000_defines.h.

#define E1000_ICS_DSW   E1000_ICR_DSW

Definition at line 816 of file e1000_defines.h.

#define E1000_ICS_DOUTSYNC   E1000_ICR_DOUTSYNC

Definition at line 817 of file e1000_defines.h.

#define E1000_ICS_PHYINT   E1000_ICR_PHYINT

Definition at line 818 of file e1000_defines.h.

#define E1000_ICS_EPRST   E1000_ICR_EPRST

Definition at line 819 of file e1000_defines.h.

#define E1000_TXDCTL_PTHRESH   0x0000003F

Definition at line 822 of file e1000_defines.h.

Referenced by e1000e_init_hw_ich8lan().

#define E1000_TXDCTL_HTHRESH   0x00003F00

Definition at line 823 of file e1000_defines.h.

#define E1000_TXDCTL_WTHRESH   0x003F0000

#define E1000_TXDCTL_GRAN   0x01000000

Definition at line 825 of file e1000_defines.h.

#define E1000_TXDCTL_LWTHRESH   0xFE000000

Definition at line 826 of file e1000_defines.h.

#define E1000_TXDCTL_FULL_TX_DESC_WB   0x01010000

#define E1000_TXDCTL_MAX_TX_DESC_PREFETCH   0x0100001F

Definition at line 828 of file e1000_defines.h.

Referenced by e1000e_init_hw_ich8lan().

#define E1000_TXDCTL_COUNT_DESC   0x00400000

Definition at line 830 of file e1000_defines.h.

Referenced by e1000e_init_hw_80003es2lan(), and e1000e_init_hw_82571().

#define FLOW_CONTROL_ADDRESS_LOW   0x00C28001

#define FLOW_CONTROL_ADDRESS_HIGH   0x00000100

#define FLOW_CONTROL_TYPE   0x8808

#define VLAN_TAG_SIZE   4

Definition at line 838 of file e1000_defines.h.

#define E1000_VLAN_FILTER_TBL_SIZE   128

#define E1000_RAR_ENTRIES   15

#define E1000_RAH_AV   0x80000000

#define E1000_RAL_MAC_ADDR_LEN   4

#define E1000_RAH_MAC_ADDR_LEN   2

#define E1000_RAH_POOL_MASK   0x03FC0000

Definition at line 853 of file e1000_defines.h.

#define E1000_RAH_POOL_1   0x00040000

Definition at line 854 of file e1000_defines.h.

#define E1000_SUCCESS   0

Definition at line 857 of file e1000_defines.h.

Referenced by __e1000e_read_kmrn_reg(), __e1000e_read_phy_reg_igp(), __e1000e_write_kmrn_reg(), __e1000e_write_phy_reg_igp(), __igb_read_kmrn_reg(), __igb_read_phy_reg_igp(), __igb_write_kmrn_reg(), __igb_write_phy_reg_igp(), e1000_acquire_nvm_generic(), e1000_acquire_phy(), e1000_adjust_serdes_amplitude_82540(), e1000_blink_led(), e1000_blink_led_generic(), e1000_check_alt_mac_addr_generic(), e1000_check_downshift_generic(), e1000_check_for_copper_link_82543(), e1000_check_for_copper_link_generic(), e1000_check_for_fiber_link_82543(), e1000_check_for_fiber_link_generic(), e1000_check_for_link_82541(), e1000_check_for_serdes_link_generic(), e1000_check_reset_block(), e1000_check_reset_block_generic(), e1000_cleanup_led(), e1000_cleanup_led_generic(), e1000_commit_fc_settings_generic(), e1000_config_fc_after_link_up_generic(), e1000_config_mac_to_phy_82543(), e1000_copper_link_setup_igp(), e1000_copper_link_setup_m88(), e1000_determine_phy_address(), e1000_disable_pcie_master_generic(), e1000_force_mac_fc_generic(), e1000_get_auto_rd_done_generic(), e1000_get_bus_info(), e1000_get_bus_info_82542(), e1000_get_bus_info_pci_generic(), e1000_get_bus_info_pcie_generic(), e1000_get_cfg_done_generic(), e1000_get_hw_semaphore_generic(), e1000_get_phy_id(), e1000_get_phy_info(), e1000_get_speed_and_duplex_copper_generic(), e1000_get_speed_and_duplex_fiber_serdes_generic(), e1000_id_led_init(), e1000_init_hw_82540(), e1000_init_hw_82542(), e1000_init_mac_params(), e1000_init_mac_params_82540(), e1000_init_mac_params_82541(), e1000_init_mac_params_82542(), e1000_init_mac_params_82543(), e1000_init_nvm_params(), e1000_init_nvm_params_82540(), e1000_init_nvm_params_82541(), e1000_init_nvm_params_82542(), e1000_init_nvm_params_82543(), e1000_init_phy_params(), e1000_init_phy_params_82540(), e1000_init_phy_params_82541(), e1000_init_phy_params_82542(), e1000_init_phy_params_82543(), e1000_led_off(), e1000_led_off_82542(), e1000_led_off_82543(), e1000_led_off_generic(), e1000_led_on(), e1000_led_on_82542(), e1000_led_on_82543(), e1000_led_on_generic(), e1000_null_led_default(), e1000_null_link_info(), e1000_null_lplu_state(), e1000_null_ops_generic(), e1000_null_read_nvm(), e1000_null_read_reg(), e1000_null_write_nvm(), e1000_null_write_reg(), e1000_phy_commit(), e1000_phy_has_link_generic(), e1000_phy_hw_reset(), e1000_phy_hw_reset_82543(), e1000_phy_hw_reset_generic(), e1000_phy_init_script_82541(), e1000_phy_init_script_igp3(), e1000_phy_reset_dsp_generic(), e1000_phy_sw_reset_generic(), e1000_polarity_reversal_workaround_82543(), e1000_poll_eerd_eewr_done(), e1000_poll_fiber_serdes_link_generic(), e1000_read_kmrn_reg_generic(), e1000_read_mac_addr_82540(), e1000_read_mac_addr_generic(), e1000_read_nvm_eerd(), e1000_read_phy_reg(), e1000_read_phy_reg_82543(), e1000_read_phy_reg_igp(), e1000_read_phy_reg_m88(), e1000_read_phy_reg_mdic(), e1000_ready_nvm_eeprom(), e1000_reset_hw_82540(), e1000_reset_hw_82541(), e1000_reset_hw_82542(), e1000_reset_hw_82543(), e1000_set_d0_lplu_state(), e1000_set_d3_lplu_state(), e1000_set_d3_lplu_state_generic(), e1000_set_default_fc_generic(), e1000_set_fc_watermarks_generic(), e1000_set_mac_type(), e1000_set_phy_mode_82540(), e1000_set_vco_speed_82540(), e1000_setup_copper_link_82540(), e1000_setup_fiber_serdes_link_82540(), e1000_setup_fiber_serdes_link_generic(), e1000_setup_led(), e1000_setup_led_generic(), e1000_setup_link_82542(), e1000_setup_link_generic(), e1000_validate_mdi_setting(), e1000_validate_mdi_setting_generic(), e1000_validate_nvm_checksum_generic(), e1000_wait_autoneg(), e1000_wait_autoneg_generic(), e1000_write_kmrn_reg_generic(), e1000_write_nvm(), e1000_write_phy_reg(), e1000_write_phy_reg_82543(), e1000_write_phy_reg_igp(), e1000_write_phy_reg_m88(), e1000_write_phy_reg_mdic(), e1000e_acquire_nvm(), e1000e_acquire_nvm_ich8lan(), e1000e_acquire_swflag_ich8lan(), e1000e_acquire_swfw_sync_80003es2lan(), e1000e_blink_led(), e1000e_cfg_kmrn_1000_80003es2lan(), e1000e_cfg_kmrn_10_100_80003es2lan(), e1000e_cfg_on_link_up_80003es2lan(), e1000e_check_alt_mac_addr_generic(), e1000e_check_downshift(), e1000e_check_for_copper_link(), e1000e_check_for_copper_link_ich8lan(), e1000e_check_for_fiber_link(), e1000e_check_for_serdes_link(), e1000e_check_for_serdes_link_82571(), e1000e_check_reset_block_generic(), e1000e_check_reset_block_ich8lan(), e1000e_cleanup_led_generic(), e1000e_cleanup_led_ich8lan(), e1000e_commit_fc_settings_generic(), e1000e_config_fc_after_link_up(), e1000e_configure_k1_ich8lan(), e1000e_copper_link_setup_82577(), e1000e_copper_link_setup_igp(), e1000e_copper_link_setup_m88(), e1000e_determine_phy_address(), e1000e_disable_pcie_master(), e1000e_erase_flash_bank_ich8lan(), e1000e_fix_nvm_checksum_82571(), e1000e_flash_cycle_ich8lan(), e1000e_flash_cycle_init_ich8lan(), e1000e_force_mac_fc(), e1000e_get_auto_rd_done(), e1000e_get_bus_info_pcie(), e1000e_get_cfg_done(), e1000e_get_cfg_done_80003es2lan(), e1000e_get_cfg_done_82571(), e1000e_get_cfg_done_ich8lan(), e1000e_get_hw_semaphore(), e1000e_get_hw_semaphore_82571(), e1000e_get_phy_id(), e1000e_get_phy_id_82571(), e1000e_get_speed_and_duplex_copper(), e1000e_get_speed_and_duplex_fiber_serdes(), e1000e_gig_downshift_workaround_ich8lan(), e1000e_hv_phy_workarounds_ich8lan(), e1000e_id_led_init(), e1000e_init_mac_params_80003es2lan(), e1000e_init_mac_params_82571(), e1000e_init_mac_params_ich8lan(), e1000e_init_nvm_params_80003es2lan(), e1000e_init_nvm_params_82571(), e1000e_init_nvm_params_ich8lan(), e1000e_init_phy_params_80003es2lan(), e1000e_init_phy_params_82571(), e1000e_init_phy_params_ich8lan(), e1000e_init_phy_params_pchlan(), e1000e_k1_gig_workaround_hv(), e1000e_kmrn_lock_loss_workaround_ich8lan(), e1000e_led_off_generic(), e1000e_led_off_ich8lan(), e1000e_led_on_82574(), e1000e_led_on_generic(), e1000e_led_on_ich8lan(), e1000e_link_stall_workaround_hv(), e1000e_phy_has_link_generic(), e1000e_phy_hw_reset_generic(), e1000e_phy_hw_reset_ich8lan(), e1000e_phy_init_script_igp3(), e1000e_phy_reset_dsp(), e1000e_phy_sw_reset(), e1000e_poll_eerd_eewr_done(), e1000e_poll_fiber_serdes_link_generic(), e1000e_read_flash_byte_ich8lan(), e1000e_read_flash_data_ich8lan(), e1000e_read_kmrn_reg_80003es2lan(), e1000e_read_mac_addr_80003es2lan(), e1000e_read_mac_addr_82571(), e1000e_read_mac_addr_generic(), e1000e_read_nvm_eerd(), e1000e_read_nvm_ich8lan(), e1000e_read_pcie_cap_reg(), e1000e_read_phy_reg_m88(), e1000e_read_phy_reg_mdic(), e1000e_ready_nvm_eeprom(), e1000e_release_swfw_sync_80003es2lan(), e1000e_retry_write_flash_byte_ich8lan(), e1000e_set_d0_lplu_state_82571(), e1000e_set_d0_lplu_state_ich8lan(), e1000e_set_d3_lplu_state(), e1000e_set_d3_lplu_state_ich8lan(), e1000e_set_default_fc_generic(), e1000e_set_fc_watermarks(), e1000e_set_lplu_state_pchlan(), e1000e_set_mdio_slow_mode_hv(), e1000e_setup_fiber_serdes_link(), e1000e_setup_led_generic(), e1000e_setup_link(), e1000e_setup_link_ich8lan(), e1000e_sw_init(), e1000e_update_nvm_checksum_ich8lan(), e1000e_valid_nvm_bank_detect_ich8lan(), e1000e_validate_mdi_setting_generic(), e1000e_validate_nvm_checksum_generic(), e1000e_validate_nvm_checksum_ich8lan(), e1000e_wait_autoneg(), e1000e_write_flash_data_ich8lan(), e1000e_write_kmrn_reg_80003es2lan(), e1000e_write_nvm_82571(), e1000e_write_nvm_ich8lan(), e1000e_write_phy_reg_m88(), e1000e_write_phy_reg_mdic(), igb_acquire_nvm_generic(), igb_acquire_phy(), igb_acquire_swfw_sync_82575(), igb_blink_led(), igb_check_alt_mac_addr_generic(), igb_check_downshift_generic(), igb_check_for_copper_link_generic(), igb_check_for_fiber_link_generic(), igb_check_for_serdes_link_generic(), igb_check_reset_block(), igb_check_reset_block_generic(), igb_cleanup_led(), igb_commit_fc_settings_generic(), igb_config_fc_after_link_up_generic(), igb_copper_link_setup_igp(), igb_copper_link_setup_m88(), igb_determine_phy_address(), igb_disable_pcie_master_generic(), igb_force_mac_fc_generic(), igb_get_auto_rd_done_generic(), igb_get_bus_info(), igb_get_bus_info_pcie_generic(), igb_get_cfg_done_82575(), igb_get_cfg_done_generic(), igb_get_hw_semaphore_generic(), igb_get_pcs_speed_and_duplex_82575(), igb_get_phy_id(), igb_get_phy_id_82575(), igb_get_phy_info(), igb_get_speed_and_duplex_copper_generic(), igb_get_speed_and_duplex_fiber_serdes_generic(), igb_id_led_init(), igb_init_mac_params(), igb_init_mac_params_82575(), igb_init_nvm_params(), igb_init_nvm_params_82575(), igb_init_phy_params(), igb_init_phy_params_82575(), igb_led_off(), igb_led_on(), igb_phy_commit(), igb_phy_has_link_generic(), igb_phy_hw_reset(), igb_phy_hw_reset_generic(), igb_phy_hw_reset_sgmii_82575(), igb_phy_init_script_igp3(), igb_phy_reset_dsp_generic(), igb_phy_sw_reset_generic(), igb_poll_eerd_eewr_done(), igb_poll_fiber_serdes_link_generic(), igb_read_mac_addr_82575(), igb_read_mac_addr_generic(), igb_read_nvm_eerd(), igb_read_pcie_cap_reg(), igb_read_phy_reg(), igb_read_phy_reg_i2c(), igb_read_phy_reg_m88(), igb_read_phy_reg_mdic(), igb_ready_nvm_eeprom(), igb_release_swfw_sync_82575(), igb_reset_init_script_82575(), igb_set_d0_lplu_state(), igb_set_d0_lplu_state_82575(), igb_set_d3_lplu_state(), igb_set_d3_lplu_state_generic(), igb_set_default_fc_generic(), igb_set_fc_watermarks_generic(), igb_set_mac_type(), igb_set_pcie_completion_timeout(), igb_setup_fiber_serdes_link_generic(), igb_setup_led(), igb_setup_link_generic(), igb_setup_serdes_link_82575(), igb_validate_mdi_setting(), igb_validate_mdi_setting_generic(), igb_validate_nvm_checksum_generic(), igb_wait_autoneg(), igb_wait_autoneg_generic(), igb_write_8bit_ctrl_reg_generic(), igb_write_nvm(), igb_write_pcie_cap_reg(), igb_write_phy_reg(), igb_write_phy_reg_i2c(), igb_write_phy_reg_m88(), and igb_write_phy_reg_mdic().

#define E1000_ERR_NVM   1

#define E1000_ERR_PHY   2

#define E1000_ERR_CONFIG   3

Definition at line 860 of file e1000_defines.h.

Referenced by e1000_check_for_copper_link_82543(), e1000_check_for_copper_link_generic(), e1000_check_for_link(), e1000_check_for_link_82541(), e1000_cleanup_led_generic(), e1000_commit_fc_settings_generic(), e1000_force_mac_fc_generic(), e1000_get_phy_info_igp(), e1000_get_phy_info_m88(), e1000_get_speed_and_duplex(), e1000_init_hw(), e1000_init_mac_params(), e1000_init_mac_params_82540(), e1000_init_nvm_params(), e1000_init_phy_params(), e1000_phy_setup_autoneg(), e1000_read_nvm(), e1000_read_pcie_cap_reg(), e1000_reset_hw(), e1000_setup_init_funcs(), e1000_setup_led_generic(), e1000_setup_link(), e1000_update_nvm_checksum(), e1000_validate_mdi_setting_generic(), e1000_validate_nvm_checksum(), e1000e_acquire_swflag_ich8lan(), e1000e_check_for_copper_link(), e1000e_check_for_copper_link_ich8lan(), e1000e_cleanup_led_generic(), e1000e_commit_fc_settings_generic(), e1000e_force_mac_fc(), e1000e_get_cfg_done_ich8lan(), e1000e_get_phy_info_82577(), e1000e_get_phy_info_ife_ich8lan(), e1000e_get_phy_info_igp(), e1000e_get_phy_info_m88(), e1000e_init_mac_params_80003es2lan(), e1000e_init_mac_params_82571(), e1000e_init_nvm_params_ich8lan(), e1000e_phy_setup_autoneg(), e1000e_read_pcie_cap_reg(), e1000e_setup_led_generic(), e1000e_validate_mdi_setting_generic(), igb_check_for_copper_link_generic(), igb_check_for_link(), igb_commit_fc_settings_generic(), igb_force_mac_fc_generic(), igb_get_phy_info_igp(), igb_get_phy_info_m88(), igb_get_speed_and_duplex(), igb_init_hw(), igb_init_mac_params(), igb_init_nvm_params(), igb_init_phy_params(), igb_phy_setup_autoneg(), igb_read_nvm(), igb_read_pcie_cap_reg(), igb_reset_hw(), igb_setup_init_funcs(), igb_setup_link(), igb_update_nvm_checksum(), igb_validate_mdi_setting_generic(), igb_validate_nvm_checksum(), and igb_write_pcie_cap_reg().

#define E1000_ERR_PARAM   4

#define E1000_ERR_MAC_INIT   5

Definition at line 862 of file e1000_defines.h.

Referenced by e1000_set_mac_type(), and igb_set_mac_type().

#define E1000_ERR_PHY_TYPE   6

#define E1000_ERR_RESET   9

#define E1000_ERR_MASTER_REQUESTS_PENDING   10

#define E1000_ERR_HOST_INTERFACE_COMMAND   11

Definition at line 866 of file e1000_defines.h.

#define E1000_BLK_PHY_RESET   12

#define E1000_ERR_SWFW_SYNC   13

#define E1000_NOT_IMPLEMENTED   14

#define E1000_ERR_MBX   15

Definition at line 870 of file e1000_defines.h.

#define FIBER_LINK_UP_LIMIT   50

#define COPPER_LINK_UP_LIMIT   10

#define PHY_AUTO_NEG_LIMIT   45

#define PHY_FORCE_LIMIT   20

Definition at line 876 of file e1000_defines.h.

#define MASTER_DISABLE_TIMEOUT   800

#define PHY_CFG_TIMEOUT   100

#define MDIO_OWNERSHIP_TIMEOUT   10

Definition at line 882 of file e1000_defines.h.

Referenced by e1000e_reset_hw_82571().

#define AUTO_READ_DONE_TIMEOUT   10

#define E1000_FCRTH_RTH   0x0000FFF8

Definition at line 887 of file e1000_defines.h.

#define E1000_FCRTH_XFCE   0x80000000

Definition at line 888 of file e1000_defines.h.

#define E1000_FCRTL_RTL   0x0000FFF8

Definition at line 889 of file e1000_defines.h.

#define E1000_FCRTL_XONE   0x80000000

#define E1000_TXCW_FD   0x00000020

#define E1000_TXCW_HD   0x00000040

Definition at line 894 of file e1000_defines.h.

#define E1000_TXCW_PAUSE   0x00000080

Definition at line 895 of file e1000_defines.h.

#define E1000_TXCW_ASM_DIR   0x00000100

#define E1000_TXCW_PAUSE_MASK   0x00000180

#define E1000_TXCW_RF   0x00003000

Definition at line 898 of file e1000_defines.h.

#define E1000_TXCW_NP   0x00008000

Definition at line 899 of file e1000_defines.h.

#define E1000_TXCW_CW   0x0000ffff

Definition at line 900 of file e1000_defines.h.

#define E1000_TXCW_TXC   0x40000000

Definition at line 901 of file e1000_defines.h.

#define E1000_TXCW_ANE   0x80000000

#define E1000_RXCW_CW   0x0000ffff

Definition at line 905 of file e1000_defines.h.

#define E1000_RXCW_NC   0x04000000

Definition at line 906 of file e1000_defines.h.

#define E1000_RXCW_IV   0x08000000

#define E1000_RXCW_CC   0x10000000

Definition at line 908 of file e1000_defines.h.

#define E1000_RXCW_C   0x20000000

#define E1000_RXCW_SYNCH   0x40000000

#define E1000_RXCW_ANC   0x80000000

Definition at line 911 of file e1000_defines.h.

#define E1000_GCR_RXD_NO_SNOOP   0x00000001

Definition at line 915 of file e1000_defines.h.

#define E1000_GCR_RXDSCW_NO_SNOOP   0x00000002

Definition at line 916 of file e1000_defines.h.

#define E1000_GCR_RXDSCR_NO_SNOOP   0x00000004

Definition at line 917 of file e1000_defines.h.

#define E1000_GCR_TXD_NO_SNOOP   0x00000008

Definition at line 918 of file e1000_defines.h.

#define E1000_GCR_TXDSCW_NO_SNOOP   0x00000010

Definition at line 919 of file e1000_defines.h.

#define E1000_GCR_TXDSCR_NO_SNOOP   0x00000020

Definition at line 920 of file e1000_defines.h.

#define E1000_GCR_CMPL_TMOUT_MASK   0x0000F000

Definition at line 921 of file e1000_defines.h.

Referenced by igb_set_pcie_completion_timeout().

#define E1000_GCR_CMPL_TMOUT_10ms   0x00001000

Definition at line 922 of file e1000_defines.h.

Referenced by igb_set_pcie_completion_timeout().

#define E1000_GCR_CMPL_TMOUT_RESEND   0x00010000

Definition at line 923 of file e1000_defines.h.

Referenced by igb_set_pcie_completion_timeout().

#define E1000_GCR_CAP_VER2   0x00040000

Definition at line 924 of file e1000_defines.h.

Referenced by igb_set_pcie_completion_timeout().

#define PCIE_NO_SNOOP_ALL

#define MII_CR_SPEED_SELECT_MSB   0x0040

Definition at line 934 of file e1000_defines.h.

#define MII_CR_COLL_TEST_ENABLE   0x0080

Definition at line 935 of file e1000_defines.h.

#define MII_CR_FULL_DUPLEX   0x0100

Definition at line 936 of file e1000_defines.h.

#define MII_CR_RESTART_AUTO_NEG   0x0200

Definition at line 937 of file e1000_defines.h.

#define MII_CR_ISOLATE   0x0400

Definition at line 938 of file e1000_defines.h.

#define MII_CR_POWER_DOWN   0x0800

Definition at line 939 of file e1000_defines.h.

#define MII_CR_AUTO_NEG_EN   0x1000

Definition at line 940 of file e1000_defines.h.

#define MII_CR_SPEED_SELECT_LSB   0x2000

Definition at line 941 of file e1000_defines.h.

#define MII_CR_LOOPBACK   0x4000

Definition at line 942 of file e1000_defines.h.

#define MII_CR_RESET   0x8000

Definition at line 943 of file e1000_defines.h.

#define MII_CR_SPEED_1000   0x0040

Definition at line 944 of file e1000_defines.h.

#define MII_CR_SPEED_100   0x2000

Definition at line 945 of file e1000_defines.h.

#define MII_CR_SPEED_10   0x0000

Definition at line 946 of file e1000_defines.h.

#define MII_SR_EXTENDED_CAPS   0x0001

Definition at line 949 of file e1000_defines.h.

#define MII_SR_JABBER_DETECT   0x0002

Definition at line 950 of file e1000_defines.h.

#define MII_SR_LINK_STATUS   0x0004

Definition at line 951 of file e1000_defines.h.

#define MII_SR_AUTONEG_CAPS   0x0008

Definition at line 952 of file e1000_defines.h.

#define MII_SR_REMOTE_FAULT   0x0010

Definition at line 953 of file e1000_defines.h.

#define MII_SR_AUTONEG_COMPLETE   0x0020

Definition at line 954 of file e1000_defines.h.

#define MII_SR_PREAMBLE_SUPPRESS   0x0040

Definition at line 955 of file e1000_defines.h.

#define MII_SR_EXTENDED_STATUS   0x0100

Definition at line 956 of file e1000_defines.h.

#define MII_SR_100T2_HD_CAPS   0x0200

Definition at line 957 of file e1000_defines.h.

#define MII_SR_100T2_FD_CAPS   0x0400

Definition at line 958 of file e1000_defines.h.

#define MII_SR_10T_HD_CAPS   0x0800

Definition at line 959 of file e1000_defines.h.

#define MII_SR_10T_FD_CAPS   0x1000

Definition at line 960 of file e1000_defines.h.

#define MII_SR_100X_HD_CAPS   0x2000

Definition at line 961 of file e1000_defines.h.

#define MII_SR_100X_FD_CAPS   0x4000

Definition at line 962 of file e1000_defines.h.

#define MII_SR_100T4_CAPS   0x8000

Definition at line 963 of file e1000_defines.h.

#define NWAY_AR_SELECTOR_FIELD   0x0001

Definition at line 966 of file e1000_defines.h.

#define NWAY_AR_10T_HD_CAPS   0x0020

#define NWAY_AR_10T_FD_CAPS   0x0040

#define NWAY_AR_100TX_HD_CAPS   0x0080

#define NWAY_AR_100TX_FD_CAPS   0x0100

#define NWAY_AR_100T4_CAPS   0x0200

Definition at line 971 of file e1000_defines.h.

#define NWAY_AR_PAUSE   0x0400

#define NWAY_AR_ASM_DIR   0x0800

#define NWAY_AR_REMOTE_FAULT   0x2000

Definition at line 974 of file e1000_defines.h.

#define NWAY_AR_NEXT_PAGE   0x8000

Definition at line 975 of file e1000_defines.h.

#define NWAY_LPAR_SELECTOR_FIELD   0x0000

Definition at line 978 of file e1000_defines.h.

#define NWAY_LPAR_10T_HD_CAPS   0x0020

Definition at line 979 of file e1000_defines.h.

#define NWAY_LPAR_10T_FD_CAPS   0x0040

Definition at line 980 of file e1000_defines.h.

Referenced by e1000_get_link_up_info_82541().

#define NWAY_LPAR_100TX_HD_CAPS   0x0080

Definition at line 981 of file e1000_defines.h.

#define NWAY_LPAR_100TX_FD_CAPS   0x0100

Definition at line 982 of file e1000_defines.h.

Referenced by e1000_get_link_up_info_82541().

#define NWAY_LPAR_100T4_CAPS   0x0200

Definition at line 983 of file e1000_defines.h.

#define NWAY_LPAR_PAUSE   0x0400

#define NWAY_LPAR_ASM_DIR   0x0800

#define NWAY_LPAR_REMOTE_FAULT   0x2000

Definition at line 986 of file e1000_defines.h.

#define NWAY_LPAR_ACKNOWLEDGE   0x4000

Definition at line 987 of file e1000_defines.h.

#define NWAY_LPAR_NEXT_PAGE   0x8000

Definition at line 988 of file e1000_defines.h.

#define NWAY_ER_LP_NWAY_CAPS   0x0001

Definition at line 991 of file e1000_defines.h.

Referenced by e1000_get_link_up_info_82541().

#define NWAY_ER_PAGE_RXD   0x0002

Definition at line 992 of file e1000_defines.h.

#define NWAY_ER_NEXT_PAGE_CAPS   0x0004

Definition at line 993 of file e1000_defines.h.

#define NWAY_ER_LP_NEXT_PAGE_CAPS   0x0008

Definition at line 994 of file e1000_defines.h.

#define NWAY_ER_PAR_DETECT_FAULT   0x0010

Definition at line 995 of file e1000_defines.h.

#define CR_1000T_ASYM_PAUSE   0x0080

Definition at line 998 of file e1000_defines.h.

#define CR_1000T_HD_CAPS   0x0100

#define CR_1000T_FD_CAPS   0x0200

#define CR_1000T_REPEATER_DTE   0x0400

Definition at line 1001 of file e1000_defines.h.

#define CR_1000T_MS_VALUE   0x0800

#define CR_1000T_MS_ENABLE   0x1000

#define CR_1000T_TEST_MODE_NORMAL   0x0000

Definition at line 1007 of file e1000_defines.h.

#define CR_1000T_TEST_MODE_1   0x2000

Definition at line 1008 of file e1000_defines.h.

#define CR_1000T_TEST_MODE_2   0x4000

Definition at line 1009 of file e1000_defines.h.

#define CR_1000T_TEST_MODE_3   0x6000

Definition at line 1010 of file e1000_defines.h.

#define CR_1000T_TEST_MODE_4   0x8000

Definition at line 1011 of file e1000_defines.h.

#define SR_1000T_IDLE_ERROR_CNT   0x00FF

Definition at line 1014 of file e1000_defines.h.

#define SR_1000T_ASYM_PAUSE_DIR   0x0100

Definition at line 1015 of file e1000_defines.h.

#define SR_1000T_LP_HD_CAPS   0x0400

Definition at line 1016 of file e1000_defines.h.

#define SR_1000T_LP_FD_CAPS   0x0800

Definition at line 1017 of file e1000_defines.h.

#define SR_1000T_REMOTE_RX_STATUS   0x1000

#define SR_1000T_LOCAL_RX_STATUS   0x2000

#define SR_1000T_MS_CONFIG_RES   0x4000

Definition at line 1020 of file e1000_defines.h.

#define SR_1000T_MS_CONFIG_FAULT   0x8000

Definition at line 1021 of file e1000_defines.h.

#define SR_1000T_PHY_EXCESSIVE_IDLE_ERR_COUNT   5

Definition at line 1023 of file e1000_defines.h.

#define PHY_CONTROL   0x00

#define PHY_STATUS   0x01

#define PHY_ID1   0x02

#define PHY_ID2   0x03

#define PHY_AUTONEG_ADV   0x04

#define PHY_LP_ABILITY   0x05

#define PHY_AUTONEG_EXP   0x06

Definition at line 1033 of file e1000_defines.h.

Referenced by e1000_get_link_up_info_82541().

#define PHY_NEXT_PAGE_TX   0x07

Definition at line 1034 of file e1000_defines.h.

#define PHY_LP_NEXT_PAGE   0x08

Definition at line 1035 of file e1000_defines.h.

#define PHY_1000T_CTRL   0x09

#define PHY_1000T_STATUS   0x0A

#define PHY_EXT_STATUS   0x0F

Definition at line 1038 of file e1000_defines.h.

#define PHY_CONTROL_LB   0x4000

Definition at line 1040 of file e1000_defines.h.

Referenced by e1000e_link_stall_workaround_hv().

#define E1000_EECD_SK   0x00000001

#define E1000_EECD_CS   0x00000002

#define E1000_EECD_DI   0x00000004

#define E1000_EECD_DO   0x00000008

#define E1000_EECD_FWE_MASK   0x00000030

Definition at line 1047 of file e1000_defines.h.

#define E1000_EECD_FWE_DIS   0x00000010

Definition at line 1048 of file e1000_defines.h.

#define E1000_EECD_FWE_EN   0x00000020

Definition at line 1049 of file e1000_defines.h.

#define E1000_EECD_FWE_SHIFT   4

Definition at line 1050 of file e1000_defines.h.

#define E1000_EECD_REQ   0x00000040

#define E1000_EECD_GNT   0x00000080

#define E1000_EECD_PRES   0x00000100

#define E1000_EECD_SIZE   0x00000200

Definition at line 1054 of file e1000_defines.h.

Referenced by e1000_init_nvm_params_82540(), and e1000_init_nvm_params_82541().

#define E1000_EECD_ADDR_BITS   0x00000400

#define E1000_EECD_TYPE   0x00002000

Definition at line 1057 of file e1000_defines.h.

Referenced by e1000_init_nvm_params_82541().

#define E1000_NVM_GRANT_ATTEMPTS   1000

#define E1000_EECD_AUTO_RD   0x00000200

#define E1000_EECD_SIZE_EX_MASK   0x00007800

#define E1000_EECD_SIZE_EX_SHIFT   11

#define E1000_EECD_NVADDS   0x00018000

Definition at line 1062 of file e1000_defines.h.

#define E1000_EECD_SELSHAD   0x00020000

Definition at line 1063 of file e1000_defines.h.

#define E1000_EECD_INITSRAM   0x00040000

Definition at line 1064 of file e1000_defines.h.

#define E1000_EECD_FLUPD   0x00080000

Definition at line 1065 of file e1000_defines.h.

Referenced by e1000e_update_nvm_checksum_82571().

#define E1000_EECD_AUPDEN   0x00100000

Definition at line 1066 of file e1000_defines.h.

Referenced by e1000e_init_nvm_params_82571().

#define E1000_EECD_SHADV   0x00200000

Definition at line 1067 of file e1000_defines.h.

#define E1000_EECD_SEC1VAL   0x00400000

Definition at line 1068 of file e1000_defines.h.

Referenced by e1000e_valid_nvm_bank_detect_ich8lan().

#define E1000_EECD_SECVAL_SHIFT   22

Definition at line 1069 of file e1000_defines.h.

#define E1000_EECD_SEC1VAL_VALID_MASK   (E1000_EECD_AUTO_RD | E1000_EECD_PRES)

Definition at line 1070 of file e1000_defines.h.

Referenced by e1000e_valid_nvm_bank_detect_ich8lan().

#define E1000_NVM_SWDPIN0   0x0001

Definition at line 1072 of file e1000_defines.h.

#define E1000_NVM_LED_LOGIC   0x0020

Definition at line 1073 of file e1000_defines.h.

#define E1000_NVM_RW_REG_DATA   16

#define E1000_NVM_RW_REG_DONE   2

#define E1000_NVM_RW_REG_START   1

#define E1000_NVM_RW_ADDR_SHIFT   2

#define E1000_NVM_POLL_WRITE   1

Definition at line 1078 of file e1000_defines.h.

Referenced by e1000e_write_nvm_eewr_82571().

#define E1000_NVM_POLL_READ   0

#define E1000_FLASH_UPDATES   2000

Definition at line 1080 of file e1000_defines.h.

Referenced by e1000e_update_nvm_checksum_82571().

#define NVM_COMPAT   0x0003

Definition at line 1083 of file e1000_defines.h.

#define NVM_ID_LED_SETTINGS   0x0004

#define NVM_VERSION   0x0005

Definition at line 1085 of file e1000_defines.h.

#define NVM_SERDES_AMPLITUDE   0x0006

Definition at line 1086 of file e1000_defines.h.

Referenced by e1000_adjust_serdes_amplitude_82540().

#define NVM_PHY_CLASS_WORD   0x0007

Definition at line 1087 of file e1000_defines.h.

Referenced by e1000_set_phy_mode_82540().

#define NVM_INIT_CONTROL1_REG   0x000A

Definition at line 1088 of file e1000_defines.h.

#define NVM_INIT_CONTROL2_REG   0x000F

#define NVM_SWDEF_PINS_CTRL_PORT_1   0x0010

Definition at line 1090 of file e1000_defines.h.

#define NVM_INIT_CONTROL3_PORT_B   0x0014

Definition at line 1091 of file e1000_defines.h.

Referenced by igb_shutdown_serdes_link_82575().

#define NVM_INIT_3GIO_3   0x001A

Definition at line 1092 of file e1000_defines.h.

Referenced by e1000e_get_variants_82571().

#define NVM_SWDEF_PINS_CTRL_PORT_0   0x0020

Definition at line 1093 of file e1000_defines.h.

#define NVM_INIT_CONTROL3_PORT_A   0x0024

Definition at line 1094 of file e1000_defines.h.

Referenced by igb_shutdown_serdes_link_82575().

#define NVM_CFG   0x0012

Definition at line 1095 of file e1000_defines.h.

Referenced by e1000_init_nvm_params_82541().

#define NVM_FLASH_VERSION   0x0032

Definition at line 1096 of file e1000_defines.h.

#define NVM_ALT_MAC_ADDR_PTR   0x0037

#define NVM_CHECKSUM_REG   0x003F

#define E1000_NVM_CFG_DONE_PORT_0   0x040000

#define E1000_NVM_CFG_DONE_PORT_1   0x080000

Definition at line 1101 of file e1000_defines.h.

Referenced by e1000e_get_cfg_done_80003es2lan(), and igb_get_cfg_done_82575().

#define NVM_WORD0F_PAUSE_MASK   0x3000

#define NVM_WORD0F_PAUSE   0x1000

Definition at line 1105 of file e1000_defines.h.

#define NVM_WORD0F_ASM_DIR   0x2000

#define NVM_WORD0F_ANE   0x0800

Definition at line 1107 of file e1000_defines.h.

#define NVM_WORD0F_SWPDIO_EXT_MASK   0x00F0

Definition at line 1108 of file e1000_defines.h.

Referenced by e1000_setup_link_82543().

#define NVM_WORD0F_LPLU   0x0001

Definition at line 1109 of file e1000_defines.h.

#define NVM_WORD1A_ASPM_MASK   0x000C

Definition at line 1112 of file e1000_defines.h.

Referenced by e1000e_get_variants_82571().

#define NVM_SUM   0xBABA

#define NVM_MAC_ADDR_OFFSET   0

Definition at line 1117 of file e1000_defines.h.

#define NVM_PBA_OFFSET_0   8

#define NVM_PBA_OFFSET_1   9

#define NVM_RESERVED_WORD   0xFFFF

#define NVM_PHY_CLASS_A   0x8000

Definition at line 1121 of file e1000_defines.h.

Referenced by e1000_set_phy_mode_82540().

#define NVM_SERDES_AMPLITUDE_MASK   0x000F

Definition at line 1122 of file e1000_defines.h.

Referenced by e1000_adjust_serdes_amplitude_82540().

#define NVM_SIZE_MASK   0x1C00

Definition at line 1123 of file e1000_defines.h.

Referenced by e1000_init_nvm_params_82541().

#define NVM_SIZE_SHIFT   10

Definition at line 1124 of file e1000_defines.h.

Referenced by e1000_init_nvm_params_82541().

#define NVM_WORD_SIZE_BASE_SHIFT   6

#define NVM_SWDPIO_EXT_SHIFT   4

Definition at line 1126 of file e1000_defines.h.

Referenced by e1000_setup_link_82543().

#define NVM_READ_OPCODE_MICROWIRE   0x6

Definition at line 1129 of file e1000_defines.h.

Referenced by e1000_read_nvm_microwire().

#define NVM_WRITE_OPCODE_MICROWIRE   0x5

Definition at line 1130 of file e1000_defines.h.

Referenced by e1000_write_nvm_microwire().

#define NVM_ERASE_OPCODE_MICROWIRE   0x7

Definition at line 1131 of file e1000_defines.h.

#define NVM_EWEN_OPCODE_MICROWIRE   0x13

Definition at line 1132 of file e1000_defines.h.

Referenced by e1000_write_nvm_microwire().

#define NVM_EWDS_OPCODE_MICROWIRE   0x10

Definition at line 1133 of file e1000_defines.h.

Referenced by e1000_write_nvm_microwire().

#define NVM_MAX_RETRY_SPI   5000

#define NVM_READ_OPCODE_SPI   0x03

Definition at line 1137 of file e1000_defines.h.

Referenced by e1000_read_nvm_spi().

#define NVM_WRITE_OPCODE_SPI   0x02

Definition at line 1138 of file e1000_defines.h.

Referenced by e1000_write_nvm_spi(), e1000e_write_nvm_spi(), and igb_write_nvm_spi().

#define NVM_A8_OPCODE_SPI   0x08

#define NVM_WREN_OPCODE_SPI   0x06

Definition at line 1140 of file e1000_defines.h.

Referenced by e1000_write_nvm_spi(), e1000e_write_nvm_spi(), and igb_write_nvm_spi().

#define NVM_WRDI_OPCODE_SPI   0x04

Definition at line 1141 of file e1000_defines.h.

#define NVM_RDSR_OPCODE_SPI   0x05

#define NVM_WRSR_OPCODE_SPI   0x01

Definition at line 1143 of file e1000_defines.h.

#define NVM_STATUS_RDY_SPI   0x01

#define NVM_STATUS_WEN_SPI   0x02

Definition at line 1147 of file e1000_defines.h.

#define NVM_STATUS_BP0_SPI   0x04

Definition at line 1148 of file e1000_defines.h.

#define NVM_STATUS_BP1_SPI   0x08

Definition at line 1149 of file e1000_defines.h.

#define NVM_STATUS_WPEN_SPI   0x80

Definition at line 1150 of file e1000_defines.h.

#define ID_LED_RESERVED_0000   0x0000

#define ID_LED_RESERVED_FFFF   0xFFFF

#define ID_LED_DEFAULT

#define ID_LED_DEF1_DEF2   0x1

Definition at line 1159 of file e1000_defines.h.

#define ID_LED_DEF1_ON2   0x2

#define ID_LED_DEF1_OFF2   0x3

#define ID_LED_ON1_DEF2   0x4

#define ID_LED_ON1_ON2   0x5

#define ID_LED_ON1_OFF2   0x6

#define ID_LED_OFF1_DEF2   0x7

#define ID_LED_OFF1_ON2   0x8

#define ID_LED_OFF1_OFF2   0x9

#define IGP_ACTIVITY_LED_MASK   0xFFFFF0FF

#define IGP_ACTIVITY_LED_ENABLE   0x0300

#define IGP_LED3_MODE   0x07000000

#define PCIX_COMMAND_REGISTER   0xE6

Definition at line 1174 of file e1000_defines.h.

Referenced by e1000_pcix_mmrbc_workaround_generic().

#define PCIX_STATUS_REGISTER_LO   0xE8

Definition at line 1175 of file e1000_defines.h.

#define PCIX_STATUS_REGISTER_HI   0xEA

Definition at line 1176 of file e1000_defines.h.

Referenced by e1000_pcix_mmrbc_workaround_generic().

#define PCI_HEADER_TYPE_REGISTER   0x0E

Definition at line 1177 of file e1000_defines.h.

Referenced by e1000_set_lan_id_multi_port_pci().

#define PCIE_LINK_STATUS   0x12

#define PCIE_DEVICE_CONTROL2   0x28

Definition at line 1179 of file e1000_defines.h.

Referenced by igb_set_pcie_completion_timeout().

#define PCIX_COMMAND_MMRBC_MASK   0x000C

Definition at line 1181 of file e1000_defines.h.

Referenced by e1000_pcix_mmrbc_workaround_generic().

#define PCIX_COMMAND_MMRBC_SHIFT   0x2

Definition at line 1182 of file e1000_defines.h.

Referenced by e1000_pcix_mmrbc_workaround_generic().

#define PCIX_STATUS_HI_MMRBC_MASK   0x0060

Definition at line 1183 of file e1000_defines.h.

Referenced by e1000_pcix_mmrbc_workaround_generic().

#define PCIX_STATUS_HI_MMRBC_SHIFT   0x5

Definition at line 1184 of file e1000_defines.h.

Referenced by e1000_pcix_mmrbc_workaround_generic().

#define PCIX_STATUS_HI_MMRBC_4K   0x3

Definition at line 1185 of file e1000_defines.h.

Referenced by e1000_pcix_mmrbc_workaround_generic().

#define PCIX_STATUS_HI_MMRBC_2K   0x2

Definition at line 1186 of file e1000_defines.h.

Referenced by e1000_pcix_mmrbc_workaround_generic().

#define PCIX_STATUS_LO_FUNC_MASK   0x7

Definition at line 1187 of file e1000_defines.h.

#define PCI_HEADER_TYPE_MULTIFUNC   0x80

Definition at line 1188 of file e1000_defines.h.

Referenced by e1000_set_lan_id_multi_port_pci().

#define PCIE_LINK_WIDTH_MASK   0x3F0

#define PCIE_LINK_WIDTH_SHIFT   4

#define PCIE_DEVICE_CONTROL2_16ms   0x0005

Definition at line 1191 of file e1000_defines.h.

Referenced by igb_set_pcie_completion_timeout().

#define ETH_ADDR_LEN   6

#define PHY_REVISION_MASK   0xFFFFFFF0

#define MAX_PHY_REG_ADDRESS   0x1F

#define MAX_PHY_MULTI_PAGE_REG   0xF

#define M88E1000_E_PHY_ID   0x01410C50

#define M88E1000_I_PHY_ID   0x01410C30

#define M88E1011_I_PHY_ID   0x01410C20

#define IGP01E1000_I_PHY_ID   0x02A80380

#define M88E1011_I_REV_4   0x04

Definition at line 1210 of file e1000_defines.h.

#define M88E1111_I_PHY_ID   0x01410CC0

#define GG82563_E_PHY_ID   0x01410CA0

#define IGP03E1000_E_PHY_ID   0x02A80390

#define IFE_E_PHY_ID   0x02A80330

#define IFE_PLUS_E_PHY_ID   0x02A80320

#define IFE_C_E_PHY_ID   0x02A80310

#define M88_VENDOR   0x0141

Definition at line 1217 of file e1000_defines.h.

Referenced by igb_get_phy_id_82575().

#define M88E1000_PHY_SPEC_CTRL   0x10

#define M88E1000_PHY_SPEC_STATUS   0x11

#define M88E1000_INT_ENABLE   0x12

Definition at line 1222 of file e1000_defines.h.

#define M88E1000_INT_STATUS   0x13

Definition at line 1223 of file e1000_defines.h.

#define M88E1000_EXT_PHY_SPEC_CTRL   0x14

#define M88E1000_RX_ERR_CNTR   0x15

Definition at line 1225 of file e1000_defines.h.

#define M88E1000_PHY_EXT_CTRL   0x1A

Definition at line 1227 of file e1000_defines.h.

Referenced by e1000_adjust_serdes_amplitude_82540().

#define M88E1000_PHY_PAGE_SELECT   0x1D

#define M88E1000_PHY_GEN_CONTROL   0x1E

#define M88E1000_PHY_VCO_REG_BIT8   0x100

Definition at line 1230 of file e1000_defines.h.

Referenced by e1000_set_vco_speed_82540().

#define M88E1000_PHY_VCO_REG_BIT11   0x800

Definition at line 1231 of file e1000_defines.h.

Referenced by e1000_set_vco_speed_82540().

#define M88E1000_PSCR_JABBER_DISABLE   0x0001

Definition at line 1234 of file e1000_defines.h.

#define M88E1000_PSCR_POLARITY_REVERSAL   0x0002

#define M88E1000_PSCR_SQE_TEST   0x0004

Definition at line 1236 of file e1000_defines.h.

#define M88E1000_PSCR_CLK125_DISABLE   0x0010

Definition at line 1238 of file e1000_defines.h.

#define M88E1000_PSCR_MDI_MANUAL_MODE   0x0000

#define M88E1000_PSCR_MDIX_MANUAL_MODE   0x0020

#define M88E1000_PSCR_AUTO_X_1000T   0x0040

#define M88E1000_PSCR_AUTO_X_MODE   0x0060

#define M88E1000_PSCR_EN_10BT_EXT_DIST   0x0080

Definition at line 1250 of file e1000_defines.h.

#define M88E1000_PSCR_MII_5BIT_ENABLE   0x0100

Definition at line 1252 of file e1000_defines.h.

#define M88E1000_PSCR_SCRAMBLER_DISABLE   0x0200

Definition at line 1253 of file e1000_defines.h.

#define M88E1000_PSCR_FORCE_LINK_GOOD   0x0400

Definition at line 1254 of file e1000_defines.h.

#define M88E1000_PSCR_ASSERT_CRS_ON_TX   0x0800

#define M88E1000_PSSR_JABBER   0x0001

Definition at line 1258 of file e1000_defines.h.

#define M88E1000_PSSR_REV_POLARITY   0x0002

#define M88E1000_PSSR_DOWNSHIFT   0x0020

#define M88E1000_PSSR_MDIX   0x0040

#define M88E1000_PSSR_CABLE_LENGTH   0x0380

Definition at line 1269 of file e1000_defines.h.

#define M88E1000_PSSR_LINK   0x0400

Definition at line 1270 of file e1000_defines.h.

#define M88E1000_PSSR_SPD_DPLX_RESOLVED   0x0800

Definition at line 1271 of file e1000_defines.h.

#define M88E1000_PSSR_PAGE_RCVD   0x1000

Definition at line 1272 of file e1000_defines.h.

#define M88E1000_PSSR_DPLX   0x2000

Definition at line 1273 of file e1000_defines.h.

Referenced by e1000_config_mac_to_phy_82543().

#define M88E1000_PSSR_SPEED   0xC000

#define M88E1000_PSSR_10MBS   0x0000

Definition at line 1275 of file e1000_defines.h.

#define M88E1000_PSSR_100MBS   0x4000

Definition at line 1276 of file e1000_defines.h.

Referenced by e1000_config_mac_to_phy_82543().

#define M88E1000_PSSR_1000MBS   0x8000

#define M88E1000_PSSR_CABLE_LENGTH_SHIFT   7

Definition at line 1279 of file e1000_defines.h.

#define M88E1000_EPSCR_FIBER_LOOPBACK   0x4000

Definition at line 1282 of file e1000_defines.h.

#define M88E1000_EPSCR_DOWN_NO_IDLE   0x8000

Definition at line 1289 of file e1000_defines.h.

#define M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK   0x0C00

#define M88E1000_EPSCR_MASTER_DOWNSHIFT_1X   0x0000

#define M88E1000_EPSCR_MASTER_DOWNSHIFT_2X   0x0400

Definition at line 1296 of file e1000_defines.h.

#define M88E1000_EPSCR_MASTER_DOWNSHIFT_3X   0x0800

Definition at line 1297 of file e1000_defines.h.

#define M88E1000_EPSCR_MASTER_DOWNSHIFT_4X   0x0C00

Definition at line 1298 of file e1000_defines.h.

#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK   0x0300

#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_DIS   0x0000

Definition at line 1304 of file e1000_defines.h.

#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X   0x0100

#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_2X   0x0200

Definition at line 1306 of file e1000_defines.h.

#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_3X   0x0300

Definition at line 1307 of file e1000_defines.h.

#define M88E1000_EPSCR_TX_CLK_2_5   0x0060

Definition at line 1308 of file e1000_defines.h.

#define M88E1000_EPSCR_TX_CLK_25   0x0070

#define M88E1000_EPSCR_TX_CLK_0   0x0000

Definition at line 1310 of file e1000_defines.h.

#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK   0x0E00

#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_1X   0x0000

Definition at line 1314 of file e1000_defines.h.

#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_2X   0x0200

Definition at line 1315 of file e1000_defines.h.

#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_3X   0x0400

Definition at line 1316 of file e1000_defines.h.

#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_4X   0x0600

Definition at line 1317 of file e1000_defines.h.

#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X   0x0800

#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_6X   0x0A00

Definition at line 1319 of file e1000_defines.h.

#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_7X   0x0C00

Definition at line 1320 of file e1000_defines.h.

#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_8X   0x0E00

Definition at line 1321 of file e1000_defines.h.

#define GG82563_PAGE_SHIFT   5

#define GG82563_REG ( page,
reg   )     (((page) << GG82563_PAGE_SHIFT) | ((reg) & MAX_PHY_REG_ADDRESS))

Definition at line 1329 of file e1000_defines.h.

Referenced by e1000e_setup_copper_link_80003es2lan().

#define GG82563_MIN_ALT_REG   30

#define GG82563_PHY_SPEC_CTRL   GG82563_REG(0, 16)

Definition at line 1334 of file e1000_defines.h.

Referenced by e1000e_copper_link_setup_gg82563_80003es2lan().

#define GG82563_PHY_SPEC_STATUS   GG82563_REG(0, 17)

Definition at line 1336 of file e1000_defines.h.

#define GG82563_PHY_INT_ENABLE   GG82563_REG(0, 18)

Definition at line 1338 of file e1000_defines.h.

#define GG82563_PHY_SPEC_STATUS_2   GG82563_REG(0, 19)

Definition at line 1340 of file e1000_defines.h.

#define GG82563_PHY_RX_ERR_CNTR   GG82563_REG(0, 21)

Definition at line 1342 of file e1000_defines.h.

#define GG82563_PHY_PAGE_SELECT   GG82563_REG(0, 22)

#define GG82563_PHY_SPEC_CTRL_2   GG82563_REG(0, 26)

Definition at line 1346 of file e1000_defines.h.

Referenced by e1000e_copper_link_setup_gg82563_80003es2lan().

#define GG82563_PHY_PAGE_SELECT_ALT   GG82563_REG(0, 29)

#define GG82563_PHY_TEST_CLK_CTRL   GG82563_REG(0, 30)

Definition at line 1350 of file e1000_defines.h.

#define GG82563_PHY_MAC_SPEC_CTRL   GG82563_REG(2, 21)

Definition at line 1353 of file e1000_defines.h.

Referenced by e1000e_copper_link_setup_gg82563_80003es2lan().

#define GG82563_PHY_MAC_SPEC_CTRL_2   GG82563_REG(2, 26)

Definition at line 1355 of file e1000_defines.h.

#define GG82563_PHY_DSP_DISTANCE   GG82563_REG(5, 26)

Definition at line 1358 of file e1000_defines.h.

#define GG82563_PHY_KMRN_MODE_CTRL   GG82563_REG(193, 16)

#define GG82563_PHY_PORT_RESET   GG82563_REG(193, 17)

Definition at line 1364 of file e1000_defines.h.

#define GG82563_PHY_REVISION_ID   GG82563_REG(193, 18)

Definition at line 1366 of file e1000_defines.h.

#define GG82563_PHY_DEVICE_ID   GG82563_REG(193, 19)

Definition at line 1368 of file e1000_defines.h.

#define GG82563_PHY_PWR_MGMT_CTRL   GG82563_REG(193, 20)

Definition at line 1370 of file e1000_defines.h.

Referenced by e1000e_copper_link_setup_gg82563_80003es2lan().

#define GG82563_PHY_RATE_ADAPT_CTRL   GG82563_REG(193, 25)

Definition at line 1372 of file e1000_defines.h.

#define GG82563_PHY_KMRN_FIFO_CTRL_STAT   GG82563_REG(194, 16)

Definition at line 1376 of file e1000_defines.h.

#define GG82563_PHY_KMRN_CTRL   GG82563_REG(194, 17)

Definition at line 1378 of file e1000_defines.h.

#define GG82563_PHY_INBAND_CTRL   GG82563_REG(194, 18)

Definition at line 1380 of file e1000_defines.h.

Referenced by e1000e_copper_link_setup_gg82563_80003es2lan().

#define GG82563_PHY_KMRN_DIAGNOSTIC   GG82563_REG(194, 19)

Definition at line 1382 of file e1000_defines.h.

#define GG82563_PHY_ACK_TIMEOUTS   GG82563_REG(194, 20)

Definition at line 1384 of file e1000_defines.h.

#define GG82563_PHY_ADV_ABILITY   GG82563_REG(194, 21)

Definition at line 1386 of file e1000_defines.h.

#define GG82563_PHY_LINK_PARTNER_ADV_ABILITY   GG82563_REG(194, 23)

Definition at line 1388 of file e1000_defines.h.

#define GG82563_PHY_ADV_NEXT_PAGE   GG82563_REG(194, 24)

Definition at line 1390 of file e1000_defines.h.

#define GG82563_PHY_LINK_PARTNER_ADV_NEXT_PAGE   GG82563_REG(194, 25)

Definition at line 1392 of file e1000_defines.h.

#define GG82563_PHY_KMRN_MISC   GG82563_REG(194, 26)

Definition at line 1394 of file e1000_defines.h.

#define E1000_MDIC_DATA_MASK   0x0000FFFF

Definition at line 1398 of file e1000_defines.h.

#define E1000_MDIC_REG_MASK   0x001F0000

Definition at line 1399 of file e1000_defines.h.

#define E1000_MDIC_REG_SHIFT   16

#define E1000_MDIC_PHY_MASK   0x03E00000

Definition at line 1401 of file e1000_defines.h.

#define E1000_MDIC_PHY_SHIFT   21

#define E1000_MDIC_OP_WRITE   0x04000000

#define E1000_MDIC_OP_READ   0x08000000

#define E1000_MDIC_READY   0x10000000

#define E1000_MDIC_INT_EN   0x20000000

Definition at line 1406 of file e1000_defines.h.

#define E1000_MDIC_ERROR   0x40000000

#define E1000_GEN_CTL_READY   0x80000000

Definition at line 1410 of file e1000_defines.h.

Referenced by igb_write_8bit_ctrl_reg_generic().

#define E1000_GEN_CTL_ADDRESS_SHIFT   8

Definition at line 1411 of file e1000_defines.h.

Referenced by igb_write_8bit_ctrl_reg_generic().

#define E1000_GEN_POLL_TIMEOUT   640


Function Documentation

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