#include "e1000_api.h"Go to the source code of this file.
Functions | |
| FILE_LICENCE (GPL2_OR_LATER) | |
| static s32 | e1000_init_phy_params_82542 (struct e1000_hw *hw) |
| e1000_init_phy_params_82542 - Init PHY func ptrs. | |
| static s32 | e1000_init_nvm_params_82542 (struct e1000_hw *hw) |
| e1000_init_nvm_params_82542 - Init NVM func ptrs. | |
| static s32 | e1000_init_mac_params_82542 (struct e1000_hw *hw) |
| e1000_init_mac_params_82542 - Init MAC func ptrs. | |
| static s32 | e1000_get_bus_info_82542 (struct e1000_hw *hw) |
| e1000_get_bus_info_82542 - Obtain bus information for adapter : pointer to the HW structure | |
| static s32 | e1000_reset_hw_82542 (struct e1000_hw *hw) |
| e1000_reset_hw_82542 - Reset hardware : pointer to the HW structure | |
| static s32 | e1000_init_hw_82542 (struct e1000_hw *hw) |
| e1000_init_hw_82542 - Initialize hardware : pointer to the HW structure | |
| static s32 | e1000_setup_link_82542 (struct e1000_hw *hw) |
| e1000_setup_link_82542 - Setup flow control and link settings : pointer to the HW structure | |
| static s32 | e1000_led_on_82542 (struct e1000_hw *hw) |
| static s32 | e1000_led_off_82542 (struct e1000_hw *hw) |
| static void | e1000_rar_set_82542 (struct e1000_hw *hw, u8 *addr, u32 index) |
| e1000_rar_set_82542 - Set receive address register : pointer to the HW structure : pointer to the receive address : receive address array register | |
| static void | e1000_clear_hw_cntrs_82542 (struct e1000_hw *hw) |
| e1000_clear_hw_cntrs_82542 - Clear device specific hardware counters : pointer to the HW structure | |
| void | e1000_init_function_pointers_82542 (struct e1000_hw *hw) |
| e1000_init_function_pointers_82542 - Init func ptrs. | |
| static s32 | e1000_led_on_82542 (struct e1000_hw *hw __unused) |
| e1000_led_on_82542 - Turn on SW controllable LED : pointer to the HW structure | |
| static s32 | e1000_led_off_82542 (struct e1000_hw *hw __unused) |
| e1000_led_off_82542 - Turn off SW controllable LED : pointer to the HW structure | |
| u32 | e1000_translate_register_82542 (u32 reg) |
| e1000_translate_register_82542 - Translate the proper register offset : e1000 register to be read | |
Variables | |
| static struct pci_device_id | e1000_82542_nics [] |
| struct pci_driver e1000_82542_driver | __pci_driver |
| FILE_LICENCE | ( | GPL2_OR_LATER | ) |
e1000_init_phy_params_82542 - Init PHY func ptrs.
: pointer to the HW structure
Definition at line 53 of file e1000_82542.c.
References DEBUGFUNC, e1000_phy_none, E1000_SUCCESS, e1000_hw::phy, and e1000_phy_info::type.
Referenced by e1000_init_function_pointers_82542().
00054 { 00055 struct e1000_phy_info *phy = &hw->phy; 00056 s32 ret_val = E1000_SUCCESS; 00057 00058 DEBUGFUNC("e1000_init_phy_params_82542"); 00059 00060 phy->type = e1000_phy_none; 00061 00062 return ret_val; 00063 }
e1000_init_nvm_params_82542 - Init NVM func ptrs.
: pointer to the HW structure
Definition at line 69 of file e1000_82542.c.
References e1000_nvm_info::address_bits, DEBUGFUNC, e1000_nvm_info::delay_usec, e1000_nvm_eeprom_microwire, e1000_read_nvm_microwire(), e1000_stop_nvm(), E1000_SUCCESS, e1000_update_nvm_checksum_generic(), e1000_validate_nvm_checksum_generic(), e1000_write_nvm_microwire(), e1000_hw::nvm, e1000_nvm_info::opcode_bits, e1000_nvm_info::ops, e1000_nvm_operations::read, e1000_nvm_operations::release, e1000_nvm_info::type, e1000_nvm_operations::update, e1000_nvm_operations::validate, e1000_nvm_info::word_size, and e1000_nvm_operations::write.
Referenced by e1000_init_function_pointers_82542().
00070 { 00071 struct e1000_nvm_info *nvm = &hw->nvm; 00072 00073 DEBUGFUNC("e1000_init_nvm_params_82542"); 00074 00075 nvm->address_bits = 6; 00076 nvm->delay_usec = 50; 00077 nvm->opcode_bits = 3; 00078 nvm->type = e1000_nvm_eeprom_microwire; 00079 nvm->word_size = 64; 00080 00081 /* Function Pointers */ 00082 nvm->ops.read = e1000_read_nvm_microwire; 00083 nvm->ops.release = e1000_stop_nvm; 00084 nvm->ops.write = e1000_write_nvm_microwire; 00085 nvm->ops.update = e1000_update_nvm_checksum_generic; 00086 nvm->ops.validate = e1000_validate_nvm_checksum_generic; 00087 00088 return E1000_SUCCESS; 00089 }
e1000_init_mac_params_82542 - Init MAC func ptrs.
: pointer to the HW structure
Definition at line 95 of file e1000_82542.c.
References e1000_mac_operations::check_for_link, e1000_mac_operations::clear_hw_cntrs, e1000_mac_operations::clear_vfta, DEBUGFUNC, e1000_check_for_fiber_link_generic(), e1000_clear_hw_cntrs_82542(), e1000_clear_vfta_generic(), e1000_get_bus_info_82542(), e1000_get_speed_and_duplex_fiber_serdes_generic(), e1000_init_hw_82542(), e1000_led_off_82542(), e1000_led_on_82542(), e1000_media_type_fiber, e1000_mta_set_generic(), E1000_RAR_ENTRIES, e1000_rar_set_82542(), e1000_reset_hw_82542(), e1000_set_lan_id_multi_port_pci(), e1000_setup_fiber_serdes_link_generic(), e1000_setup_link_82542(), E1000_SUCCESS, e1000_update_mc_addr_list_generic(), e1000_write_vfta_generic(), e1000_mac_operations::get_bus_info, e1000_mac_operations::get_link_up_info, e1000_mac_operations::init_hw, e1000_mac_operations::led_off, e1000_mac_operations::led_on, e1000_hw::mac, e1000_phy_info::media_type, e1000_mac_info::mta_reg_count, e1000_mac_operations::mta_set, e1000_mac_info::ops, e1000_hw::phy, e1000_mac_info::rar_entry_count, e1000_mac_operations::rar_set, e1000_mac_operations::reset_hw, e1000_mac_operations::set_lan_id, e1000_mac_operations::setup_link, e1000_mac_operations::setup_physical_interface, e1000_mac_operations::update_mc_addr_list, and e1000_mac_operations::write_vfta.
Referenced by e1000_init_function_pointers_82542().
00096 { 00097 struct e1000_mac_info *mac = &hw->mac; 00098 00099 DEBUGFUNC("e1000_init_mac_params_82542"); 00100 00101 /* Set media type */ 00102 hw->phy.media_type = e1000_media_type_fiber; 00103 00104 /* Set mta register count */ 00105 mac->mta_reg_count = 128; 00106 /* Set rar entry count */ 00107 mac->rar_entry_count = E1000_RAR_ENTRIES; 00108 00109 /* Function pointers */ 00110 00111 /* bus type/speed/width */ 00112 mac->ops.get_bus_info = e1000_get_bus_info_82542; 00113 /* function id */ 00114 mac->ops.set_lan_id = e1000_set_lan_id_multi_port_pci; 00115 /* reset */ 00116 mac->ops.reset_hw = e1000_reset_hw_82542; 00117 /* hw initialization */ 00118 mac->ops.init_hw = e1000_init_hw_82542; 00119 /* link setup */ 00120 mac->ops.setup_link = e1000_setup_link_82542; 00121 /* phy/fiber/serdes setup */ 00122 mac->ops.setup_physical_interface = e1000_setup_fiber_serdes_link_generic; 00123 /* check for link */ 00124 mac->ops.check_for_link = e1000_check_for_fiber_link_generic; 00125 /* multicast address update */ 00126 mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic; 00127 /* writing VFTA */ 00128 mac->ops.write_vfta = e1000_write_vfta_generic; 00129 /* clearing VFTA */ 00130 mac->ops.clear_vfta = e1000_clear_vfta_generic; 00131 /* setting MTA */ 00132 mac->ops.mta_set = e1000_mta_set_generic; 00133 /* set RAR */ 00134 mac->ops.rar_set = e1000_rar_set_82542; 00135 /* turn on/off LED */ 00136 mac->ops.led_on = e1000_led_on_82542; 00137 mac->ops.led_off = e1000_led_off_82542; 00138 /* clear hardware counters */ 00139 mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_82542; 00140 /* link info */ 00141 mac->ops.get_link_up_info = e1000_get_speed_and_duplex_fiber_serdes_generic; 00142 00143 return E1000_SUCCESS; 00144 }
e1000_get_bus_info_82542 - Obtain bus information for adapter : pointer to the HW structure
This will obtain information about the HW bus for which the adapter is attached and stores it in the hw structure.
Definition at line 168 of file e1000_82542.c.
References e1000_hw::bus, DEBUGFUNC, e1000_bus_speed_unknown, e1000_bus_type_pci, e1000_bus_width_unknown, E1000_SUCCESS, e1000_bus_info::speed, e1000_bus_info::type, and e1000_bus_info::width.
Referenced by e1000_init_mac_params_82542().
00169 { 00170 DEBUGFUNC("e1000_get_bus_info_82542"); 00171 00172 hw->bus.type = e1000_bus_type_pci; 00173 hw->bus.speed = e1000_bus_speed_unknown; 00174 hw->bus.width = e1000_bus_width_unknown; 00175 00176 return E1000_SUCCESS; 00177 }
e1000_reset_hw_82542 - Reset hardware : pointer to the HW structure
This resets the hardware into a known state.
Definition at line 185 of file e1000_82542.c.
References e1000_hw::bus, CMD_MEM_WRT_INVALIDATE, DEBUGFUNC, DEBUGOUT, E1000_CTRL, E1000_CTRL_RST, E1000_ICR, E1000_IMC, e1000_pci_clear_mwi(), e1000_pci_set_mwi(), E1000_RCTL, E1000_READ_REG, E1000_REVISION_2, E1000_SUCCESS, E1000_TCTL, E1000_TCTL_PSP, E1000_WRITE_FLUSH, E1000_WRITE_REG, msec_delay, e1000_hw::nvm, e1000_nvm_info::ops, e1000_bus_info::pci_cmd_word, e1000_nvm_operations::reload, e1000_hw::revision_id, and u32.
Referenced by e1000_init_mac_params_82542().
00186 { 00187 struct e1000_bus_info *bus = &hw->bus; 00188 s32 ret_val = E1000_SUCCESS; 00189 u32 ctrl, icr; 00190 00191 DEBUGFUNC("e1000_reset_hw_82542"); 00192 00193 if (hw->revision_id == E1000_REVISION_2) { 00194 DEBUGOUT("Disabling MWI on 82542 rev 2\n"); 00195 e1000_pci_clear_mwi(hw); 00196 } 00197 00198 DEBUGOUT("Masking off all interrupts\n"); 00199 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); 00200 00201 E1000_WRITE_REG(hw, E1000_RCTL, 0); 00202 E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP); 00203 E1000_WRITE_FLUSH(hw); 00204 00205 /* 00206 * Delay to allow any outstanding PCI transactions to complete before 00207 * resetting the device 00208 */ 00209 msec_delay(10); 00210 00211 ctrl = E1000_READ_REG(hw, E1000_CTRL); 00212 00213 DEBUGOUT("Issuing a global reset to 82542/82543 MAC\n"); 00214 E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST); 00215 00216 hw->nvm.ops.reload(hw); 00217 msec_delay(2); 00218 00219 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); 00220 icr = E1000_READ_REG(hw, E1000_ICR); 00221 00222 if (hw->revision_id == E1000_REVISION_2) { 00223 if (bus->pci_cmd_word & CMD_MEM_WRT_INVALIDATE) 00224 e1000_pci_set_mwi(hw); 00225 } 00226 00227 return ret_val; 00228 }
e1000_init_hw_82542 - Initialize hardware : pointer to the HW structure
This inits the hardware readying it for operation.
Definition at line 236 of file e1000_82542.c.
References e1000_hw::_82542, e1000_hw::bus, e1000_mac_operations::clear_vfta, CMD_MEM_WRT_INVALIDATE, DEBUGFUNC, DEBUGOUT, e1000_hw::dev_spec, e1000_dev_spec_82542::dma_fairness, e1000_clear_hw_cntrs_82542(), E1000_CTRL, E1000_CTRL_PRIOR, e1000_init_rx_addrs_generic(), E1000_MTA, e1000_pci_clear_mwi(), e1000_pci_set_mwi(), E1000_RCTL, E1000_RCTL_RST, E1000_READ_REG, E1000_REVISION_2, e1000_setup_link_82542(), E1000_SUCCESS, E1000_VET, E1000_WRITE_FLUSH, E1000_WRITE_REG, E1000_WRITE_REG_ARRAY, e1000_hw::mac, msec_delay, e1000_mac_info::mta_reg_count, e1000_mac_info::ops, e1000_bus_info::pci_cmd_word, e1000_mac_info::rar_entry_count, e1000_hw::revision_id, u16, and u32.
Referenced by e1000_init_mac_params_82542().
00237 { 00238 struct e1000_mac_info *mac = &hw->mac; 00239 struct e1000_dev_spec_82542 *dev_spec = &hw->dev_spec._82542; 00240 s32 ret_val = E1000_SUCCESS; 00241 u32 ctrl; 00242 u16 i; 00243 00244 DEBUGFUNC("e1000_init_hw_82542"); 00245 00246 /* Disabling VLAN filtering */ 00247 E1000_WRITE_REG(hw, E1000_VET, 0); 00248 mac->ops.clear_vfta(hw); 00249 00250 /* For 82542 (rev 2.0), disable MWI and put the receiver into reset */ 00251 if (hw->revision_id == E1000_REVISION_2) { 00252 DEBUGOUT("Disabling MWI on 82542 rev 2.0\n"); 00253 e1000_pci_clear_mwi(hw); 00254 E1000_WRITE_REG(hw, E1000_RCTL, E1000_RCTL_RST); 00255 E1000_WRITE_FLUSH(hw); 00256 msec_delay(5); 00257 } 00258 00259 /* Setup the receive address. */ 00260 e1000_init_rx_addrs_generic(hw, mac->rar_entry_count); 00261 00262 /* For 82542 (rev 2.0), take the receiver out of reset and enable MWI */ 00263 if (hw->revision_id == E1000_REVISION_2) { 00264 E1000_WRITE_REG(hw, E1000_RCTL, 0); 00265 E1000_WRITE_FLUSH(hw); 00266 msec_delay(1); 00267 if (hw->bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) 00268 e1000_pci_set_mwi(hw); 00269 } 00270 00271 /* Zero out the Multicast HASH table */ 00272 DEBUGOUT("Zeroing the MTA\n"); 00273 for (i = 0; i < mac->mta_reg_count; i++) 00274 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0); 00275 00276 /* 00277 * Set the PCI priority bit correctly in the CTRL register. This 00278 * determines if the adapter gives priority to receives, or if it 00279 * gives equal priority to transmits and receives. 00280 */ 00281 if (dev_spec->dma_fairness) { 00282 ctrl = E1000_READ_REG(hw, E1000_CTRL); 00283 E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_PRIOR); 00284 } 00285 00286 /* Setup link and flow control */ 00287 ret_val = e1000_setup_link_82542(hw); 00288 00289 /* 00290 * Clear all of the statistics registers (clear on read). It is 00291 * important that we do this after we have tried to establish link 00292 * because the symbol error count will increment wildly if there 00293 * is no link. 00294 */ 00295 e1000_clear_hw_cntrs_82542(hw); 00296 00297 return ret_val; 00298 }
e1000_setup_link_82542 - Setup flow control and link settings : pointer to the HW structure
Determines which flow control settings to use, then configures flow control. Calls the appropriate media-specific link configuration function. Assuming the adapter has a valid link partner, a valid link should be established. Assumes the hardware has previously been reset and the transmitter and receiver are not enabled.
Definition at line 310 of file e1000_82542.c.
References e1000_fc_info::current_mode, DEBUGFUNC, DEBUGOUT, DEBUGOUT1, e1000_fc_rx_pause, e1000_fc_tx_pause, E1000_FCAH, E1000_FCAL, E1000_FCT, E1000_FCTTV, e1000_set_default_fc_generic(), e1000_set_fc_watermarks_generic(), E1000_SUCCESS, E1000_WRITE_REG, e1000_hw::fc, FLOW_CONTROL_ADDRESS_HIGH, FLOW_CONTROL_ADDRESS_LOW, FLOW_CONTROL_TYPE, e1000_hw::mac, e1000_mac_info::ops, e1000_fc_info::pause_time, e1000_mac_info::report_tx_early, e1000_fc_info::requested_mode, and e1000_mac_operations::setup_physical_interface.
Referenced by e1000_init_hw_82542(), and e1000_init_mac_params_82542().
00311 { 00312 struct e1000_mac_info *mac = &hw->mac; 00313 s32 ret_val = E1000_SUCCESS; 00314 00315 DEBUGFUNC("e1000_setup_link_82542"); 00316 00317 ret_val = e1000_set_default_fc_generic(hw); 00318 if (ret_val) 00319 goto out; 00320 00321 hw->fc.requested_mode &= ~e1000_fc_tx_pause; 00322 00323 if (mac->report_tx_early == 1) 00324 hw->fc.requested_mode &= ~e1000_fc_rx_pause; 00325 00326 /* 00327 * Save off the requested flow control mode for use later. Depending 00328 * on the link partner's capabilities, we may or may not use this mode. 00329 */ 00330 hw->fc.current_mode = hw->fc.requested_mode; 00331 00332 DEBUGOUT1("After fix-ups FlowControl is now = %x\n", 00333 hw->fc.current_mode); 00334 00335 /* Call the necessary subroutine to configure the link. */ 00336 ret_val = mac->ops.setup_physical_interface(hw); 00337 if (ret_val) 00338 goto out; 00339 00340 /* 00341 * Initialize the flow control address, type, and PAUSE timer 00342 * registers to their default values. This is done even if flow 00343 * control is disabled, because it does not hurt anything to 00344 * initialize these registers. 00345 */ 00346 DEBUGOUT("Initializing Flow Control address, type and timer regs\n"); 00347 00348 E1000_WRITE_REG(hw, E1000_FCAL, FLOW_CONTROL_ADDRESS_LOW); 00349 E1000_WRITE_REG(hw, E1000_FCAH, FLOW_CONTROL_ADDRESS_HIGH); 00350 E1000_WRITE_REG(hw, E1000_FCT, FLOW_CONTROL_TYPE); 00351 00352 E1000_WRITE_REG(hw, E1000_FCTTV, hw->fc.pause_time); 00353 00354 ret_val = e1000_set_fc_watermarks_generic(hw); 00355 00356 out: 00357 return ret_val; 00358 }
Referenced by e1000_init_mac_params_82542().
Referenced by e1000_init_mac_params_82542().
e1000_rar_set_82542 - Set receive address register : pointer to the HW structure : pointer to the receive address : receive address array register
Sets the receive address array register at index to the address passed in by addr.
Definition at line 413 of file e1000_82542.c.
References DEBUGFUNC, E1000_RA, E1000_RAH_AV, E1000_WRITE_REG_ARRAY, and u32.
Referenced by e1000_init_mac_params_82542().
00414 { 00415 u32 rar_low, rar_high; 00416 00417 DEBUGFUNC("e1000_rar_set_82542"); 00418 00419 /* 00420 * HW expects these in little endian so we reverse the byte order 00421 * from network order (big endian) to little endian 00422 */ 00423 rar_low = ((u32) addr[0] | 00424 ((u32) addr[1] << 8) | 00425 ((u32) addr[2] << 16) | ((u32) addr[3] << 24)); 00426 00427 rar_high = ((u32) addr[4] | ((u32) addr[5] << 8)); 00428 00429 /* If MAC address zero, no need to set the AV bit */ 00430 if (rar_low || rar_high) 00431 rar_high |= E1000_RAH_AV; 00432 00433 E1000_WRITE_REG_ARRAY(hw, E1000_RA, (index << 1), rar_low); 00434 E1000_WRITE_REG_ARRAY(hw, E1000_RA, ((index << 1) + 1), rar_high); 00435 }
| static void e1000_clear_hw_cntrs_82542 | ( | struct e1000_hw * | hw | ) | [static] |
e1000_clear_hw_cntrs_82542 - Clear device specific hardware counters : pointer to the HW structure
Clears the hardware counters by reading the counter registers.
Definition at line 540 of file e1000_82542.c.
References DEBUGFUNC, e1000_clear_hw_cntrs_base_generic(), E1000_PRC1023, E1000_PRC127, E1000_PRC1522, E1000_PRC255, E1000_PRC511, E1000_PRC64, E1000_PTC1023, E1000_PTC127, E1000_PTC1522, E1000_PTC255, E1000_PTC511, E1000_PTC64, and E1000_READ_REG.
Referenced by e1000_init_hw_82542(), and e1000_init_mac_params_82542().
00541 { 00542 DEBUGFUNC("e1000_clear_hw_cntrs_82542"); 00543 00544 e1000_clear_hw_cntrs_base_generic(hw); 00545 00546 #if 0 00547 E1000_READ_REG(hw, E1000_PRC64); 00548 E1000_READ_REG(hw, E1000_PRC127); 00549 E1000_READ_REG(hw, E1000_PRC255); 00550 E1000_READ_REG(hw, E1000_PRC511); 00551 E1000_READ_REG(hw, E1000_PRC1023); 00552 E1000_READ_REG(hw, E1000_PRC1522); 00553 E1000_READ_REG(hw, E1000_PTC64); 00554 E1000_READ_REG(hw, E1000_PTC127); 00555 E1000_READ_REG(hw, E1000_PTC255); 00556 E1000_READ_REG(hw, E1000_PTC511); 00557 E1000_READ_REG(hw, E1000_PTC1023); 00558 E1000_READ_REG(hw, E1000_PTC1522); 00559 #endif 00560 }
| void e1000_init_function_pointers_82542 | ( | struct e1000_hw * | hw | ) |
e1000_init_function_pointers_82542 - Init func ptrs.
: pointer to the HW structure
Called to initialize all function pointers and parameters.
Definition at line 152 of file e1000_82542.c.
References DEBUGFUNC, e1000_init_mac_params_82542(), e1000_init_nvm_params_82542(), e1000_init_phy_params_82542(), e1000_phy_operations::init_params, e1000_nvm_operations::init_params, e1000_mac_operations::init_params, e1000_hw::mac, e1000_hw::nvm, e1000_phy_info::ops, e1000_nvm_info::ops, e1000_mac_info::ops, and e1000_hw::phy.
Referenced by e1000_setup_init_funcs().
00153 { 00154 DEBUGFUNC("e1000_init_function_pointers_82542"); 00155 00156 hw->mac.ops.init_params = e1000_init_mac_params_82542; 00157 hw->nvm.ops.init_params = e1000_init_nvm_params_82542; 00158 hw->phy.ops.init_params = e1000_init_phy_params_82542; 00159 }
e1000_led_on_82542 - Turn on SW controllable LED : pointer to the HW structure
Turns the SW defined LED on.
Definition at line 366 of file e1000_82542.c.
References DEBUGFUNC, E1000_CTRL, E1000_CTRL_SWDPIN0, E1000_CTRL_SWDPIO0, E1000_READ_REG, E1000_SUCCESS, E1000_WRITE_REG, and u32.
00367 { 00368 #if 0 00369 u32 ctrl = E1000_READ_REG(hw, E1000_CTRL); 00370 00371 DEBUGFUNC("e1000_led_on_82542"); 00372 00373 ctrl |= E1000_CTRL_SWDPIN0; 00374 ctrl |= E1000_CTRL_SWDPIO0; 00375 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); 00376 00377 return E1000_SUCCESS; 00378 #endif 00379 return 0; 00380 }
e1000_led_off_82542 - Turn off SW controllable LED : pointer to the HW structure
Turns the SW defined LED off.
Definition at line 388 of file e1000_82542.c.
References DEBUGFUNC, E1000_CTRL, E1000_CTRL_SWDPIN0, E1000_CTRL_SWDPIO0, E1000_READ_REG, E1000_SUCCESS, E1000_WRITE_REG, and u32.
00389 { 00390 #if 0 00391 u32 ctrl = E1000_READ_REG(hw, E1000_CTRL); 00392 00393 DEBUGFUNC("e1000_led_off_82542"); 00394 00395 ctrl &= ~E1000_CTRL_SWDPIN0; 00396 ctrl |= E1000_CTRL_SWDPIO0; 00397 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); 00398 00399 return E1000_SUCCESS; 00400 #endif 00401 return 0; 00402 }
e1000_translate_register_82542 - Translate the proper register offset : e1000 register to be read
Registers in 82542 are located in different offsets than other adapters even though they function in the same manner. This function takes in the name of the register to read and returns the correct offset for 82542 silicon.
Definition at line 446 of file e1000_82542.c.
References E1000_FCRTH, E1000_FCRTL, E1000_MTA, E1000_RA, E1000_RDBAH, E1000_RDBAL, E1000_RDH, E1000_RDLEN, E1000_RDT, E1000_RDTR, E1000_TDBAH, E1000_TDBAL, E1000_TDFH, E1000_TDFT, E1000_TDH, E1000_TDLEN, E1000_TDT, E1000_TIDV, and E1000_VFTA.
00447 { 00448 /* 00449 * Some of the 82542 registers are located at different 00450 * offsets than they are in newer adapters. 00451 * Despite the difference in location, the registers 00452 * function in the same manner. 00453 */ 00454 switch (reg) { 00455 case E1000_RA: 00456 reg = 0x00040; 00457 break; 00458 case E1000_RDTR: 00459 reg = 0x00108; 00460 break; 00461 case E1000_RDBAL(0): 00462 reg = 0x00110; 00463 break; 00464 case E1000_RDBAH(0): 00465 reg = 0x00114; 00466 break; 00467 case E1000_RDLEN(0): 00468 reg = 0x00118; 00469 break; 00470 case E1000_RDH(0): 00471 reg = 0x00120; 00472 break; 00473 case E1000_RDT(0): 00474 reg = 0x00128; 00475 break; 00476 case E1000_RDBAL(1): 00477 reg = 0x00138; 00478 break; 00479 case E1000_RDBAH(1): 00480 reg = 0x0013C; 00481 break; 00482 case E1000_RDLEN(1): 00483 reg = 0x00140; 00484 break; 00485 case E1000_RDH(1): 00486 reg = 0x00148; 00487 break; 00488 case E1000_RDT(1): 00489 reg = 0x00150; 00490 break; 00491 case E1000_FCRTH: 00492 reg = 0x00160; 00493 break; 00494 case E1000_FCRTL: 00495 reg = 0x00168; 00496 break; 00497 case E1000_MTA: 00498 reg = 0x00200; 00499 break; 00500 case E1000_TDBAL(0): 00501 reg = 0x00420; 00502 break; 00503 case E1000_TDBAH(0): 00504 reg = 0x00424; 00505 break; 00506 case E1000_TDLEN(0): 00507 reg = 0x00428; 00508 break; 00509 case E1000_TDH(0): 00510 reg = 0x00430; 00511 break; 00512 case E1000_TDT(0): 00513 reg = 0x00438; 00514 break; 00515 case E1000_TIDV: 00516 reg = 0x00440; 00517 break; 00518 case E1000_VFTA: 00519 reg = 0x00600; 00520 break; 00521 case E1000_TDFH: 00522 reg = 0x08010; 00523 break; 00524 case E1000_TDFT: 00525 reg = 0x08018; 00526 break; 00527 default: 00528 break; 00529 } 00530 00531 return reg; 00532 }
struct pci_device_id e1000_82542_nics[] [static] |
Initial value:
{
PCI_ROM(0x8086, 0x1000, "E1000_DEV_ID_82542", "E1000_DEV_ID_82542", e1000_82542),
}
Definition at line 562 of file e1000_82542.c.
| struct pci_driver e1000_82542_driver __pci_driver |
Initial value:
{
.ids = e1000_82542_nics,
.id_count = (sizeof (e1000_82542_nics) / sizeof (e1000_82542_nics[0])),
.probe = e1000_probe,
.remove = e1000_remove,
}
Definition at line 566 of file e1000_82542.c.
1.5.7.1