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| #define NVM_WORD_SIZE_BASE_SHIFT_82541 (NVM_WORD_SIZE_BASE_SHIFT + 1) |
| #define IGP01E1000_PHY_CHANNEL_NUM 4 |
Definition at line 36 of file e1000_82541.h.
| #define IGP01E1000_PHY_AGC_A 0x1172 |
Definition at line 38 of file e1000_82541.h.
| #define IGP01E1000_PHY_AGC_B 0x1272 |
Definition at line 39 of file e1000_82541.h.
| #define IGP01E1000_PHY_AGC_C 0x1472 |
Definition at line 40 of file e1000_82541.h.
| #define IGP01E1000_PHY_AGC_D 0x1872 |
Definition at line 41 of file e1000_82541.h.
| #define IGP01E1000_PHY_AGC_PARAM_A 0x1171 |
Definition at line 43 of file e1000_82541.h.
| #define IGP01E1000_PHY_AGC_PARAM_B 0x1271 |
Definition at line 44 of file e1000_82541.h.
| #define IGP01E1000_PHY_AGC_PARAM_C 0x1471 |
Definition at line 45 of file e1000_82541.h.
| #define IGP01E1000_PHY_AGC_PARAM_D 0x1871 |
Definition at line 46 of file e1000_82541.h.
| #define IGP01E1000_PHY_EDAC_MU_INDEX 0xC000 |
Definition at line 48 of file e1000_82541.h.
| #define IGP01E1000_PHY_EDAC_SIGN_EXT_9_BITS 0x8000 |
Definition at line 49 of file e1000_82541.h.
| #define IGP01E1000_PHY_DSP_RESET 0x1F33 |
Definition at line 51 of file e1000_82541.h.
| #define IGP01E1000_PHY_DSP_FFE 0x1F35 |
Definition at line 53 of file e1000_82541.h.
| #define IGP01E1000_PHY_DSP_FFE_CM_CP 0x0069 |
Definition at line 54 of file e1000_82541.h.
| #define IGP01E1000_PHY_DSP_FFE_DEFAULT 0x002A |
Definition at line 55 of file e1000_82541.h.
| #define IGP01E1000_IEEE_FORCE_GIG 0x0140 |
Definition at line 57 of file e1000_82541.h.
| #define IGP01E1000_IEEE_RESTART_AUTONEG 0x3300 |
Definition at line 58 of file e1000_82541.h.
| #define IGP01E1000_AGC_LENGTH_SHIFT 7 |
Definition at line 60 of file e1000_82541.h.
| #define IGP01E1000_AGC_RANGE 10 |
Definition at line 61 of file e1000_82541.h.
| #define FFE_IDLE_ERR_COUNT_TIMEOUT_20 20 |
Definition at line 63 of file e1000_82541.h.
| #define FFE_IDLE_ERR_COUNT_TIMEOUT_100 100 |
Definition at line 64 of file e1000_82541.h.
| #define IGP01E1000_ANALOG_FUSE_STATUS 0x20D0 |
| #define IGP01E1000_ANALOG_SPARE_FUSE_STATUS 0x20D1 |
| #define IGP01E1000_ANALOG_FUSE_CONTROL 0x20DC |
| #define IGP01E1000_ANALOG_FUSE_BYPASS 0x20DE |
| #define IGP01E1000_ANALOG_SPARE_FUSE_ENABLED 0x0100 |
| #define IGP01E1000_ANALOG_FUSE_FINE_MASK 0x0F80 |
| #define IGP01E1000_ANALOG_FUSE_COARSE_MASK 0x0070 |
| #define IGP01E1000_ANALOG_FUSE_COARSE_THRESH 0x0040 |
| #define IGP01E1000_ANALOG_FUSE_COARSE_10 0x0010 |
| #define IGP01E1000_ANALOG_FUSE_FINE_1 0x0080 |
| #define IGP01E1000_ANALOG_FUSE_FINE_10 0x0500 |
| #define IGP01E1000_ANALOG_FUSE_POLY_MASK 0xF000 |
| #define IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL 0x0002 |
| #define IGP01E1000_MSE_CHANNEL_D 0x000F |
Definition at line 81 of file e1000_82541.h.
| #define IGP01E1000_MSE_CHANNEL_C 0x00F0 |
Definition at line 82 of file e1000_82541.h.
| #define IGP01E1000_MSE_CHANNEL_B 0x0F00 |
Definition at line 83 of file e1000_82541.h.
| #define IGP01E1000_MSE_CHANNEL_A 0xF000 |
Definition at line 84 of file e1000_82541.h.
| FILE_LICENCE | ( | GPL2_OR_LATER | ) |
1.5.7.1