#include "etherboot.h"#include "nic.h"#include <gpxe/pci.h>#include <gpxe/ethernet.h>Go to the source code of this file.
Data Structures | |
| struct | txdesc |
| struct | rxdesc |
Defines | |
| #define | TX_TIME_OUT 2*TICKS_PER_SEC |
| #define | EEPROM_ADDRLEN 6 |
| #define | EEPROM_SIZE 32 |
| #define | EE_WRITE_CMD (5 << addr_len) |
| #define | EE_READ_CMD (6 << addr_len) |
| #define | EE_ERASE_CMD (7 << addr_len) |
| #define | EE_SHIFT_CLK 0x02 |
| #define | EE_CS 0x01 |
| #define | EE_DATA_WRITE 0x04 |
| #define | EE_WRITE_0 0x01 |
| #define | EE_WRITE_1 0x05 |
| #define | EE_DATA_READ 0x08 |
| #define | EE_ENB (0x4800 | EE_CS) |
| #define | PHY_DATA_0 0x0 |
| #define | PHY_DATA_1 0x20000 |
| #define | MDCLKH 0x10000 |
| #define | eeprom_delay() inl(ee_addr) |
| #define | BUFLEN 1536 |
| #define | NTXD 2 |
| #define | NRXD 4 |
| #define | txd davicom_bufs.txd |
| #define | txb davicom_bufs.txb |
| #define | rxd davicom_bufs.rxd |
| #define | rxb davicom_bufs.rxb |
| #define | PCI_DEVICE_ID_DM9009 0x9009 |
Enumerations | |
| enum | davicom_offsets { CSR0 = 0, CSR1 = 0x08, CSR2 = 0x10, CSR3 = 0x18, CSR4 = 0x20, CSR5 = 0x28, CSR6 = 0x30, CSR7 = 0x38, CSR8 = 0x40, CSR9 = 0x48, CSR10 = 0x50, CSR11 = 0x58, CSR12 = 0x60, CSR13 = 0x68, CSR14 = 0x70, CSR15 = 0x78, CSR16 = 0x80, CSR20 = 0xA0 } |
Functions | |
| FILE_LICENCE (GPL_ANY) | |
| static void | whereami (const char *str) |
| static int | read_eeprom (unsigned long ioaddr, int location, int addr_len) |
| static int | davicom_probe (struct nic *nic, struct pci_device *pci) |
| static void | davicom_init_chain (struct nic *nic) |
| static void | davicom_reset (struct nic *nic) |
| static void | davicom_transmit (struct nic *nic, const char *d, unsigned int t, unsigned int s, const char *p) |
| static int | davicom_poll (struct nic *nic, int retrieve) |
| static void | davicom_disable (struct nic *nic) |
| static void | davicom_wait (unsigned int nticks) |
| static int | phy_read (int) |
| static void | phy_write (int, u16) |
| static void | phy_write_1bit (u32, u32) |
| static int | phy_read_1bit (u32) |
| static void | davicom_media_chk (struct nic *) |
| static void | HPNA_process (void) |
| static void | davicom_media_chk (struct nic *nic __unused) |
| static void | davicom_irq (struct nic *nic __unused, irq_action_t action __unused) |
| PCI_DRIVER (davicom_driver, davicom_nics, PCI_NO_CLASS) | |
| DRIVER ("DAVICOM", nic_driver, pci_driver, davicom_driver, davicom_probe, davicom_disable) | |
Variables | |
| static unsigned char | ee_data [EEPROM_SIZE] |
| static struct nic_operations | davicom_operations |
| static unsigned short | vendor |
| static unsigned short | dev_id |
| static unsigned long | ioaddr |
| struct { | |
| struct txdesc txd [NTXD] | |
| unsigned char txb [BUFLEN] | |
| struct rxdesc rxd [NRXD] | |
| unsigned char rxb [NRXD *BUFLEN] | |
| } | __shared |
| static int | rxd_tail |
| static int | TxPtr |
| static struct pci_device_id | davicom_nics [] |
| #define TX_TIME_OUT 2*TICKS_PER_SEC |
Definition at line 54 of file davicom.c.
Referenced by davicom_reset(), davicom_transmit(), mtd_transmit(), sundance_transmit(), tlan_transmit(), tulip_reset(), and tulip_transmit().
| #define EEPROM_ADDRLEN 6 |
| #define EEPROM_SIZE 32 |
| #define EE_READ_CMD (6 << addr_len) |
| #define EE_SHIFT_CLK 0x02 |
| #define EE_CS 0x01 |
| #define EE_DATA_WRITE 0x04 |
| #define EE_DATA_READ 0x08 |
| #define EE_ENB (0x4800 | EE_CS) |
| #define PHY_DATA_0 0x0 |
| #define PHY_DATA_1 0x20000 |
| #define MDCLKH 0x10000 |
| #define eeprom_delay | ( | ) | inl(ee_addr) |
Definition at line 94 of file davicom.c.
Referenced by eeprom_read(), phy_read_1bit(), phy_write_1bit(), read_eeprom(), and sis900_read_eeprom().
| #define BUFLEN 1536 |
Definition at line 122 of file davicom.c.
Referenced by davicom_init_chain(), davicom_poll(), tulip_init_ring(), and tulip_poll().
| #define NTXD 2 |
Definition at line 138 of file davicom.c.
Referenced by davicom_init_chain(), davicom_reset(), and davicom_transmit().
| #define NRXD 4 |
| #define txd davicom_bufs.txd |
Definition at line 146 of file davicom.c.
Referenced by davicom_init_chain(), davicom_reset(), davicom_transmit(), dmfe_descriptor_init(), dmfe_init_dm910x(), dmfe_transmit(), efab_transmit(), send_filter_frame(), sis190_process_tx(), sis900_init_txd(), and sis900_transmit().
| #define txb davicom_bufs.txb |
Definition at line 147 of file davicom.c.
Referenced by davicom_init_chain(), davicom_transmit(), dmfe_descriptor_init(), dmfe_transmit(), forcedeth_transmit(), init_ring(), mtd_transmit(), ns83820_transmit(), send_filter_frame(), sis900_init_txd(), sis900_transmit(), sundance_reset(), sundance_transmit(), TLan_ResetLists(), tlan_transmit(), tulip_init_ring(), tulip_reset(), tulip_transmit(), and velocity_open().
| #define rxd davicom_bufs.rxd |
Definition at line 148 of file davicom.c.
Referenced by davicom_init_chain(), davicom_poll(), davicom_reset(), dmfe_descriptor_init(), dmfe_init_dm910x(), dmfe_poll(), efab_fill_rx_queue(), sis900_init_rxd(), sis900_poll(), tg3_init_rings(), vxge_hw_ring_replenish(), and vxge_hw_vpath_poll_rx().
| #define rxb davicom_bufs.rxb |
Definition at line 149 of file davicom.c.
Referenced by alloc_rx(), davicom_init_chain(), davicom_poll(), dmfe_descriptor_init(), dmfe_poll(), forcedeth_poll(), init_ring(), ns83820_poll(), ns83820_setup_rx(), sis900_init_rxd(), sis900_poll(), sundance_poll(), tlan_poll(), TLan_ResetLists(), tulip_init_ring(), tulip_poll(), and velocity_open().
| #define PCI_DEVICE_ID_DM9009 0x9009 |
Referenced by davicom_media_chk().
| enum davicom_offsets |
| CSR0 | |
| CSR1 | |
| CSR2 | |
| CSR3 | |
| CSR4 | |
| CSR5 | |
| CSR6 | |
| CSR7 | |
| CSR8 | |
| CSR9 | |
| CSR10 | |
| CSR11 | |
| CSR12 | |
| CSR13 | |
| CSR14 | |
| CSR15 | |
| CSR16 | |
| CSR20 |
Definition at line 57 of file davicom.c.
00057 { 00058 CSR0=0, CSR1=0x08, CSR2=0x10, CSR3=0x18, CSR4=0x20, CSR5=0x28, 00059 CSR6=0x30, CSR7=0x38, CSR8=0x40, CSR9=0x48, CSR10=0x50, CSR11=0x58, 00060 CSR12=0x60, CSR13=0x68, CSR14=0x70, CSR15=0x78, CSR16=0x80, CSR20=0xA0 00061 };
| FILE_LICENCE | ( | GPL_ANY | ) |
| static void whereami | ( | const char * | str | ) | [inline, static] |
Definition at line 180 of file davicom.c.
References printf().
Referenced by davicom_disable(), davicom_poll(), davicom_probe(), davicom_reset(), davicom_transmit(), init_media(), mdio_read(), mdio_write(), nway_start(), parse_eeprom(), phy_read(), phy_read_1bit(), phy_write(), phy_write_1bit(), pnic_do_nway(), read_eeprom(), select_media(), start_link(), tulip_disable(), tulip_init_ring(), tulip_poll(), tulip_probe(), tulip_reset(), and tulip_transmit().
00181 { 00182 printf("%s\n", str); 00183 /* sleep(2); */ 00184 }
| static int read_eeprom | ( | unsigned long | ioaddr, | |
| int | location, | |||
| int | addr_len | |||
| ) | [static] |
Definition at line 393 of file davicom.c.
References CSR9, EE_CS, EE_DATA_READ, EE_DATA_WRITE, EE_ENB, EE_READ_CMD, EE_SHIFT_CLK, eeprom_delay, inl, outl, and whereami().
Referenced by davicom_probe(), eepro_probe(), epic100_probe(), and tulip_probe().
00394 { 00395 int i; 00396 unsigned short retval = 0; 00397 long ee_addr = ioaddr + CSR9; 00398 int read_cmd = location | EE_READ_CMD; 00399 00400 whereami("read_eeprom\n"); 00401 00402 outl(EE_ENB & ~EE_CS, ee_addr); 00403 outl(EE_ENB, ee_addr); 00404 00405 /* Shift the read command bits out. */ 00406 for (i = 4 + addr_len; i >= 0; i--) { 00407 short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0; 00408 outl(EE_ENB | dataval, ee_addr); 00409 eeprom_delay(); 00410 outl(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr); 00411 eeprom_delay(); 00412 } 00413 outl(EE_ENB, ee_addr); 00414 00415 for (i = 16; i > 0; i--) { 00416 outl(EE_ENB | EE_SHIFT_CLK, ee_addr); 00417 eeprom_delay(); 00418 retval = (retval << 1) | ((inl(ee_addr) & EE_DATA_READ) ? 1 : 0); 00419 outl(EE_ENB, ee_addr); 00420 eeprom_delay(); 00421 } 00422 00423 /* Terminate the EEPROM access. */ 00424 outl(EE_ENB & ~EE_CS, ee_addr); 00425 return retval; 00426 }
| static int davicom_probe | ( | struct nic * | nic, | |
| struct pci_device * | pci | |||
| ) | [static] |
Definition at line 658 of file davicom.c.
References CSR6, CSR8, davicom_operations, davicom_reset(), DBG, dev_id, pci_device::device, ee_data, EEPROM_ADDRLEN, ETH_ALEN, eth_ntoa(), inl, nic::ioaddr, ioaddr, pci_device::ioaddr, nic::irqno, le16_to_cpu, nic::nic_op, nic::node_addr, outl, pci_write_config_dword(), read_eeprom(), pci_device::vendor, vendor, and whereami().
00658 { 00659 00660 unsigned int i; 00661 00662 whereami("davicom_probe\n"); 00663 00664 if (pci->ioaddr == 0) 00665 return 0; 00666 00667 vendor = pci->vendor; 00668 dev_id = pci->device; 00669 ioaddr = pci->ioaddr; 00670 00671 nic->ioaddr = pci->ioaddr; 00672 nic->irqno = 0; 00673 00674 /* wakeup chip */ 00675 pci_write_config_dword(pci, 0x40, 0x00000000); 00676 00677 /* Stop the chip's Tx and Rx processes. */ 00678 outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6); 00679 00680 /* Clear the missed-packet counter. */ 00681 inl(ioaddr + CSR8); 00682 00683 /* Get MAC Address */ 00684 /* read EEPROM data */ 00685 for (i = 0; i < sizeof(ee_data)/2; i++) 00686 ((unsigned short *)ee_data)[i] = 00687 le16_to_cpu(read_eeprom(ioaddr, i, EEPROM_ADDRLEN)); 00688 00689 /* extract MAC address from EEPROM buffer */ 00690 for (i=0; i<ETH_ALEN; i++) 00691 nic->node_addr[i] = ee_data[20+i]; 00692 00693 DBG ( "Davicom %s at IOADDR %4.4lx\n", eth_ntoa ( nic->node_addr ), ioaddr ); 00694 00695 /* initialize device */ 00696 davicom_reset(nic); 00697 nic->nic_op = &davicom_operations; 00698 return 1; 00699 }
| static void davicom_init_chain | ( | struct nic * | nic | ) | [static] |
Definition at line 432 of file davicom.c.
References BUFLEN, nic::node_addr, NRXD, NTXD, rxb, rxd, txb, txd, and virt_to_bus().
Referenced by davicom_reset().
00433 { 00434 int i; 00435 00436 /* setup the transmit descriptor */ 00437 /* Sten: Set 2 TX descriptor but use one TX buffer because 00438 it transmit a packet and wait complete every time. */ 00439 for (i=0; i<NTXD; i++) { 00440 txd[i].buf1addr = (void *)virt_to_bus(&txb[0]); /* Used same TX buffer */ 00441 txd[i].buf2addr = (void *)virt_to_bus(&txd[i+1]); /* Point to Next TX desc */ 00442 txd[i].buf1sz = 0; 00443 txd[i].buf2sz = 0; 00444 txd[i].control = 0x184; /* Begin/End/Chain */ 00445 txd[i].status = 0x00000000; /* give ownership to Host */ 00446 } 00447 00448 /* construct perfect filter frame with mac address as first match 00449 and broadcast address for all others */ 00450 for (i=0; i<192; i++) txb[i] = 0xFF; 00451 txb[0] = nic->node_addr[0]; 00452 txb[1] = nic->node_addr[1]; 00453 txb[4] = nic->node_addr[2]; 00454 txb[5] = nic->node_addr[3]; 00455 txb[8] = nic->node_addr[4]; 00456 txb[9] = nic->node_addr[5]; 00457 00458 /* setup receive descriptor */ 00459 for (i=0; i<NRXD; i++) { 00460 rxd[i].buf1addr = (void *)virt_to_bus(&rxb[i * BUFLEN]); 00461 rxd[i].buf2addr = (void *)virt_to_bus(&rxd[i+1]); /* Point to Next RX desc */ 00462 rxd[i].buf1sz = BUFLEN; 00463 rxd[i].buf2sz = 0; /* not used */ 00464 rxd[i].control = 0x4; /* Chain Structure */ 00465 rxd[i].status = 0x80000000; /* give ownership to device */ 00466 } 00467 00468 /* Chain the last descriptor to first */ 00469 txd[NTXD - 1].buf2addr = (void *)virt_to_bus(&txd[0]); 00470 rxd[NRXD - 1].buf2addr = (void *)virt_to_bus(&rxd[0]); 00471 TxPtr = 0; 00472 rxd_tail = 0; 00473 }
| static void davicom_reset | ( | struct nic * | nic | ) | [static] |
Definition at line 479 of file davicom.c.
References CSR0, CSR1, CSR2, CSR3, CSR4, CSR6, currticks(), davicom_init_chain(), davicom_media_chk(), davicom_wait(), inl, ioaddr, NTXD, outl, printf(), rxd, rxdesc::status, TICKS_PER_SEC, TX_TIME_OUT, txd, virt_to_bus(), and whereami().
Referenced by davicom_disable(), and davicom_probe().
00480 { 00481 unsigned long to; 00482 00483 whereami("davicom_reset\n"); 00484 00485 /* Stop Tx and RX */ 00486 outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6); 00487 00488 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */ 00489 outl(0x00000001, ioaddr + CSR0); 00490 00491 davicom_wait(TICKS_PER_SEC); 00492 00493 /* TX/RX descriptor burst */ 00494 outl(0x0C00000, ioaddr + CSR0); /* Sten 10/9 */ 00495 00496 /* set up transmit and receive descriptors */ 00497 davicom_init_chain(nic); /* Sten 10/9 */ 00498 00499 /* Point to receive descriptor */ 00500 outl(virt_to_bus(&rxd[0]), ioaddr + CSR3); 00501 outl(virt_to_bus(&txd[0]), ioaddr + CSR4); /* Sten 10/9 */ 00502 00503 /* According phyxcer media mode to set CR6, 00504 DM9102/A phyxcer can auto-detect media mode */ 00505 davicom_media_chk(nic); 00506 00507 /* Prepare Setup Frame Sten 10/9 */ 00508 txd[TxPtr].buf1sz = 192; 00509 txd[TxPtr].control = 0x024; /* SF/CE */ 00510 txd[TxPtr].status = 0x80000000; /* Give ownership to device */ 00511 00512 /* Start Tx */ 00513 outl(inl(ioaddr + CSR6) | 0x00002000, ioaddr + CSR6); 00514 /* immediate transmit demand */ 00515 outl(0, ioaddr + CSR1); 00516 00517 to = currticks() + TX_TIME_OUT; 00518 while ((txd[TxPtr].status & 0x80000000) && (currticks() < to)) /* Sten 10/9 */ 00519 /* wait */ ; 00520 00521 if (currticks() >= to) { 00522 printf ("TX Setup Timeout!\n"); 00523 } 00524 /* Point to next TX descriptor */ 00525 TxPtr = (++TxPtr >= NTXD) ? 0:TxPtr; /* Sten 10/9 */ 00526 00527 #ifdef DAVICOM_DEBUG 00528 printf("txd.status = %X\n", txd.status); 00529 printf("ticks = %d\n", currticks() - (to - TX_TIME_OUT)); 00530 davicom_more(); 00531 #endif 00532 00533 /* enable RX */ 00534 outl(inl(ioaddr + CSR6) | 0x00000002, ioaddr + CSR6); 00535 /* immediate poll demand */ 00536 outl(0, ioaddr + CSR2); 00537 }
| static void davicom_transmit | ( | struct nic * | nic, | |
| const char * | d, | |||
| unsigned int | t, | |||
| unsigned int | s, | |||
| const char * | p | |||
| ) | [static] |
Definition at line 543 of file davicom.c.
References CSR1, currticks(), ETH_ALEN, ETH_HLEN, ioaddr, memcpy, nic::node_addr, NTXD, outl, printf(), rxdesc::status, TX_TIME_OUT, txb, txd, and whereami().
00545 { 00546 unsigned long to; 00547 00548 whereami("davicom_transmit\n"); 00549 00550 /* Stop Tx */ 00551 /* outl(inl(ioaddr + CSR6) & ~0x00002000, ioaddr + CSR6); */ 00552 00553 /* setup ethernet header */ 00554 memcpy(&txb[0], d, ETH_ALEN); /* DA 6byte */ 00555 memcpy(&txb[ETH_ALEN], nic->node_addr, ETH_ALEN); /* SA 6byte*/ 00556 txb[ETH_ALEN*2] = (t >> 8) & 0xFF; /* Frame type: 2byte */ 00557 txb[ETH_ALEN*2+1] = t & 0xFF; 00558 memcpy(&txb[ETH_HLEN], p, s); /* Frame data */ 00559 00560 /* setup the transmit descriptor */ 00561 txd[TxPtr].buf1sz = ETH_HLEN+s; 00562 txd[TxPtr].control = 0x00000184; /* LS+FS+CE */ 00563 txd[TxPtr].status = 0x80000000; /* give ownership to device */ 00564 00565 /* immediate transmit demand */ 00566 outl(0, ioaddr + CSR1); 00567 00568 to = currticks() + TX_TIME_OUT; 00569 while ((txd[TxPtr].status & 0x80000000) && (currticks() < to)) 00570 /* wait */ ; 00571 00572 if (currticks() >= to) { 00573 printf ("TX Timeout!\n"); 00574 } 00575 00576 /* Point to next TX descriptor */ 00577 TxPtr = (++TxPtr >= NTXD) ? 0:TxPtr; /* Sten 10/9 */ 00578 00579 }
| static int davicom_poll | ( | struct nic * | nic, | |
| int | retrieve | |||
| ) | [static] |
Definition at line 584 of file davicom.c.
References BUFLEN, memcpy, NRXD, nic::packet, nic::packetlen, rxb, rxd, rxdesc::status, and whereami().
00585 { 00586 whereami("davicom_poll\n"); 00587 00588 if (rxd[rxd_tail].status & 0x80000000) 00589 return 0; 00590 00591 if ( ! retrieve ) return 1; 00592 00593 whereami("davicom_poll got one\n"); 00594 00595 nic->packetlen = (rxd[rxd_tail].status & 0x3FFF0000) >> 16; 00596 00597 if( rxd[rxd_tail].status & 0x00008000){ 00598 rxd[rxd_tail].status = 0x80000000; 00599 rxd_tail++; 00600 if (rxd_tail == NRXD) rxd_tail = 0; 00601 return 0; 00602 } 00603 00604 /* copy packet to working buffer */ 00605 /* XXX - this copy could be avoided with a little more work 00606 but for now we are content with it because the optimised 00607 memcpy is quite fast */ 00608 00609 memcpy(nic->packet, rxb + rxd_tail * BUFLEN, nic->packetlen); 00610 00611 /* return the descriptor and buffer to receive ring */ 00612 rxd[rxd_tail].status = 0x80000000; 00613 rxd_tail++; 00614 if (rxd_tail == NRXD) rxd_tail = 0; 00615 00616 return 1; 00617 }
| static void davicom_disable | ( | struct nic * | nic | ) | [static] |
Definition at line 622 of file davicom.c.
References CSR6, CSR7, CSR8, davicom_reset(), inl, ioaddr, outl, and whereami().
00622 { 00623 00624 whereami("davicom_disable\n"); 00625 00626 davicom_reset(nic); 00627 00628 /* disable interrupts */ 00629 outl(0x00000000, ioaddr + CSR7); 00630 00631 /* Stop the chip's Tx and Rx processes. */ 00632 outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6); 00633 00634 /* Clear the missed-packet counter. */ 00635 inl(ioaddr + CSR8); 00636 }
| static void davicom_wait | ( | unsigned int | nticks | ) | [static] |
Definition at line 197 of file davicom.c.
References currticks().
Referenced by davicom_reset().
00198 { 00199 unsigned int to = currticks() + nticks; 00200 while (currticks() < to) 00201 /* wait */ ; 00202 }
| static int phy_read | ( | int | location | ) | [static] |
Definition at line 211 of file davicom.c.
References CSR9, ioaddr, PHY_DATA_0, PHY_DATA_1, phy_read_1bit(), phy_write_1bit(), u16, u32, and whereami().
Referenced by davicom_media_chk(), dmfe_parse_srom(), dmfe_program_DM9801(), dmfe_program_DM9802(), dmfe_set_phyxcer(), and HPNA_process().
00212 { 00213 int i, phy_addr=1; 00214 u16 phy_data; 00215 u32 io_dcr9; 00216 00217 whereami("phy_read\n"); 00218 00219 io_dcr9 = ioaddr + CSR9; 00220 00221 /* Send 33 synchronization clock to Phy controller */ 00222 for (i=0; i<34; i++) 00223 phy_write_1bit(io_dcr9, PHY_DATA_1); 00224 00225 /* Send start command(01) to Phy */ 00226 phy_write_1bit(io_dcr9, PHY_DATA_0); 00227 phy_write_1bit(io_dcr9, PHY_DATA_1); 00228 00229 /* Send read command(10) to Phy */ 00230 phy_write_1bit(io_dcr9, PHY_DATA_1); 00231 phy_write_1bit(io_dcr9, PHY_DATA_0); 00232 00233 /* Send Phy addres */ 00234 for (i=0x10; i>0; i=i>>1) 00235 phy_write_1bit(io_dcr9, phy_addr&i ? PHY_DATA_1: PHY_DATA_0); 00236 00237 /* Send register addres */ 00238 for (i=0x10; i>0; i=i>>1) 00239 phy_write_1bit(io_dcr9, location&i ? PHY_DATA_1: PHY_DATA_0); 00240 00241 /* Skip transition state */ 00242 phy_read_1bit(io_dcr9); 00243 00244 /* read 16bit data */ 00245 for (phy_data=0, i=0; i<16; i++) { 00246 phy_data<<=1; 00247 phy_data|=phy_read_1bit(io_dcr9); 00248 } 00249 00250 return phy_data; 00251 }
| static void phy_write | ( | int | location, | |
| u16 | phy_data | |||
| ) | [static] |
Definition at line 256 of file davicom.c.
References CSR9, ioaddr, PHY_DATA_0, PHY_DATA_1, phy_write_1bit(), u16, u32, and whereami().
Referenced by davicom_media_chk(), dmfe_disable(), dmfe_program_DM9801(), dmfe_program_DM9802(), dmfe_set_phyxcer(), and HPNA_process().
00257 { 00258 u16 i, phy_addr=1; 00259 u32 io_dcr9; 00260 00261 whereami("phy_write\n"); 00262 00263 io_dcr9 = ioaddr + CSR9; 00264 00265 /* Send 33 synchronization clock to Phy controller */ 00266 for (i=0; i<34; i++) 00267 phy_write_1bit(io_dcr9, PHY_DATA_1); 00268 00269 /* Send start command(01) to Phy */ 00270 phy_write_1bit(io_dcr9, PHY_DATA_0); 00271 phy_write_1bit(io_dcr9, PHY_DATA_1); 00272 00273 /* Send write command(01) to Phy */ 00274 phy_write_1bit(io_dcr9, PHY_DATA_0); 00275 phy_write_1bit(io_dcr9, PHY_DATA_1); 00276 00277 /* Send Phy addres */ 00278 for (i=0x10; i>0; i=i>>1) 00279 phy_write_1bit(io_dcr9, phy_addr&i ? PHY_DATA_1: PHY_DATA_0); 00280 00281 /* Send register addres */ 00282 for (i=0x10; i>0; i=i>>1) 00283 phy_write_1bit(io_dcr9, location&i ? PHY_DATA_1: PHY_DATA_0); 00284 00285 /* written trasnition */ 00286 phy_write_1bit(io_dcr9, PHY_DATA_1); 00287 phy_write_1bit(io_dcr9, PHY_DATA_0); 00288 00289 /* Write a word data to PHY controller */ 00290 for (i=0x8000; i>0; i>>=1) 00291 phy_write_1bit(io_dcr9, phy_data&i ? PHY_DATA_1: PHY_DATA_0); 00292 }
Definition at line 297 of file davicom.c.
References eeprom_delay, MDCLKH, outl, and whereami().
Referenced by phy_read(), and phy_write().
00298 { 00299 whereami("phy_write_1bit\n"); 00300 outl(phy_data, ee_addr); /* MII Clock Low */ 00301 eeprom_delay(); 00302 outl(phy_data|MDCLKH, ee_addr); /* MII Clock High */ 00303 eeprom_delay(); 00304 outl(phy_data, ee_addr); /* MII Clock Low */ 00305 eeprom_delay(); 00306 }
| static int phy_read_1bit | ( | u32 | ee_addr | ) | [static] |
Definition at line 311 of file davicom.c.
References eeprom_delay, inl, outl, and whereami().
Referenced by phy_read().
00312 { 00313 int phy_data; 00314 00315 whereami("phy_read_1bit\n"); 00316 00317 outl(0x50000, ee_addr); 00318 eeprom_delay(); 00319 00320 phy_data=(inl(ee_addr)>>19) & 0x1; 00321 00322 outl(0x40000, ee_addr); 00323 eeprom_delay(); 00324 00325 return phy_data; 00326 }
| static void davicom_media_chk | ( | struct nic * | ) | [static] |
Referenced by davicom_reset().
| static void HPNA_process | ( | void | ) | [static] |
Definition at line 331 of file davicom.c.
References phy_read(), and phy_write().
Referenced by davicom_media_chk().
00332 { 00333 00334 if ( (phy_read(3) & 0xfff0) == 0xb900 ) { 00335 if ( phy_read(31) == 0x4404 ) { 00336 /* DM9801 present */ 00337 if (phy_read(3) == 0xb901) 00338 phy_write(16, 0x5); /* DM9801 E4 */ 00339 else 00340 phy_write(16, 0x1005); /* DM9801 E3 and others */ 00341 phy_write(25, ((phy_read(24) + 3) & 0xff) | 0xf000); 00342 } else { 00343 /* DM9802 present */ 00344 phy_write(16, 0x5); 00345 phy_write(25, (phy_read(25) & 0xff00) + 2); 00346 } 00347 } 00348 }
Definition at line 353 of file davicom.c.
References CSR6, currticks(), dev_id, HPNA_process(), ioaddr, outl, PCI_DEVICE_ID_DM9009, PCI_VENDOR_ID_DAVICOM, phy_read(), phy_write(), TICKS_PER_SEC, and vendor.
00354 { 00355 unsigned long to, csr6; 00356 00357 csr6 = 0x00200000; /* SF */ 00358 outl(csr6, ioaddr + CSR6); 00359 00360 #define PCI_DEVICE_ID_DM9009 0x9009 00361 if (vendor == PCI_VENDOR_ID_DAVICOM && dev_id == PCI_DEVICE_ID_DM9009) { 00362 /* Set to 10BaseT mode for DM9009 */ 00363 phy_write(0, 0); 00364 } else { 00365 /* For DM9102/DM9102A */ 00366 to = currticks() + 2 * TICKS_PER_SEC; 00367 while ( ((phy_read(1) & 0x24)!=0x24) && (currticks() < to)) 00368 /* wait */ ; 00369 00370 if ( (phy_read(1) & 0x24) == 0x24 ) { 00371 if (phy_read(17) & 0xa000) 00372 csr6 |= 0x00000200; /* Full Duplex mode */ 00373 } else 00374 csr6 |= 0x00040000; /* Select DM9801/DM9802 when Ethernet link failed */ 00375 } 00376 00377 /* set the chip's operating mode */ 00378 outl(csr6, ioaddr + CSR6); 00379 00380 /* DM9801/DM9802 present check & program */ 00381 if (csr6 & 0x40000) 00382 HPNA_process(); 00383 }
| static void davicom_irq | ( | struct nic *nic | __unused, | |
| irq_action_t action | __unused | |||
| ) | [static] |
| PCI_DRIVER | ( | davicom_driver | , | |
| davicom_nics | , | |||
| PCI_NO_CLASS | ||||
| ) |
| DRIVER | ( | "DAVICOM" | , | |
| nic_driver | , | |||
| pci_driver | , | |||
| davicom_driver | , | |||
| davicom_probe | , | |||
| davicom_disable | ||||
| ) |
unsigned char ee_data[EEPROM_SIZE] [static] |
Definition at line 70 of file davicom.c.
Referenced by davicom_probe(), parse_eeprom(), sundance_probe(), and tulip_probe().
static struct nic_operations davicom_operations [static, read] |
Initial value:
{
.connect = dummy_connect,
.poll = davicom_poll,
.transmit = davicom_transmit,
.irq = davicom_irq,
}
Definition at line 128 of file davicom.c.
Referenced by davicom_probe().
unsigned short vendor [static] |
Definition at line 131 of file davicom.c.
Referenced by davicom_media_chk(), davicom_probe(), rsn_get_desc(), and sis900_probe().
unsigned short dev_id [static] |
Definition at line 131 of file davicom.c.
Referenced by davicom_media_chk(), davicom_probe(), and sis900_probe().
unsigned long ioaddr [static] |
Definition at line 132 of file davicom.c.
Referenced by davicom_disable(), davicom_media_chk(), davicom_probe(), davicom_reset(), davicom_transmit(), dm9132_id_table(), dmfe_init_dm910x(), epic100_probe(), ifec_mdio_read(), ifec_mdio_write(), ifec_net_close(), ifec_net_irq(), ifec_net_transmit(), ifec_reset(), ifec_scb_cmd(), ifec_tx_wake(), init_media(), mdio_read(), mdio_write(), nway_start(), pcnet32_disable(), pcnet32_probe(), pcnet32_reset(), pcnet32_transmit(), phy_read(), phy_write(), pnic_do_nway(), rhine_disable(), rhine_reset(), rhine_transmit(), rtl8169_close(), rtl8169_init_phy(), rtl8169_irq_disable(), rtl8169_irq_enable(), rtl8169_open(), rtl8169_phy_reset(), rtl8169_poll(), rtl8169_probe(), rtl8169_remove(), rtl8169_set_speed_tbi(), rtl8169_set_speed_xmii(), rtl8169_transmit(), rtl_hw_phy_config(), rtl_hw_start_8101(), rtl_hw_start_8168(), rtl_hw_start_8169(), rtl_set_rx_mode(), rtl_set_rx_tx_config_registers(), rtl_soft_reset(), select_media(), set_rx_mode(), sis190_default_phy(), sis190_down(), sis190_get_mac_addr_from_eeprom(), sis190_hw_start(), sis190_init_board(), sis190_init_phy(), sis190_init_rxfilter(), sis190_irq(), sis190_mii_probe(), sis190_mii_probe_88e1111_fixup(), sis190_phy_task(), sis190_poll(), sis190_probe(), sis190_remove(), sis190_set_rx_mode(), sis190_set_speed_auto(), sis190_transmit(), sis635_get_mac_addr(), sis900_check_mode(), sis900_disable(), sis900_init(), sis900_init_rxd(), sis900_init_rxfilter(), sis900_init_txd(), sis900_irq(), sis900_mdio_read(), sis900_poll(), sis900_probe(), sis900_read_eeprom(), sis900_reset(), sis900_set_rx_mode(), sis900_transmit(), sis96x_get_mac_addr(), start_link(), tulip_disable(), tulip_probe(), tulip_reset(), and tulip_transmit().
| struct { ... } __shared |
struct pci_device_id davicom_nics[] [static] |
1.5.7.1