b44.c File Reference

#include <errno.h>
#include <assert.h>
#include <stdio.h>
#include <unistd.h>
#include <byteswap.h>
#include <gpxe/io.h>
#include <mii.h>
#include <gpxe/iobuf.h>
#include <gpxe/malloc.h>
#include <gpxe/pci.h>
#include <gpxe/netdevice.h>
#include <gpxe/ethernet.h>
#include <gpxe/if_ether.h>
#include <gpxe/memmap.h>
#include "b44.h"

Go to the source code of this file.

Defines

#define VIRT_TO_B44(addr)   ( virt_to_bus(addr) + SB_PCI_DMA )
#define CTRL_MASK   (DMARX_CTRL_ENABLE | (RX_PKT_OFFSET << DMARX_CTRL_ROSHIFT))

Functions

 FILE_LICENCE (GPL2_OR_LATER)
static int ring_next (int index)
static u32 br32 (const struct b44_private *bp, u32 reg)
static void bw32 (const struct b44_private *bp, u32 reg, u32 val)
static void bflush (const struct b44_private *bp, u32 reg, u32 timeout)
int phys_ram_within_limit (u64 limit)
 Return non-zero if the installed RAM is within the limit given and zero if it is outside.
static u32 pending_tx_index (struct b44_private *bp)
 Ring cells waiting to be processed are between 'tx_cur' and 'pending' indexes in the ring.
static u32 pending_rx_index (struct b44_private *bp)
 Ring cells waiting to be processed are between 'rx_cur' and 'pending' indexes in the ring.
static int b44_wait_bit (struct b44_private *bp, unsigned long reg, u32 bit, unsigned long timeout, const int clear)
 Wait until the given bit is set/cleared.
static u32 ssb_get_core_rev (struct b44_private *bp)
static int ssb_is_core_up (struct b44_private *bp)
static u32 ssb_pci_setup (struct b44_private *bp, u32 cores)
static void ssb_core_disable (struct b44_private *bp)
static void ssb_core_reset (struct b44_private *bp)
static void b44_chip_reset (struct b44_private *bp, int reset_kind)
static void b44_halt (struct b44_private *bp)
 called by b44_poll in the error path
static void b44_init_hw (struct b44_private *bp, int reset_kind)
static void b44_populate_rx_descriptor (struct b44_private *bp, u32 idx)
static void b44_rx_refill (struct b44_private *bp, u32 pending)
static void b44_free_rx_ring (struct b44_private *bp)
static int b44_init_rx_ring (struct b44_private *bp)
static void b44_free_tx_ring (struct b44_private *bp)
static int b44_init_tx_ring (struct b44_private *bp)
static int b44_phy_read (struct b44_private *bp, int reg, u32 *val)
static int b44_phy_write (struct b44_private *bp, int reg, u32 val)
static int b44_phy_reset (struct b44_private *bp)
static void b44_cam_write (struct b44_private *bp, unsigned char *data, int index)
static void b44_set_mac_addr (struct b44_private *bp)
static void b44_read_eeprom (struct b44_private *bp, u8 *data)
static void b44_load_mac_and_phy_addr (struct b44_private *bp)
static void b44_set_rx_mode (struct net_device *netdev)
static int b44_probe (struct pci_device *pci, const struct pci_device_id *id)
 Probe device.
static void b44_remove (struct pci_device *pci)
 Remove device.
static void b44_irq (struct net_device *netdev, int enable)
 Enable or disable interrupts.
static int b44_open (struct net_device *netdev)
 Open network device.
static void b44_close (struct net_device *netdev)
 Close network device.
static int b44_transmit (struct net_device *netdev, struct io_buffer *iobuf)
 Transmit packet.
static void b44_tx_complete (struct b44_private *bp)
 Recycles sent TX descriptors and notifies network stack.
static void b44_process_rx_packets (struct b44_private *bp)
static void b44_poll (struct net_device *netdev)
 Poll for completed and received packets.

Variables

static struct net_device_operations b44_operations
static struct pci_device_id b44_nics []
struct pci_driver b44_driver __pci_driver

Define Documentation

#define VIRT_TO_B44 ( addr   )     ( virt_to_bus(addr) + SB_PCI_DMA )

Definition at line 78 of file b44.c.

Referenced by b44_init_hw(), b44_init_rx_ring(), b44_init_tx_ring(), b44_populate_rx_descriptor(), and b44_transmit().

#define CTRL_MASK   (DMARX_CTRL_ENABLE | (RX_PKT_OFFSET << DMARX_CTRL_ROSHIFT))

Referenced by b44_init_hw().

Function Documentation

FILE_LICENCE ( GPL2_OR_LATER   ) 

static int ring_next ( int  index  )  [inline, static]

Definition at line 50 of file b44.c.

References B44_RING_SIZE.

Referenced by b44_process_rx_packets(), b44_rx_refill(), b44_transmit(), and b44_tx_complete().

00051 {
00052         /* B44_RING_SIZE is a power of 2 :) */
00053         return (index + 1) & (B44_RING_SIZE - 1);
00054 }

static u32 br32 ( const struct b44_private *  bp,
u32  reg 
) [inline, static]

Definition at line 59 of file b44.c.

References readl, and b44_private::regs.

Referenced by b44_chip_reset(), b44_init_hw(), b44_phy_read(), b44_poll(), b44_set_mac_addr(), b44_set_rx_mode(), b44_wait_bit(), pending_rx_index(), pending_tx_index(), ssb_core_disable(), ssb_core_reset(), ssb_get_core_rev(), ssb_is_core_up(), and ssb_pci_setup().

00060 {
00061         return readl(bp->regs + reg);
00062 }

static void bw32 ( const struct b44_private *  bp,
u32  reg,
u32  val 
) [inline, static]

Definition at line 65 of file b44.c.

References b44_private::regs, and writel.

Referenced by b44_cam_write(), b44_chip_reset(), b44_halt(), b44_init_hw(), b44_irq(), b44_phy_read(), b44_phy_write(), b44_poll(), b44_populate_rx_descriptor(), b44_set_mac_addr(), b44_set_rx_mode(), b44_transmit(), ssb_core_disable(), ssb_core_reset(), and ssb_pci_setup().

00066 {
00067         writel(val, bp->regs + reg);
00068 }

static void bflush ( const struct b44_private *  bp,
u32  reg,
u32  timeout 
) [inline, static]

Definition at line 71 of file b44.c.

References readl, b44_private::regs, and udelay().

Referenced by b44_chip_reset(), b44_halt(), b44_poll(), ssb_core_disable(), and ssb_core_reset().

00072 {
00073         readl(bp->regs + reg);
00074         udelay(timeout);
00075 }

int phys_ram_within_limit ( u64  limit  ) 

Return non-zero if the installed RAM is within the limit given and zero if it is outside.

Hopefully will be removed soon.

Definition at line 86 of file b44.c.

References memory_map::count, memory_region::end, get_memmap(), NULL, and memory_map::regions.

Referenced by b44_probe().

00087 {
00088         struct memory_map memmap;
00089         struct memory_region *highest = NULL;
00090         get_memmap(&memmap);
00091 
00092         highest = &memmap.regions[memmap.count - 1];
00093 
00094         return (highest->end < limit);
00095 }

static u32 pending_tx_index ( struct b44_private *  bp  )  [static]

Ring cells waiting to be processed are between 'tx_cur' and 'pending' indexes in the ring.

Definition at line 102 of file b44.c.

References B44_DMATX_STAT, B44_RING_SIZE, br32(), DMATX_STAT_CDMASK, and u32.

Referenced by b44_tx_complete().

00103 {
00104         u32 pending = br32(bp, B44_DMATX_STAT);
00105         pending &= DMATX_STAT_CDMASK;
00106 
00107         pending /= sizeof(struct dma_desc);
00108         return pending & (B44_RING_SIZE - 1);
00109 }

static u32 pending_rx_index ( struct b44_private *  bp  )  [static]

Ring cells waiting to be processed are between 'rx_cur' and 'pending' indexes in the ring.

Definition at line 116 of file b44.c.

References B44_DMARX_STAT, B44_RING_SIZE, br32(), DMARX_STAT_CDMASK, and u32.

Referenced by b44_process_rx_packets().

00117 {
00118         u32 pending = br32(bp, B44_DMARX_STAT);
00119         pending &= DMARX_STAT_CDMASK;
00120 
00121         pending /= sizeof(struct dma_desc);
00122         return pending & (B44_RING_SIZE - 1);
00123 }

static int b44_wait_bit ( struct b44_private *  bp,
unsigned long  reg,
u32  bit,
unsigned long  timeout,
const int  clear 
) [static]

Wait until the given bit is set/cleared.

Definition at line 129 of file b44.c.

References br32(), ENODEV, u32, and udelay().

Referenced by b44_cam_write(), b44_chip_reset(), b44_phy_read(), b44_phy_write(), and ssb_core_disable().

00131 {
00132         unsigned long i;
00133 
00134         for (i = 0; i < timeout; i++) {
00135                 u32 val = br32(bp, reg);
00136 
00137                 if (clear && !(val & bit))
00138                         break;
00139 
00140                 if (!clear && (val & bit))
00141                         break;
00142 
00143                 udelay(10);
00144         }
00145         if (i == timeout) {
00146                 return -ENODEV;
00147         }
00148         return 0;
00149 }

static u32 ssb_get_core_rev ( struct b44_private *  bp  )  [inline, static]

Definition at line 164 of file b44.c.

References B44_SBIDHIGH, br32(), and SBIDHIGH_RC_MASK.

Referenced by ssb_pci_setup().

00165 {
00166         return (br32(bp, B44_SBIDHIGH) & SBIDHIGH_RC_MASK);
00167 }

static int ssb_is_core_up ( struct b44_private *  bp  )  [inline, static]

Definition at line 170 of file b44.c.

References B44_SBTMSLOW, br32(), SBTMSLOW_CLOCK, and SSB_CORE_DOWN.

Referenced by b44_chip_reset().

00171 {
00172         return ((br32(bp, B44_SBTMSLOW) & (SSB_CORE_DOWN | SBTMSLOW_CLOCK))
00173                                                         == SBTMSLOW_CLOCK);
00174 }

static u32 ssb_pci_setup ( struct b44_private *  bp,
u32  cores 
) [static]

Definition at line 177 of file b44.c.

References B44_SBINTVEC, BCM4400_PCI_CORE_ADDR, br32(), bw32(), b44_private::pci, pci_read_config_dword(), pci_write_config_dword(), SSB_BAR0_WIN, ssb_get_core_rev(), SSB_PCI_BURST, SSB_PCI_PREF, SSB_PCI_TRANS_2, and u32.

Referenced by b44_chip_reset().

00178 {
00179         u32 bar_orig, pci_rev, val;
00180 
00181         pci_read_config_dword(bp->pci, SSB_BAR0_WIN, &bar_orig);
00182         pci_write_config_dword(bp->pci, SSB_BAR0_WIN,
00183                                BCM4400_PCI_CORE_ADDR);
00184         pci_rev = ssb_get_core_rev(bp);
00185 
00186         val = br32(bp, B44_SBINTVEC);
00187         val |= cores;
00188         bw32(bp, B44_SBINTVEC, val);
00189 
00190         val = br32(bp, SSB_PCI_TRANS_2);
00191         val |= SSB_PCI_PREF | SSB_PCI_BURST;
00192         bw32(bp, SSB_PCI_TRANS_2, val);
00193 
00194         pci_write_config_dword(bp->pci, SSB_BAR0_WIN, bar_orig);
00195 
00196         return pci_rev;
00197 }

static void ssb_core_disable ( struct b44_private *  bp  )  [static]

Definition at line 200 of file b44.c.

References B44_SBTMSHIGH, B44_SBTMSLOW, b44_wait_bit(), bflush(), br32(), bw32(), SBTMSHIGH_BUSY, SBTMSLOW_CLOCK, SBTMSLOW_FGC, SBTMSLOW_REJECT, SBTMSLOW_RESET, and SSB_CORE_DOWN.

Referenced by b44_remove(), and ssb_core_reset().

00201 {
00202         if (br32(bp, B44_SBTMSLOW) & SBTMSLOW_RESET)
00203                 return;
00204 
00205         bw32(bp, B44_SBTMSLOW, (SBTMSLOW_REJECT | SBTMSLOW_CLOCK));
00206         b44_wait_bit(bp, B44_SBTMSLOW, SBTMSLOW_REJECT, 100000, 0);
00207         b44_wait_bit(bp, B44_SBTMSHIGH, SBTMSHIGH_BUSY, 100000, 1);
00208 
00209         bw32(bp, B44_SBTMSLOW, (SBTMSLOW_FGC | SBTMSLOW_CLOCK |
00210                                                 SSB_CORE_DOWN));
00211         bflush(bp, B44_SBTMSLOW, 1);
00212 
00213         bw32(bp, B44_SBTMSLOW, SSB_CORE_DOWN);
00214         bflush(bp, B44_SBTMSLOW, 1);
00215 }

static void ssb_core_reset ( struct b44_private *  bp  )  [static]

Definition at line 218 of file b44.c.

References B44_SBIMSTATE, B44_SBTMSHIGH, B44_SBTMSLOW, bflush(), br32(), bw32(), SBIMSTATE_BAD, SBTMSHIGH_SERR, SBTMSLOW_CLOCK, SBTMSLOW_FGC, SBTMSLOW_RESET, ssb_core_disable(), and u32.

Referenced by b44_chip_reset().

00219 {
00220         u32 val;
00221         const u32 mask = (SBTMSLOW_CLOCK | SBTMSLOW_FGC | SBTMSLOW_RESET);
00222 
00223         ssb_core_disable(bp);
00224 
00225         bw32(bp, B44_SBTMSLOW, mask);
00226         bflush(bp, B44_SBTMSLOW, 1);
00227 
00228         /* Clear SERR if set, this is a hw bug workaround.  */
00229         if (br32(bp, B44_SBTMSHIGH) & SBTMSHIGH_SERR)
00230                 bw32(bp, B44_SBTMSHIGH, 0);
00231 
00232         val = br32(bp, B44_SBIMSTATE);
00233         if (val & (SBIMSTATE_BAD)) {
00234                 bw32(bp, B44_SBIMSTATE, val & ~SBIMSTATE_BAD);
00235         }
00236 
00237         bw32(bp, B44_SBTMSLOW, (SBTMSLOW_CLOCK | SBTMSLOW_FGC));
00238         bflush(bp, B44_SBTMSLOW, 1);
00239 
00240         bw32(bp, B44_SBTMSLOW, (SBTMSLOW_CLOCK));
00241         bflush(bp, B44_SBTMSLOW, 1);
00242 }

static void b44_chip_reset ( struct b44_private *  bp,
int  reset_kind 
) [static]

Definition at line 258 of file b44.c.

References B44_CHIP_RESET_PARTIAL, B44_DEVCTRL, B44_DMARX_CTRL, B44_DMARX_STAT, B44_DMATX_CTRL, B44_ENET_CTRL, B44_MDIO_CTRL, B44_RCV_LAZY, b44_wait_bit(), bflush(), br32(), bw32(), DEVCTRL_EPR, DEVCTRL_IPP, DMARX_STAT_EMASK, DMARX_STAT_SIDLE, ENET_CTRL_DISABLE, ENET_CTRL_EPSEL, MDIO_CTRL_MAXF_MASK, MDIO_CTRL_PREAMBLE, b44_private::rx_cur, SBINTVEC_ENET0, ssb_core_reset(), ssb_is_core_up(), ssb_pci_setup(), b44_private::tx_cur, b44_private::tx_dirty, and u32.

Referenced by b44_close(), b44_halt(), b44_init_hw(), and b44_probe().

00259 {
00260         if (ssb_is_core_up(bp)) {
00261                 bw32(bp, B44_RCV_LAZY, 0);
00262 
00263                 bw32(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE);
00264 
00265                 b44_wait_bit(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE, 200, 1);
00266 
00267                 bw32(bp, B44_DMATX_CTRL, 0);
00268 
00269                 bp->tx_dirty = bp->tx_cur = 0;
00270 
00271                 if (br32(bp, B44_DMARX_STAT) & DMARX_STAT_EMASK)
00272                         b44_wait_bit(bp, B44_DMARX_STAT, DMARX_STAT_SIDLE,
00273                                                                   100, 0);
00274 
00275                 bw32(bp, B44_DMARX_CTRL, 0);
00276 
00277                 bp->rx_cur = 0;
00278         } else {
00279                 ssb_pci_setup(bp, SBINTVEC_ENET0);
00280         }
00281 
00282         ssb_core_reset(bp);
00283 
00284         /* Don't enable PHY if we are only doing a partial reset. */
00285         if (reset_kind == B44_CHIP_RESET_PARTIAL)
00286                 return;
00287 
00288         /* Make PHY accessible. */
00289         bw32(bp, B44_MDIO_CTRL,
00290              (MDIO_CTRL_PREAMBLE | (0x0d & MDIO_CTRL_MAXF_MASK)));
00291         bflush(bp, B44_MDIO_CTRL, 1);
00292 
00293         /* Enable internal or external PHY */
00294         if (!(br32(bp, B44_DEVCTRL) & DEVCTRL_IPP)) {
00295                 bw32(bp, B44_ENET_CTRL, ENET_CTRL_EPSEL);
00296                 bflush(bp, B44_ENET_CTRL, 1);
00297         } else {
00298                 u32 val = br32(bp, B44_DEVCTRL);
00299                 if (val & DEVCTRL_EPR) {
00300                         bw32(bp, B44_DEVCTRL, (val & ~DEVCTRL_EPR));
00301                         bflush(bp, B44_DEVCTRL, 100);
00302                 }
00303         }
00304 }

static void b44_halt ( struct b44_private *  bp  )  [static]

called by b44_poll in the error path

Definition at line 310 of file b44.c.

References b44_chip_reset(), B44_CHIP_RESET_PARTIAL, B44_IMASK, B44_MAC_CTRL, bflush(), bw32(), DBG, and MAC_CTRL_PHY_PDOWN.

Referenced by b44_poll().

00311 {
00312         /* disable ints */
00313         bw32(bp, B44_IMASK, 0);
00314         bflush(bp, B44_IMASK, 1);
00315 
00316         DBG("b44: powering down PHY\n");
00317         bw32(bp, B44_MAC_CTRL, MAC_CTRL_PHY_PDOWN);
00318 
00319         /*
00320          * Now reset the chip, but without enabling
00321          * the MAC&PHY part of it.
00322          * This has to be done _after_ we shut down the PHY
00323          */
00324         b44_chip_reset(bp, B44_CHIP_RESET_PARTIAL);
00325 }

static void b44_init_hw ( struct b44_private *  bp,
int  reset_kind 
) [static]

Definition at line 335 of file b44.c.

References b44_chip_reset(), B44_CHIP_RESET_FULL, B44_DMARX_ADDR, B44_DMARX_CTRL, B44_DMARX_PTR, B44_DMATX_ADDR, B44_DMATX_CTRL, B44_ENET_CTRL, B44_FULL_RESET, B44_MAC_CTRL, B44_MAX_MTU, B44_MIB_CTRL, B44_PARTIAL_RESET, b44_phy_reset(), B44_RCV_LAZY, B44_RX_RING_LEN_BYTES, B44_RXMAXLEN, b44_set_rx_mode(), B44_TX_HIWMARK, B44_TXMAXLEN, br32(), bw32(), CTRL_MASK, DMATX_CTRL_ENABLE, ENET_CTRL_ENABLE, ETH_HLEN, MAC_CTRL_CRC32_ENAB, MAC_CTRL_PHY_LEDCTRL, MIB_CTRL_CLR_ON_READ, b44_private::netdev, RCV_LAZY_FC_SHIFT, b44_private::rx, RX_HEADER_LEN, b44_private::tx, TX_HIWMARK_DEFLT, u32, and VIRT_TO_B44.

Referenced by b44_open(), and b44_poll().

00336 {
00337         u32 val;
00338 #define CTRL_MASK (DMARX_CTRL_ENABLE | (RX_PKT_OFFSET << DMARX_CTRL_ROSHIFT))
00339 
00340         b44_chip_reset(bp, B44_CHIP_RESET_FULL);
00341         if (reset_kind == B44_FULL_RESET) {
00342                 b44_phy_reset(bp);
00343         }
00344 
00345         /* Enable CRC32, set proper LED modes and power on PHY */
00346         bw32(bp, B44_MAC_CTRL, MAC_CTRL_CRC32_ENAB | MAC_CTRL_PHY_LEDCTRL);
00347         bw32(bp, B44_RCV_LAZY, (1 << RCV_LAZY_FC_SHIFT));
00348 
00349         /* This sets the MAC address too.  */
00350         b44_set_rx_mode(bp->netdev);
00351 
00352         /* MTU + eth header + possible VLAN tag + struct rx_header */
00353         bw32(bp, B44_RXMAXLEN, B44_MAX_MTU + ETH_HLEN + 8 + RX_HEADER_LEN);
00354         bw32(bp, B44_TXMAXLEN, B44_MAX_MTU + ETH_HLEN + 8 + RX_HEADER_LEN);
00355 
00356         bw32(bp, B44_TX_HIWMARK, TX_HIWMARK_DEFLT);
00357         if (reset_kind == B44_PARTIAL_RESET) {
00358                 bw32(bp, B44_DMARX_CTRL, CTRL_MASK);
00359         } else {
00360                 bw32(bp, B44_DMATX_CTRL, DMATX_CTRL_ENABLE);
00361                 bw32(bp, B44_DMATX_ADDR, VIRT_TO_B44(bp->tx));
00362 
00363                 bw32(bp, B44_DMARX_CTRL, CTRL_MASK);
00364                 bw32(bp, B44_DMARX_ADDR, VIRT_TO_B44(bp->rx));
00365                 bw32(bp, B44_DMARX_PTR, B44_RX_RING_LEN_BYTES);
00366 
00367                 bw32(bp, B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
00368         }
00369 
00370         val = br32(bp, B44_ENET_CTRL);
00371         bw32(bp, B44_ENET_CTRL, (val | ENET_CTRL_ENABLE));
00372 #undef CTRL_MASK
00373 }

static void b44_populate_rx_descriptor ( struct b44_private *  bp,
u32  idx 
) [static]

Definition at line 379 of file b44.c.

References dma_desc::addr, B44_DMARX_PTR, B44_RING_LAST, bw32(), cpu_to_le32, dma_desc::ctrl, io_buffer::data, DESC_CTRL_EOT, DESC_CTRL_LEN, rx_header::flags, rx_header::len, b44_private::rx, b44_private::rx_iobuf, RX_PKT_BUF_SZ, RX_PKT_OFFSET, u32, and VIRT_TO_B44.

Referenced by b44_init_rx_ring(), and b44_rx_refill().

00380 {
00381         struct rx_header *rh;
00382         u32 ctrl, addr;
00383 
00384         rh = bp->rx_iobuf[idx]->data;
00385         rh->len = 0;
00386         rh->flags = 0;
00387         ctrl = DESC_CTRL_LEN & (RX_PKT_BUF_SZ - RX_PKT_OFFSET);
00388         if (idx == B44_RING_LAST) {
00389                 ctrl |= DESC_CTRL_EOT;
00390         }
00391         addr = VIRT_TO_B44(bp->rx_iobuf[idx]->data);
00392 
00393         bp->rx[idx].ctrl = cpu_to_le32(ctrl);
00394         bp->rx[idx].addr = cpu_to_le32(addr);
00395         bw32(bp, B44_DMARX_PTR, idx * sizeof(struct dma_desc));
00396 }

static void b44_rx_refill ( struct b44_private *  bp,
u32  pending 
) [static]

Definition at line 404 of file b44.c.

References alloc_iob(), b44_populate_rx_descriptor(), DBG, NULL, ring_next(), b44_private::rx_cur, b44_private::rx_iobuf, RX_PKT_BUF_SZ, and u32.

Referenced by b44_init_rx_ring(), and b44_process_rx_packets().

00405 {
00406         u32 i;
00407 
00408         // skip pending
00409         for (i = pending + 1; i != bp->rx_cur; i = ring_next(i)) {
00410                 if (bp->rx_iobuf[i] != NULL)
00411                         continue;
00412 
00413                 bp->rx_iobuf[i] = alloc_iob(RX_PKT_BUF_SZ);
00414                 if (!bp->rx_iobuf[i]) {
00415                         DBG("Refill rx ring failed!!\n");
00416                         break;
00417                 }
00418 
00419                 b44_populate_rx_descriptor(bp, i);
00420         }
00421 }

static void b44_free_rx_ring ( struct b44_private *  bp  )  [static]

Definition at line 424 of file b44.c.

References B44_RING_SIZE, B44_RX_RING_LEN_BYTES, free_dma(), free_iob(), NULL, b44_private::rx, b44_private::rx_iobuf, and u32.

Referenced by b44_close(), and b44_init_rx_ring().

00425 {
00426         u32 i;
00427 
00428         if (bp->rx) {
00429                 for (i = 0; i < B44_RING_SIZE; i++) {
00430                         free_iob(bp->rx_iobuf[i]);
00431                         bp->rx_iobuf[i] = NULL;
00432                 }
00433                 free_dma(bp->rx, B44_RX_RING_LEN_BYTES);
00434                 bp->rx = NULL;
00435         }
00436 }

static int b44_init_rx_ring ( struct b44_private *  bp  )  [static]

Definition at line 439 of file b44.c.

References alloc_iob(), B44_DMA_ALIGNMENT, b44_free_rx_ring(), b44_populate_rx_descriptor(), b44_rx_refill(), B44_RX_RING_LEN_BYTES, DBG, ENOMEM, malloc_dma(), memset(), b44_private::rx, b44_private::rx_iobuf, RX_PKT_BUF_SZ, and VIRT_TO_B44.

Referenced by b44_open(), and b44_poll().

00440 {
00441         b44_free_rx_ring(bp);
00442 
00443         bp->rx = malloc_dma(B44_RX_RING_LEN_BYTES, B44_DMA_ALIGNMENT);
00444         if (!bp->rx)
00445                 return -ENOMEM;
00446 
00447         memset(bp->rx_iobuf, 0, sizeof(bp->rx_iobuf));
00448 
00449         bp->rx_iobuf[0] = alloc_iob(RX_PKT_BUF_SZ);
00450         b44_populate_rx_descriptor(bp, 0);
00451         b44_rx_refill(bp, 0);
00452 
00453         DBG("Init RX rings: rx=0x%08lx\n", VIRT_TO_B44(bp->rx));
00454         return 0;
00455 }

static void b44_free_tx_ring ( struct b44_private *  bp  )  [static]

Definition at line 458 of file b44.c.

References B44_TX_RING_LEN_BYTES, free_dma(), NULL, and b44_private::tx.

Referenced by b44_close(), and b44_init_tx_ring().

00459 {
00460         if (bp->tx) {
00461                 free_dma(bp->tx, B44_TX_RING_LEN_BYTES);
00462                 bp->tx = NULL;
00463         }
00464 }

static int b44_init_tx_ring ( struct b44_private *  bp  )  [static]

Definition at line 467 of file b44.c.

References B44_DMA_ALIGNMENT, b44_free_tx_ring(), B44_TX_RING_LEN_BYTES, DBG, ENOMEM, malloc_dma(), memset(), b44_private::tx, b44_private::tx_iobuf, and VIRT_TO_B44.

Referenced by b44_open(), and b44_poll().

00468 {
00469         b44_free_tx_ring(bp);
00470 
00471         bp->tx = malloc_dma(B44_TX_RING_LEN_BYTES, B44_DMA_ALIGNMENT);
00472         if (!bp->tx)
00473                 return -ENOMEM;
00474 
00475         memset(bp->tx, 0, B44_TX_RING_LEN_BYTES);
00476         memset(bp->tx_iobuf, 0, sizeof(bp->tx_iobuf));
00477 
00478         DBG("Init TX rings: tx=0x%08lx\n", VIRT_TO_B44(bp->tx));
00479         return 0;
00480 }

static int b44_phy_read ( struct b44_private *  bp,
int  reg,
u32 *  val 
) [static]

Definition at line 486 of file b44.c.

References B44_EMAC_ISTAT, B44_MDIO_DATA, b44_wait_bit(), br32(), bw32(), EMAC_INT_MII, MDIO_DATA_DATA, MDIO_DATA_OP_SHIFT, MDIO_DATA_PMD_SHIFT, MDIO_DATA_RA_SHIFT, MDIO_DATA_SB_START, MDIO_DATA_TA_SHIFT, MDIO_OP_READ, MDIO_TA_VALID, b44_private::phy_addr, and u32.

Referenced by b44_phy_reset().

00487 {
00488         int err;
00489 
00490         u32 arg1 = (MDIO_OP_READ << MDIO_DATA_OP_SHIFT);
00491         u32 arg2 = (bp->phy_addr << MDIO_DATA_PMD_SHIFT);
00492         u32 arg3 = (reg << MDIO_DATA_RA_SHIFT);
00493         u32 arg4 = (MDIO_TA_VALID << MDIO_DATA_TA_SHIFT);
00494         u32 argv = arg1 | arg2 | arg3 | arg4;
00495 
00496         bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII);
00497         bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START | argv));
00498         err = b44_wait_bit(bp, B44_EMAC_ISTAT, EMAC_INT_MII, 100, 0);
00499         *val = br32(bp, B44_MDIO_DATA) & MDIO_DATA_DATA;
00500 
00501         return err;
00502 }

static int b44_phy_write ( struct b44_private *  bp,
int  reg,
u32  val 
) [static]

Definition at line 505 of file b44.c.

References B44_EMAC_ISTAT, B44_MDIO_DATA, b44_wait_bit(), bw32(), EMAC_INT_MII, MDIO_DATA_DATA, MDIO_DATA_OP_SHIFT, MDIO_DATA_PMD_SHIFT, MDIO_DATA_RA_SHIFT, MDIO_DATA_SB_START, MDIO_DATA_TA_SHIFT, MDIO_OP_WRITE, MDIO_TA_VALID, b44_private::phy_addr, and u32.

Referenced by b44_phy_reset().

00506 {
00507         u32 arg1 = (MDIO_OP_WRITE << MDIO_DATA_OP_SHIFT);
00508         u32 arg2 = (bp->phy_addr << MDIO_DATA_PMD_SHIFT);
00509         u32 arg3 = (reg << MDIO_DATA_RA_SHIFT);
00510         u32 arg4 = (MDIO_TA_VALID << MDIO_DATA_TA_SHIFT);
00511         u32 arg5 = (val & MDIO_DATA_DATA);
00512         u32 argv = arg1 | arg2 | arg3 | arg4 | arg5;
00513 
00514 
00515         bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII);
00516         bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START | argv));
00517         return b44_wait_bit(bp, B44_EMAC_ISTAT, EMAC_INT_MII, 100, 0);
00518 }

static int b44_phy_reset ( struct b44_private *  bp  )  [static]

Definition at line 521 of file b44.c.

References b44_phy_read(), b44_phy_write(), BMCR_RESET, ENODEV, MII_BMCR, u32, and udelay().

Referenced by b44_init_hw().

00522 {
00523         u32 val;
00524         int err;
00525 
00526         err = b44_phy_write(bp, MII_BMCR, BMCR_RESET);
00527         if (err)
00528                 return err;
00529 
00530         udelay(100);
00531         err = b44_phy_read(bp, MII_BMCR, &val);
00532         if (!err) {
00533                 if (val & BMCR_RESET) {
00534                         return -ENODEV;
00535                 }
00536         }
00537 
00538         return 0;
00539 }

static void b44_cam_write ( struct b44_private *  bp,
unsigned char *  data,
int  index 
) [static]

Definition at line 546 of file b44.c.

References B44_CAM_CTRL, B44_CAM_DATA_HI, B44_CAM_DATA_LO, b44_wait_bit(), bw32(), CAM_CTRL_BUSY, CAM_CTRL_INDEX_SHIFT, CAM_CTRL_WRITE, CAM_DATA_HI_VALID, and u32.

Referenced by b44_set_mac_addr(), and b44_set_rx_mode().

00548 {
00549         u32 val;
00550 
00551         val  = ((u32) data[2]) << 24;
00552         val |= ((u32) data[3]) << 16;
00553         val |= ((u32) data[4]) << 8;
00554         val |= ((u32) data[5]) << 0;
00555         bw32(bp, B44_CAM_DATA_LO, val);
00556 
00557 
00558         val = (CAM_DATA_HI_VALID |
00559                (((u32) data[0]) << 8) | (((u32) data[1]) << 0));
00560 
00561         bw32(bp, B44_CAM_DATA_HI, val);
00562 
00563         val = CAM_CTRL_WRITE | (index << CAM_CTRL_INDEX_SHIFT);
00564         bw32(bp, B44_CAM_CTRL, val);
00565 
00566         b44_wait_bit(bp, B44_CAM_CTRL, CAM_CTRL_BUSY, 100, 1);
00567 }

static void b44_set_mac_addr ( struct b44_private *  bp  )  [static]

Definition at line 570 of file b44.c.

References B44_CAM_CTRL, b44_cam_write(), br32(), bw32(), CAM_CTRL_ENABLE, net_device::ll_addr, b44_private::netdev, and u32.

Referenced by b44_set_rx_mode().

00571 {
00572         u32 val;
00573         bw32(bp, B44_CAM_CTRL, 0);
00574         b44_cam_write(bp, bp->netdev->ll_addr, 0);
00575         val = br32(bp, B44_CAM_CTRL);
00576         bw32(bp, B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
00577 }

static void b44_read_eeprom ( struct b44_private *  bp,
u8 *  data 
) [static]

Definition at line 581 of file b44.c.

References cpu_to_le16, readw, b44_private::regs, and u16.

Referenced by b44_load_mac_and_phy_addr().

00582 {
00583         long i;
00584         u16 *ptr = (u16 *) data;
00585 
00586         for (i = 0; i < 128; i += 2)
00587                 ptr[i / 2] = cpu_to_le16(readw(bp->regs + 4096 + i));
00588 }

static void b44_load_mac_and_phy_addr ( struct b44_private *  bp  )  [static]

Definition at line 591 of file b44.c.

References b44_read_eeprom(), net_device::hw_addr, b44_private::netdev, b44_private::phy_addr, and u8.

Referenced by b44_probe().

00592 {
00593         u8 eeprom[128];
00594 
00595         /* Load MAC address, note byteswapping */
00596         b44_read_eeprom(bp, &eeprom[0]);
00597         bp->netdev->hw_addr[0] = eeprom[79];
00598         bp->netdev->hw_addr[1] = eeprom[78];
00599         bp->netdev->hw_addr[2] = eeprom[81];
00600         bp->netdev->hw_addr[3] = eeprom[80];
00601         bp->netdev->hw_addr[4] = eeprom[83];
00602         bp->netdev->hw_addr[5] = eeprom[82];
00603 
00604         /* Load PHY address */
00605         bp->phy_addr = eeprom[90] & 0x1f;
00606 }

static void b44_set_rx_mode ( struct net_device *  netdev  )  [static]

Definition at line 609 of file b44.c.

References B44_CAM_CTRL, b44_cam_write(), B44_RXCONFIG, b44_set_mac_addr(), br32(), bw32(), CAM_CTRL_ENABLE, netdev_priv(), RXCONFIG_ALLMULTI, RXCONFIG_PROMISC, and u32.

Referenced by b44_init_hw().

00610 {
00611         struct b44_private *bp = netdev_priv(netdev);
00612         unsigned char zero[6] = { 0, 0, 0, 0, 0, 0 };
00613         u32 val;
00614         int i;
00615 
00616         val = br32(bp, B44_RXCONFIG);
00617         val &= ~RXCONFIG_PROMISC;
00618         val |= RXCONFIG_ALLMULTI;
00619 
00620         b44_set_mac_addr(bp);
00621 
00622         for (i = 1; i < 64; i++)
00623                 b44_cam_write(bp, zero, i);
00624 
00625         bw32(bp, B44_RXCONFIG, val);
00626         val = br32(bp, B44_CAM_CTRL);
00627         bw32(bp, B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
00628 }

static int b44_probe ( struct pci_device *  pci,
const struct pci_device_id *  id 
) [static]

Probe device.

Parameters:
pci PCI device
id Matching entry in ID table
Return values:
rc Return status code

Definition at line 640 of file b44.c.

References adjust_pci_device(), alloc_etherdev(), B44_30BIT_DMA_MASK, b44_chip_reset(), B44_CHIP_RESET_FULL, b44_load_mac_and_phy_addr(), b44_operations, B44_REGS_SIZE, DBG, pci_device::dev, net_device::dev, pci_device_id::device, ENOMEM, eth_ntoa(), ioremap(), iounmap(), net_device::ll_addr, pci_device::membase, memset(), pci_device_id::name, b44_private::netdev, netdev, netdev_init(), netdev_link_up(), netdev_priv(), netdev_put(), b44_private::pci, pci_set_drvdata(), phys_ram_within_limit(), register_netdev(), b44_private::regs, and pci_device_id::vendor.

00641 {
00642         struct net_device *netdev;
00643         struct b44_private *bp;
00644         int rc;
00645 
00646         /*
00647          * Bail out if more than 1GB of physical RAM is installed.
00648          * This limitation will be removed later when dma mapping
00649          * is merged into mainline.
00650          */
00651         if (!phys_ram_within_limit(B44_30BIT_DMA_MASK)) {
00652                 DBG("Sorry, this version of the driver does not\n"
00653                     "support systems with more than 1GB of RAM.\n");
00654                 return -ENOMEM;
00655         }
00656 
00657         /* Set up netdev */
00658         netdev = alloc_etherdev(sizeof(*bp));
00659         if (!netdev)
00660                 return -ENOMEM;
00661 
00662         netdev_init(netdev, &b44_operations);
00663         pci_set_drvdata(pci, netdev);
00664         netdev->dev = &pci->dev;
00665 
00666         /* Set up private data */
00667         bp = netdev_priv(netdev);
00668         memset(bp, 0, sizeof(*bp));
00669         bp->netdev = netdev;
00670         bp->pci = pci;
00671 
00672         /* Map device registers */
00673         bp->regs = ioremap(pci->membase, B44_REGS_SIZE);
00674         if (!bp->regs) {
00675                 netdev_put(netdev);
00676                 return -ENOMEM;
00677         }
00678 
00679         /* Enable PCI bus mastering */
00680         adjust_pci_device(pci);
00681 
00682         b44_load_mac_and_phy_addr(bp);
00683 
00684         /* Link management currently not implemented */
00685         netdev_link_up(netdev);
00686 
00687         rc = register_netdev(netdev);
00688         if (rc != 0) {
00689                 iounmap(bp->regs);
00690                 netdev_put(netdev);
00691                 return rc;
00692         }
00693 
00694         b44_chip_reset(bp, B44_CHIP_RESET_FULL);
00695 
00696         DBG("b44 %s (%04x:%04x) regs=%p MAC=%s\n", id->name, id->vendor,
00697             id->device, bp->regs, eth_ntoa(netdev->ll_addr));
00698 
00699         return 0;
00700 }

static void b44_remove ( struct pci_device *  pci  )  [static]

Remove device.

Parameters:
pci PCI device

Definition at line 708 of file b44.c.

References iounmap(), netdev, netdev_nullify(), netdev_priv(), netdev_put(), pci_get_drvdata(), b44_private::regs, ssb_core_disable(), and unregister_netdev().

00709 {
00710         struct net_device *netdev = pci_get_drvdata(pci);
00711         struct b44_private *bp = netdev_priv(netdev);
00712 
00713         ssb_core_disable(bp);
00714         unregister_netdev(netdev);
00715         iounmap(bp->regs);
00716         netdev_nullify(netdev);
00717         netdev_put(netdev);
00718 }

static void b44_irq ( struct net_device *  netdev,
int  enable 
) [static]

Enable or disable interrupts.

Parameters:
netdev Network device
enable Interrupts should be enabled

Definition at line 726 of file b44.c.

References B44_IMASK, bw32(), IMASK_DEF, IMASK_DISABLE, and netdev_priv().

Referenced by b44_open(), and b44_poll().

00727 {
00728         struct b44_private *bp = netdev_priv(netdev);
00729 
00730         /* Interrupt mask specifies which events generate interrupts */
00731         bw32(bp, B44_IMASK, enable ? IMASK_DEF : IMASK_DISABLE);
00732 }

static int b44_open ( struct net_device *  netdev  )  [static]

Open network device.

Parameters:
netdev Network device
Return values:
rc Return status code

Definition at line 740 of file b44.c.

References B44_FULL_RESET, b44_init_hw(), b44_init_rx_ring(), b44_init_tx_ring(), b44_irq(), and netdev_priv().

00741 {
00742         struct b44_private *bp = netdev_priv(netdev);
00743         int rc;
00744 
00745         rc = b44_init_tx_ring(bp);
00746         if (rc != 0)
00747                 return rc;
00748 
00749         rc = b44_init_rx_ring(bp);
00750         if (rc != 0)
00751                 return rc;
00752 
00753         b44_init_hw(bp, B44_FULL_RESET);
00754 
00755         /* Disable interrupts */
00756         b44_irq(netdev, 0);
00757 
00758         return 0;
00759 }

static void b44_close ( struct net_device *  netdev  )  [static]

Close network device.

Parameters:
netdev Network device

Definition at line 766 of file b44.c.

References b44_chip_reset(), b44_free_rx_ring(), b44_free_tx_ring(), B44_FULL_RESET, and netdev_priv().

00767 {
00768         struct b44_private *bp = netdev_priv(netdev);
00769 
00770         b44_chip_reset(bp, B44_FULL_RESET);
00771         b44_free_tx_ring(bp);
00772         b44_free_rx_ring(bp);
00773 }

static int b44_transmit ( struct net_device *  netdev,
struct io_buffer *  iobuf 
) [static]

Transmit packet.

Parameters:
netdev Network device
iobuf I/O buffer
Return values:
rc Return status code

Definition at line 782 of file b44.c.

References dma_desc::addr, B44_DMATX_PTR, B44_RING_LAST, bw32(), cpu_to_le32, dma_desc::ctrl, io_buffer::data, DBG, DESC_CTRL_EOF, DESC_CTRL_EOT, DESC_CTRL_IOC, DESC_CTRL_LEN, DESC_CTRL_SOF, ENOBUFS, iob_len(), netdev_priv(), ring_next(), b44_private::tx, b44_private::tx_cur, b44_private::tx_iobuf, u32, VIRT_TO_B44, and wmb.

00783 {
00784         struct b44_private *bp = netdev_priv(netdev);
00785         u32 cur = bp->tx_cur;
00786         u32 ctrl;
00787 
00788         /* Check for TX ring overflow */
00789         if (bp->tx[cur].ctrl) {
00790                 DBG("tx overflow\n");
00791                 return -ENOBUFS;
00792         }
00793 
00794         /* Will call netdev_tx_complete() on the iobuf later */
00795         bp->tx_iobuf[cur] = iobuf;
00796 
00797         /* Set up TX descriptor */
00798         ctrl = (iob_len(iobuf) & DESC_CTRL_LEN) |
00799             DESC_CTRL_IOC | DESC_CTRL_SOF | DESC_CTRL_EOF;
00800 
00801         if (cur == B44_RING_LAST)
00802                 ctrl |= DESC_CTRL_EOT;
00803 
00804         bp->tx[cur].ctrl = cpu_to_le32(ctrl);
00805         bp->tx[cur].addr = cpu_to_le32(VIRT_TO_B44(iobuf->data));
00806 
00807         /* Update next available descriptor index */
00808         cur = ring_next(cur);
00809         bp->tx_cur = cur;
00810         wmb();
00811 
00812         /* Tell card that a new TX descriptor is ready */
00813         bw32(bp, B44_DMATX_PTR, cur * sizeof(struct dma_desc));
00814         return 0;
00815 }

static void b44_tx_complete ( struct b44_private *  bp  )  [static]

Recycles sent TX descriptors and notifies network stack.

Parameters:
bp Driver state

Definition at line 822 of file b44.c.

References dma_desc::addr, dma_desc::ctrl, b44_private::netdev, netdev_tx_complete(), NULL, pending_tx_index(), ring_next(), b44_private::tx, b44_private::tx_dirty, b44_private::tx_iobuf, and u32.

Referenced by b44_poll().

00823 {
00824         u32 cur, i;
00825 
00826         cur = pending_tx_index(bp);
00827 
00828         for (i = bp->tx_dirty; i != cur; i = ring_next(i)) {
00829                 /* Free finished frame */
00830                 netdev_tx_complete(bp->netdev, bp->tx_iobuf[i]);
00831                 bp->tx_iobuf[i] = NULL;
00832 
00833                 /* Clear TX descriptor */
00834                 bp->tx[i].ctrl = 0;
00835                 bp->tx[i].addr = 0;
00836         }
00837         bp->tx_dirty = cur;
00838 }

static void b44_process_rx_packets ( struct b44_private *  bp  )  [static]

Definition at line 841 of file b44.c.

References b44_rx_refill(), cpu_to_le16, io_buffer::data, DBG, EINVAL, rx_header::flags, iob_put, iob_reserve, le16_to_cpu, rx_header::len, b44_private::netdev, netdev_rx(), netdev_rx_err(), NULL, pending_rx_index(), ring_next(), b44_private::rx_cur, RX_FLAG_ERRORS, b44_private::rx_iobuf, RX_PKT_BUF_SZ, RX_PKT_OFFSET, u16, and u32.

Referenced by b44_poll().

00842 {
00843         struct io_buffer *iob;  /* received data */
00844         struct rx_header *rh;
00845         u32 pending, i;
00846         u16 len;
00847 
00848         pending = pending_rx_index(bp);
00849 
00850         for (i = bp->rx_cur; i != pending; i = ring_next(i)) {
00851                 iob = bp->rx_iobuf[i];
00852                 if (iob == NULL)
00853                         break;
00854 
00855                 rh = iob->data;
00856                 len = le16_to_cpu(rh->len);
00857 
00858                 /*
00859                  * Guard against incompletely written RX descriptors.
00860                  * Without this, things can get really slow!
00861                  */
00862                 if (len == 0)
00863                         break;
00864 
00865                 /* Discard CRC that is generated by the card */
00866                 len -= 4;
00867 
00868                 /* Check for invalid packets and errors */
00869                 if (len > RX_PKT_BUF_SZ - RX_PKT_OFFSET ||
00870                     (rh->flags & cpu_to_le16(RX_FLAG_ERRORS))) {
00871                         DBG("rx error len=%d flags=%04x\n", len,
00872                                          cpu_to_le16(rh->flags));
00873                         rh->len = 0;
00874                         rh->flags = 0;
00875                         netdev_rx_err(bp->netdev, iob, -EINVAL);
00876                         continue;
00877                 }
00878 
00879                 /* Clear RX descriptor */
00880                 rh->len = 0;
00881                 rh->flags = 0;
00882                 bp->rx_iobuf[i] = NULL;
00883 
00884                 /* Hand off the IO buffer to the network stack */
00885                 iob_reserve(iob, RX_PKT_OFFSET);
00886                 iob_put(iob, len);
00887                 netdev_rx(bp->netdev, iob);
00888         }
00889         bp->rx_cur = i;
00890         b44_rx_refill(bp, pending_rx_index(bp));
00891 }

static void b44_poll ( struct net_device *  netdev  )  [static]

Poll for completed and received packets.

Parameters:
netdev Network device

Definition at line 898 of file b44.c.

References B44_FULL_RESET_SKIP_PHY, b44_halt(), b44_init_hw(), b44_init_rx_ring(), b44_init_tx_ring(), b44_irq(), B44_ISTAT, b44_process_rx_packets(), b44_tx_complete(), bflush(), br32(), bw32(), DBG, IMASK_DEF, ISTAT_ERRORS, ISTAT_RX, ISTAT_TX, b44_private::netdev, netdev_priv(), and u32.

00899 {
00900         struct b44_private *bp = netdev_priv(netdev);
00901         u32 istat;
00902 
00903         /* Interrupt status */
00904         istat = br32(bp, B44_ISTAT);
00905         istat &= IMASK_DEF;     /* only the events we care about */
00906 
00907         if (!istat)
00908                 return;
00909         if (istat & ISTAT_TX)
00910                 b44_tx_complete(bp);
00911         if (istat & ISTAT_RX)
00912                 b44_process_rx_packets(bp);
00913         if (istat & ISTAT_ERRORS) {
00914                 DBG("b44 error istat=0x%08x\n", istat);
00915 
00916                 /* Reset B44 core partially to avoid long waits */
00917                 b44_irq(bp->netdev, 0);
00918                 b44_halt(bp);
00919                 b44_init_tx_ring(bp);
00920                 b44_init_rx_ring(bp);
00921                 b44_init_hw(bp, B44_FULL_RESET_SKIP_PHY);
00922         }
00923 
00924         /* Acknowledge interrupt */
00925         bw32(bp, B44_ISTAT, 0);
00926         bflush(bp, B44_ISTAT, 1);
00927 }

Variable Documentation

struct net_device_operations b44_operations [static]

Initial value:

 {
        .open = b44_open,
        .close = b44_close,
        .transmit = b44_transmit,
        .poll = b44_poll,
        .irq = b44_irq,
}

Definition at line 930 of file b44.c.

Referenced by b44_probe().

struct pci_device_id b44_nics[] [static]

Initial value:

 {
        PCI_ROM(0x14e4, 0x4401, "BCM4401", "BCM4401", 0),
        PCI_ROM(0x14e4, 0x170c, "BCM4401-B0", "BCM4401-B0", 0),
        PCI_ROM(0x14e4, 0x4402, "BCM4401-B1", "BCM4401-B1", 0),
}

Definition at line 939 of file b44.c.

struct pci_driver b44_driver __pci_driver

Initial value:

 {
        .ids = b44_nics,
        .id_count = sizeof b44_nics / sizeof b44_nics[0],
        .probe = b44_probe,
        .remove = b44_remove,
}

Definition at line 946 of file b44.c.

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