UefiPxe.h

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00001 /** @file
00002   This header file contains all of the PXE type definitions,
00003   structure prototypes, global variables and constants that
00004   are needed for porting PXE to EFI.
00005 
00006   Copyright (c) 2006 - 2008, Intel Corporation
00007   All rights reserved. This program and the accompanying materials
00008   are licensed and made available under the terms and conditions of the BSD License
00009   which accompanies this distribution.  The full text of the license may be found at
00010   http://opensource.org/licenses/bsd-license.php
00011 
00012   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
00013   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
00014 
00015   @par Revision Reference:
00016   32/64-bit PXE specification:
00017   alpha-4, 99-Dec-17
00018 
00019 **/
00020 
00021 #ifndef __EFI_PXE_H__
00022 #define __EFI_PXE_H__
00023 
00024 #pragma pack(1)
00025 
00026 #define PXE_BUSTYPE(a, b, c, d) \
00027     ( \
00028       (((PXE_UINT32) (d) & 0xFF) << 24) | (((PXE_UINT32) (c) & 0xFF) << 16) | (((PXE_UINT32) (b) & 0xFF) << 8) | \
00029         ((PXE_UINT32) (a) & 0xFF) \
00030     )
00031 
00032 ///
00033 /// UNDI ROM ID and devive ID signature
00034 ///
00035 #define PXE_BUSTYPE_PXE PXE_BUSTYPE ('!', 'P', 'X', 'E')
00036 
00037 ///
00038 /// BUS ROM ID signatures
00039 ///
00040 #define PXE_BUSTYPE_PCI     PXE_BUSTYPE ('P', 'C', 'I', 'R')
00041 #define PXE_BUSTYPE_PC_CARD PXE_BUSTYPE ('P', 'C', 'C', 'R')
00042 #define PXE_BUSTYPE_USB     PXE_BUSTYPE ('U', 'S', 'B', 'R')
00043 #define PXE_BUSTYPE_1394    PXE_BUSTYPE ('1', '3', '9', '4')
00044 
00045 #define PXE_SWAP_UINT16(n)  ((((PXE_UINT16) (n) & 0x00FF) << 8) | (((PXE_UINT16) (n) & 0xFF00) >> 8))
00046 
00047 #define PXE_SWAP_UINT32(n) \
00048   ((((PXE_UINT32)(n) & 0x000000FF) << 24) | \
00049    (((PXE_UINT32)(n) & 0x0000FF00) << 8)  | \
00050    (((PXE_UINT32)(n) & 0x00FF0000) >> 8)  | \
00051    (((PXE_UINT32)(n) & 0xFF000000) >> 24))
00052 
00053 #define PXE_SWAP_UINT64(n) \
00054   ((((PXE_UINT64)(n) & 0x00000000000000FFULL) << 56) | \
00055    (((PXE_UINT64)(n) & 0x000000000000FF00ULL) << 40) | \
00056    (((PXE_UINT64)(n) & 0x0000000000FF0000ULL) << 24) | \
00057    (((PXE_UINT64)(n) & 0x00000000FF000000ULL) << 8)  | \
00058    (((PXE_UINT64)(n) & 0x000000FF00000000ULL) >> 8)  | \
00059    (((PXE_UINT64)(n) & 0x0000FF0000000000ULL) >> 24) | \
00060    (((PXE_UINT64)(n) & 0x00FF000000000000ULL) >> 40) | \
00061    (((PXE_UINT64)(n) & 0xFF00000000000000ULL) >> 56))
00062 
00063 
00064 #define PXE_CPBSIZE_NOT_USED  0               ///< zero
00065 #define PXE_DBSIZE_NOT_USED   0               ///< zero
00066 #define PXE_CPBADDR_NOT_USED  (PXE_UINT64) 0  ///< zero
00067 #define PXE_DBADDR_NOT_USED   (PXE_UINT64) 0  ///< zero
00068 #define PXE_CONST             CONST
00069 
00070 #define PXE_VOLATILE          volatile
00071 
00072 typedef VOID           PXE_VOID;
00073 typedef UINT8          PXE_UINT8;
00074 typedef UINT16         PXE_UINT16;
00075 typedef UINT32         PXE_UINT32;
00076 typedef UINTN          PXE_UINTN;
00077 
00078 ///
00079 /// typedef unsigned long PXE_UINT64;
00080 ///
00081 typedef UINT64      PXE_UINT64;
00082 
00083 typedef PXE_UINT8 PXE_BOOL;
00084 #define PXE_FALSE 0            ///< zero
00085 #define PXE_TRUE  (!PXE_FALSE)
00086 
00087 typedef PXE_UINT16      PXE_OPCODE;
00088 
00089 ///
00090 /// Return UNDI operational state.
00091 ///
00092 #define PXE_OPCODE_GET_STATE  0x0000
00093 
00094 ///
00095 /// Change UNDI operational state from Stopped to Started.
00096 ///
00097 #define PXE_OPCODE_START  0x0001
00098 
00099 ///
00100 /// Change UNDI operational state from Started to Stopped.
00101 ///
00102 #define PXE_OPCODE_STOP 0x0002
00103 
00104 ///
00105 /// Get UNDI initialization information.
00106 ///
00107 #define PXE_OPCODE_GET_INIT_INFO  0x0003
00108 
00109 ///
00110 /// Get NIC configuration information.
00111 ///
00112 #define PXE_OPCODE_GET_CONFIG_INFO  0x0004
00113 
00114 ///
00115 /// Changed UNDI operational state from Started to Initialized.
00116 ///
00117 #define PXE_OPCODE_INITIALIZE 0x0005
00118 
00119 ///
00120 /// Re-initialize the NIC H/W.
00121 ///
00122 #define PXE_OPCODE_RESET  0x0006
00123 
00124 ///
00125 /// Change the UNDI operational state from Initialized to Started.
00126 ///
00127 #define PXE_OPCODE_SHUTDOWN 0x0007
00128 
00129 ///
00130 /// Read & change state of external interrupt enables.
00131 ///
00132 #define PXE_OPCODE_INTERRUPT_ENABLES  0x0008
00133 
00134 ///
00135 /// Read & change state of packet receive filters.
00136 ///
00137 #define PXE_OPCODE_RECEIVE_FILTERS  0x0009
00138 
00139 ///
00140 /// Read & change station MAC address.
00141 ///
00142 #define PXE_OPCODE_STATION_ADDRESS  0x000A
00143 
00144 ///
00145 /// Read traffic statistics.
00146 ///
00147 #define PXE_OPCODE_STATISTICS 0x000B
00148 
00149 ///
00150 /// Convert multicast IP address to multicast MAC address.
00151 ///
00152 #define PXE_OPCODE_MCAST_IP_TO_MAC  0x000C
00153 
00154 ///
00155 /// Read or change non-volatile storage on the NIC.
00156 ///
00157 #define PXE_OPCODE_NVDATA 0x000D
00158 
00159 ///
00160 /// Get & clear interrupt status.
00161 ///
00162 #define PXE_OPCODE_GET_STATUS 0x000E
00163 
00164 ///
00165 /// Fill media header in packet for transmit.
00166 ///
00167 #define PXE_OPCODE_FILL_HEADER  0x000F
00168 
00169 ///
00170 /// Transmit packet(s).
00171 ///
00172 #define PXE_OPCODE_TRANSMIT 0x0010
00173 
00174 ///
00175 /// Receive packet.
00176 ///
00177 #define PXE_OPCODE_RECEIVE  0x0011
00178 
00179 ///
00180 /// Last valid PXE UNDI OpCode number.
00181 ///
00182 #define PXE_OPCODE_LAST_VALID 0x0011
00183 
00184 typedef PXE_UINT16  PXE_OPFLAGS;
00185 
00186 #define PXE_OPFLAGS_NOT_USED  0x0000
00187 
00188 //
00189 // //////////////////////////////////////
00190 // UNDI Get State
00191 //
00192 // No OpFlags
00193 
00194 ////////////////////////////////////////
00195 // UNDI Start
00196 //
00197 // No OpFlags
00198 
00199 ////////////////////////////////////////
00200 // UNDI Stop
00201 //
00202 // No OpFlags
00203 
00204 ////////////////////////////////////////
00205 // UNDI Get Init Info
00206 //
00207 // No Opflags
00208 
00209 ////////////////////////////////////////
00210 // UNDI Get Config Info
00211 //
00212 // No Opflags
00213 
00214 ///
00215 /// UNDI Initialize
00216 ///
00217 #define PXE_OPFLAGS_INITIALIZE_CABLE_DETECT_MASK    0x0001
00218 #define PXE_OPFLAGS_INITIALIZE_DETECT_CABLE         0x0000
00219 #define PXE_OPFLAGS_INITIALIZE_DO_NOT_DETECT_CABLE  0x0001
00220 
00221 ///
00222 ///
00223 /// UNDI Reset
00224 ///
00225 #define PXE_OPFLAGS_RESET_DISABLE_INTERRUPTS  0x0001
00226 #define PXE_OPFLAGS_RESET_DISABLE_FILTERS     0x0002
00227 
00228 ///
00229 /// UNDI Shutdown
00230 ///
00231 /// No OpFlags
00232 
00233 ///
00234 /// UNDI Interrupt Enables
00235 ///
00236 ///
00237 /// Select whether to enable or disable external interrupt signals.
00238 /// Setting both enable and disable will return PXE_STATCODE_INVALID_OPFLAGS.
00239 ///
00240 #define PXE_OPFLAGS_INTERRUPT_OPMASK  0xC000
00241 #define PXE_OPFLAGS_INTERRUPT_ENABLE  0x8000
00242 #define PXE_OPFLAGS_INTERRUPT_DISABLE 0x4000
00243 #define PXE_OPFLAGS_INTERRUPT_READ    0x0000
00244 
00245 ///
00246 /// Enable receive interrupts.  An external interrupt will be generated
00247 /// after a complete non-error packet has been received.
00248 ///
00249 #define PXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001
00250 
00251 ///
00252 /// Enable transmit interrupts.  An external interrupt will be generated
00253 /// after a complete non-error packet has been transmitted.
00254 ///
00255 #define PXE_OPFLAGS_INTERRUPT_TRANSMIT  0x0002
00256 
00257 ///
00258 /// Enable command interrupts.  An external interrupt will be generated
00259 /// when command execution stops.
00260 ///
00261 #define PXE_OPFLAGS_INTERRUPT_COMMAND 0x0004
00262 
00263 ///
00264 /// Generate software interrupt.  Setting this bit generates an external
00265 /// interrupt, if it is supported by the hardware.
00266 ///
00267 #define PXE_OPFLAGS_INTERRUPT_SOFTWARE  0x0008
00268 
00269 ///
00270 /// UNDI Receive Filters
00271 ///
00272 ///
00273 /// Select whether to enable or disable receive filters.
00274 /// Setting both enable and disable will return PXE_STATCODE_INVALID_OPCODE.
00275 ///
00276 #define PXE_OPFLAGS_RECEIVE_FILTER_OPMASK   0xC000
00277 #define PXE_OPFLAGS_RECEIVE_FILTER_ENABLE   0x8000
00278 #define PXE_OPFLAGS_RECEIVE_FILTER_DISABLE  0x4000
00279 #define PXE_OPFLAGS_RECEIVE_FILTER_READ     0x0000
00280 
00281 ///
00282 /// To reset the contents of the multicast MAC address filter list,
00283 /// set this OpFlag:
00284 ///
00285 #define PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000
00286 
00287 ///
00288 /// Enable unicast packet receiving.  Packets sent to the current station
00289 /// MAC address will be received.
00290 ///
00291 #define PXE_OPFLAGS_RECEIVE_FILTER_UNICAST  0x0001
00292 
00293 ///
00294 /// Enable broadcast packet receiving.  Packets sent to the broadcast
00295 /// MAC address will be received.
00296 ///
00297 #define PXE_OPFLAGS_RECEIVE_FILTER_BROADCAST  0x0002
00298 
00299 ///
00300 /// Enable filtered multicast packet receiving.  Packets sent to any
00301 /// of the multicast MAC addresses in the multicast MAC address filter
00302 /// list will be received.  If the filter list is empty, no multicast
00303 ///
00304 #define PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
00305 
00306 ///
00307 /// Enable promiscuous packet receiving.  All packets will be received.
00308 ///
00309 #define PXE_OPFLAGS_RECEIVE_FILTER_PROMISCUOUS  0x0008
00310 
00311 ///
00312 /// Enable promiscuous multicast packet receiving.  All multicast
00313 /// packets will be received.
00314 ///
00315 #define PXE_OPFLAGS_RECEIVE_FILTER_ALL_MULTICAST  0x0010
00316 
00317 ///
00318 /// UNDI Station Address
00319 ///
00320 #define PXE_OPFLAGS_STATION_ADDRESS_READ   0x0000
00321 #define PXE_OPFLAGS_STATION_ADDRESS_WRITE  0x0000
00322 #define PXE_OPFLAGS_STATION_ADDRESS_RESET  0x0001
00323 
00324 ///
00325 /// UNDI Statistics
00326 ///
00327 #define PXE_OPFLAGS_STATISTICS_READ   0x0000
00328 #define PXE_OPFLAGS_STATISTICS_RESET  0x0001
00329 
00330 ///
00331 /// UNDI MCast IP to MAC
00332 ///
00333 ///
00334 /// Identify the type of IP address in the CPB.
00335 ///
00336 #define PXE_OPFLAGS_MCAST_IP_TO_MAC_OPMASK  0x0003
00337 #define PXE_OPFLAGS_MCAST_IPV4_TO_MAC       0x0000
00338 #define PXE_OPFLAGS_MCAST_IPV6_TO_MAC       0x0001
00339 
00340 ///
00341 /// UNDI NvData
00342 ///
00343 ///
00344 /// Select the type of non-volatile data operation.
00345 ///
00346 #define PXE_OPFLAGS_NVDATA_OPMASK 0x0001
00347 #define PXE_OPFLAGS_NVDATA_READ   0x0000
00348 #define PXE_OPFLAGS_NVDATA_WRITE  0x0001
00349 
00350 ///
00351 /// UNDI Get Status
00352 ///
00353 ///
00354 /// Return current interrupt status.  This will also clear any interrupts
00355 /// that are currently set.  This can be used in a polling routine.  The
00356 /// interrupt flags are still set and cleared even when the interrupts
00357 /// are disabled.
00358 ///
00359 #define PXE_OPFLAGS_GET_INTERRUPT_STATUS  0x0001
00360 
00361 ///
00362 /// Return list of transmitted buffers for recycling.  Transmit buffers
00363 /// must not be changed or unallocated until they have recycled.  After
00364 /// issuing a transmit command, wait for a transmit complete interrupt.
00365 /// When a transmit complete interrupt is received, read the transmitted
00366 /// buffers.  Do not plan on getting one buffer per interrupt.  Some
00367 /// NICs and UNDIs may transmit multiple buffers per interrupt.
00368 ///
00369 #define PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS 0x0002
00370 
00371 ///
00372 /// UNDI Fill Header
00373 ///
00374 #define PXE_OPFLAGS_FILL_HEADER_OPMASK      0x0001
00375 #define PXE_OPFLAGS_FILL_HEADER_FRAGMENTED  0x0001
00376 #define PXE_OPFLAGS_FILL_HEADER_WHOLE       0x0000
00377 
00378 ///
00379 /// UNDI Transmit
00380 ///
00381 ///
00382 /// S/W UNDI only.  Return after the packet has been transmitted.  A
00383 /// transmit complete interrupt will still be generated and the transmit
00384 /// buffer will have to be recycled.
00385 ///
00386 #define PXE_OPFLAGS_SWUNDI_TRANSMIT_OPMASK  0x0001
00387 #define PXE_OPFLAGS_TRANSMIT_BLOCK          0x0001
00388 #define PXE_OPFLAGS_TRANSMIT_DONT_BLOCK     0x0000
00389 
00390 #define PXE_OPFLAGS_TRANSMIT_OPMASK     0x0002
00391 #define PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002
00392 #define PXE_OPFLAGS_TRANSMIT_WHOLE      0x0000
00393 
00394 ///
00395 /// UNDI Receive
00396 ///
00397 /// No OpFlags
00398 ///
00399 
00400 ///
00401 /// PXE STATFLAGS
00402 ///
00403 typedef PXE_UINT16  PXE_STATFLAGS;
00404 
00405 #define PXE_STATFLAGS_INITIALIZE  0x0000
00406 
00407 ///
00408 /// Common StatFlags that can be returned by all commands.
00409 ///
00410 ///
00411 /// The COMMAND_COMPLETE and COMMAND_FAILED status flags must be
00412 /// implemented by all UNDIs.  COMMAND_QUEUED is only needed by UNDIs
00413 /// that support command queuing.
00414 ///
00415 #define PXE_STATFLAGS_STATUS_MASK       0xC000
00416 #define PXE_STATFLAGS_COMMAND_COMPLETE  0xC000
00417 #define PXE_STATFLAGS_COMMAND_FAILED    0x8000
00418 #define PXE_STATFLAGS_COMMAND_QUEUED    0x4000
00419 
00420 ///
00421 /// UNDI Get State
00422 ///
00423 #define PXE_STATFLAGS_GET_STATE_MASK        0x0003
00424 #define PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002
00425 #define PXE_STATFLAGS_GET_STATE_STARTED     0x0001
00426 #define PXE_STATFLAGS_GET_STATE_STOPPED     0x0000
00427 
00428 ///
00429 /// UNDI Start
00430 ///
00431 /// No additional StatFlags
00432 ///
00433 
00434 ///
00435 /// UNDI Get Init Info
00436 ///
00437 #define PXE_STATFLAGS_CABLE_DETECT_MASK           0x0001
00438 #define PXE_STATFLAGS_CABLE_DETECT_NOT_SUPPORTED  0x0000
00439 #define PXE_STATFLAGS_CABLE_DETECT_SUPPORTED      0x0001
00440 
00441 ///
00442 /// UNDI Initialize
00443 ///
00444 #define PXE_STATFLAGS_INITIALIZED_NO_MEDIA  0x0001
00445 
00446 ///
00447 /// UNDI Reset
00448 ///
00449 #define PXE_STATFLAGS_RESET_NO_MEDIA  0x0001
00450 
00451 ///
00452 /// UNDI Shutdown
00453 ///
00454 /// No additional StatFlags
00455 
00456 ///
00457 /// UNDI Interrupt Enables
00458 ///
00459 ///
00460 /// If set, receive interrupts are enabled.
00461 ///
00462 #define PXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001
00463 
00464 ///
00465 /// If set, transmit interrupts are enabled.
00466 ///
00467 #define PXE_STATFLAGS_INTERRUPT_TRANSMIT  0x0002
00468 
00469 ///
00470 /// If set, command interrupts are enabled.
00471 ///
00472 #define PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004
00473 
00474 ///
00475 /// UNDI Receive Filters
00476 ///
00477 
00478 ///
00479 /// If set, unicast packets will be received.
00480 ///
00481 #define PXE_STATFLAGS_RECEIVE_FILTER_UNICAST  0x0001
00482 
00483 ///
00484 /// If set, broadcast packets will be received.
00485 ///
00486 #define PXE_STATFLAGS_RECEIVE_FILTER_BROADCAST  0x0002
00487 
00488 ///
00489 /// If set, multicast packets that match up with the multicast address
00490 /// filter list will be received.
00491 ///
00492 #define PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
00493 
00494 ///
00495 /// If set, all packets will be received.
00496 ///
00497 #define PXE_STATFLAGS_RECEIVE_FILTER_PROMISCUOUS  0x0008
00498 
00499 ///
00500 /// If set, all multicast packets will be received.
00501 ///
00502 #define PXE_STATFLAGS_RECEIVE_FILTER_ALL_MULTICAST  0x0010
00503 
00504 ///
00505 /// UNDI Station Address
00506 ///
00507 /// No additional StatFlags
00508 ///
00509 
00510 ///
00511 /// UNDI Statistics
00512 ///
00513 /// No additional StatFlags
00514 ///
00515 
00516 ///
00517 //// UNDI MCast IP to MAC
00518 ////
00519 //// No additional StatFlags
00520 
00521 ///
00522 /// UNDI NvData
00523 ///
00524 /// No additional StatFlags
00525 ///
00526 
00527 ///
00528 /// UNDI Get Status
00529 ///
00530 
00531 ///
00532 /// Use to determine if an interrupt has occurred.
00533 ///
00534 #define PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK 0x000F
00535 #define PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS  0x0000
00536 
00537 ///
00538 /// If set, at least one receive interrupt occurred.
00539 ///
00540 #define PXE_STATFLAGS_GET_STATUS_RECEIVE  0x0001
00541 
00542 ///
00543 /// If set, at least one transmit interrupt occurred.
00544 ///
00545 #define PXE_STATFLAGS_GET_STATUS_TRANSMIT 0x0002
00546 
00547 ///
00548 /// If set, at least one command interrupt occurred.
00549 ///
00550 #define PXE_STATFLAGS_GET_STATUS_COMMAND  0x0004
00551 
00552 ///
00553 /// If set, at least one software interrupt occurred.
00554 ///
00555 #define PXE_STATFLAGS_GET_STATUS_SOFTWARE 0x0008
00556 
00557 ///
00558 /// This flag is set if the transmitted buffer queue is empty.  This flag
00559 /// will be set if all transmitted buffer addresses get written into the DB.
00560 ///
00561 #define PXE_STATFLAGS_GET_STATUS_TXBUF_QUEUE_EMPTY  0x0010
00562 
00563 ///
00564 /// This flag is set if no transmitted buffer addresses were written
00565 /// into the DB.  (This could be because DBsize was too small.)
00566 ///
00567 #define PXE_STATFLAGS_GET_STATUS_NO_TXBUFS_WRITTEN  0x0020
00568 
00569 ///
00570 /// UNDI Fill Header
00571 ///
00572 /// No additional StatFlags
00573 ///
00574 
00575 ///
00576 /// UNDI Transmit
00577 ///
00578 /// No additional StatFlags.
00579 
00580 ///
00581 /// UNDI Receive
00582 ///
00583 
00584 ///
00585 /// No additional StatFlags.
00586 ///
00587 typedef PXE_UINT16  PXE_STATCODE;
00588 
00589 #define PXE_STATCODE_INITIALIZE 0x0000
00590 
00591 ///
00592 /// Common StatCodes returned by all UNDI commands, UNDI protocol functions
00593 /// and BC protocol functions.
00594 ///
00595 #define PXE_STATCODE_SUCCESS              0x0000
00596 
00597 #define PXE_STATCODE_INVALID_CDB          0x0001
00598 #define PXE_STATCODE_INVALID_CPB          0x0002
00599 #define PXE_STATCODE_BUSY                 0x0003
00600 #define PXE_STATCODE_QUEUE_FULL           0x0004
00601 #define PXE_STATCODE_ALREADY_STARTED      0x0005
00602 #define PXE_STATCODE_NOT_STARTED          0x0006
00603 #define PXE_STATCODE_NOT_SHUTDOWN         0x0007
00604 #define PXE_STATCODE_ALREADY_INITIALIZED  0x0008
00605 #define PXE_STATCODE_NOT_INITIALIZED      0x0009
00606 #define PXE_STATCODE_DEVICE_FAILURE       0x000A
00607 #define PXE_STATCODE_NVDATA_FAILURE       0x000B
00608 #define PXE_STATCODE_UNSUPPORTED          0x000C
00609 #define PXE_STATCODE_BUFFER_FULL          0x000D
00610 #define PXE_STATCODE_INVALID_PARAMETER    0x000E
00611 #define PXE_STATCODE_INVALID_UNDI         0x000F
00612 #define PXE_STATCODE_IPV4_NOT_SUPPORTED   0x0010
00613 #define PXE_STATCODE_IPV6_NOT_SUPPORTED   0x0011
00614 #define PXE_STATCODE_NOT_ENOUGH_MEMORY    0x0012
00615 #define PXE_STATCODE_NO_DATA              0x0013
00616 
00617 typedef PXE_UINT16  PXE_IFNUM;
00618 
00619 ///
00620 /// This interface number must be passed to the S/W UNDI Start command.
00621 ///
00622 #define PXE_IFNUM_START 0x0000
00623 
00624 ///
00625 /// This interface number is returned by the S/W UNDI Get State and
00626 /// Start commands if information in the CDB, CPB or DB is invalid.
00627 ///
00628 #define PXE_IFNUM_INVALID 0x0000
00629 
00630 typedef PXE_UINT16  PXE_CONTROL;
00631 
00632 ///
00633 /// Setting this flag directs the UNDI to queue this command for later
00634 /// execution if the UNDI is busy and it supports command queuing.
00635 /// If queuing is not supported, a PXE_STATCODE_INVALID_CONTROL error
00636 /// is returned.  If the queue is full, a PXE_STATCODE_CDB_QUEUE_FULL
00637 /// error is returned.
00638 ///
00639 #define PXE_CONTROL_QUEUE_IF_BUSY 0x0002
00640 
00641 ///
00642 /// These two bit values are used to determine if there are more UNDI
00643 /// CDB structures following this one.  If the link bit is set, there
00644 /// must be a CDB structure following this one.  Execution will start
00645 /// on the next CDB structure as soon as this one completes successfully.
00646 /// If an error is generated by this command, execution will stop.
00647 ///
00648 #define PXE_CONTROL_LINK              0x0001
00649 #define PXE_CONTROL_LAST_CDB_IN_LIST  0x0000
00650 
00651 typedef PXE_UINT8   PXE_FRAME_TYPE;
00652 
00653 #define PXE_FRAME_TYPE_NONE                     0x00
00654 #define PXE_FRAME_TYPE_UNICAST                  0x01
00655 #define PXE_FRAME_TYPE_BROADCAST                0x02
00656 #define PXE_FRAME_TYPE_FILTERED_MULTICAST       0x03
00657 #define PXE_FRAME_TYPE_PROMISCUOUS              0x04
00658 #define PXE_FRAME_TYPE_PROMISCUOUS_MULTICAST    0x05
00659 
00660 #define PXE_FRAME_TYPE_MULTICAST                PXE_FRAME_TYPE_FILTERED_MULTICAST
00661 
00662 typedef PXE_UINT32  PXE_IPV4;
00663 
00664 typedef PXE_UINT32  PXE_IPV6[4];
00665 #define PXE_MAC_LENGTH  32
00666 
00667 typedef PXE_UINT8   PXE_MAC_ADDR[PXE_MAC_LENGTH];
00668 
00669 typedef PXE_UINT8   PXE_IFTYPE;
00670 typedef UINT16      PXE_MEDIA_PROTOCOL;
00671 
00672 ///
00673 /// This information is from the ARP section of RFC 1700.
00674 ///
00675 ///     1 Ethernet (10Mb)                                    [JBP]
00676 ///     2 Experimental Ethernet (3Mb)                        [JBP]
00677 ///     3 Amateur Radio AX.25                                [PXK]
00678 ///     4 Proteon ProNET Token Ring                          [JBP]
00679 ///     5 Chaos                                              [GXP]
00680 ///     6 IEEE 802 Networks                                  [JBP]
00681 ///     7 ARCNET                                             [JBP]
00682 ///     8 Hyperchannel                                       [JBP]
00683 ///     9 Lanstar                                             [TU]
00684 ///    10 Autonet Short Address                             [MXB1]
00685 ///    11 LocalTalk                                         [JKR1]
00686 ///    12 LocalNet (IBM* PCNet or SYTEK* LocalNET)           [JXM]
00687 ///    13 Ultra link                                        [RXD2]
00688 ///    14 SMDS                                              [GXC1]
00689 ///    15 Frame Relay                                        [AGM]
00690 ///    16 Asynchronous Transmission Mode (ATM)              [JXB2]
00691 ///    17 HDLC                                               [JBP]
00692 ///    18 Fibre Channel                            [Yakov Rekhter]
00693 ///    19 Asynchronous Transmission Mode (ATM)      [Mark Laubach]
00694 ///    20 Serial Line                                        [JBP]
00695 ///    21 Asynchronous Transmission Mode (ATM)              [MXB1]
00696 ///
00697 /// * Other names and brands may be claimed as the property of others.
00698 ///
00699 #define PXE_IFTYPE_ETHERNET       0x01
00700 #define PXE_IFTYPE_TOKENRING      0x04
00701 #define PXE_IFTYPE_FIBRE_CHANNEL  0x12
00702 
00703 typedef struct s_pxe_hw_undi {
00704   PXE_UINT32  Signature;      ///< PXE_ROMID_SIGNATURE
00705   PXE_UINT8   Len;            ///< sizeof(PXE_HW_UNDI)
00706   PXE_UINT8   Fudge;          ///< makes 8-bit cksum equal zero
00707   PXE_UINT8   Rev;            ///< PXE_ROMID_REV
00708   PXE_UINT8   IFcnt;          ///< physical connector count
00709   PXE_UINT8   MajorVer;       ///< PXE_ROMID_MAJORVER
00710   PXE_UINT8   MinorVer;       ///< PXE_ROMID_MINORVER
00711   PXE_UINT16  reserved;       ///< zero, not used
00712   PXE_UINT32  Implementation; ///< implementation flags
00713   ///< reserved             ///< vendor use
00714   ///< UINT32 Status;       ///< status port
00715   ///< UINT32 Command;      ///< command port
00716   ///< UINT64 CDBaddr;      ///< CDB address port
00717   ///<
00718 } PXE_HW_UNDI;
00719 
00720 ///
00721 /// Status port bit definitions
00722 ///
00723 
00724 ///
00725 /// UNDI operation state
00726 ///
00727 #define PXE_HWSTAT_STATE_MASK   0xC0000000
00728 #define PXE_HWSTAT_BUSY         0xC0000000
00729 #define PXE_HWSTAT_INITIALIZED  0x80000000
00730 #define PXE_HWSTAT_STARTED      0x40000000
00731 #define PXE_HWSTAT_STOPPED      0x00000000
00732 
00733 ///
00734 /// If set, last command failed
00735 ///
00736 #define PXE_HWSTAT_COMMAND_FAILED 0x20000000
00737 
00738 ///
00739 /// If set, identifies enabled receive filters
00740 ///
00741 #define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000
00742 #define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED           0x00000800
00743 #define PXE_HWSTAT_BROADCAST_RX_ENABLED             0x00000400
00744 #define PXE_HWSTAT_MULTICAST_RX_ENABLED             0x00000200
00745 #define PXE_HWSTAT_UNICAST_RX_ENABLED               0x00000100
00746 
00747 ///
00748 /// If set, identifies enabled external interrupts
00749 ///
00750 #define PXE_HWSTAT_SOFTWARE_INT_ENABLED     0x00000080
00751 #define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED  0x00000040
00752 #define PXE_HWSTAT_PACKET_RX_INT_ENABLED    0x00000020
00753 #define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010
00754 
00755 ///
00756 /// If set, identifies pending interrupts
00757 ///
00758 #define PXE_HWSTAT_SOFTWARE_INT_PENDING     0x00000008
00759 #define PXE_HWSTAT_TX_COMPLETE_INT_PENDING  0x00000004
00760 #define PXE_HWSTAT_PACKET_RX_INT_PENDING    0x00000002
00761 #define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001
00762 
00763 ///
00764 /// Command port definitions
00765 ///
00766 
00767 ///
00768 /// If set, CDB identified in CDBaddr port is given to UNDI.
00769 /// If not set, other bits in this word will be processed.
00770 ///
00771 #define PXE_HWCMD_ISSUE_COMMAND   0x80000000
00772 #define PXE_HWCMD_INTS_AND_FILTS  0x00000000
00773 
00774 ///
00775 /// Use these to enable/disable receive filters.
00776 ///
00777 #define PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE 0x00001000
00778 #define PXE_HWCMD_PROMISCUOUS_RX_ENABLE           0x00000800
00779 #define PXE_HWCMD_BROADCAST_RX_ENABLE             0x00000400
00780 #define PXE_HWCMD_MULTICAST_RX_ENABLE             0x00000200
00781 #define PXE_HWCMD_UNICAST_RX_ENABLE               0x00000100
00782 
00783 ///
00784 /// Use these to enable/disable external interrupts
00785 ///
00786 #define PXE_HWCMD_SOFTWARE_INT_ENABLE     0x00000080
00787 #define PXE_HWCMD_TX_COMPLETE_INT_ENABLE  0x00000040
00788 #define PXE_HWCMD_PACKET_RX_INT_ENABLE    0x00000020
00789 #define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010
00790 
00791 ///
00792 /// Use these to clear pending external interrupts
00793 ///
00794 #define PXE_HWCMD_CLEAR_SOFTWARE_INT      0x00000008
00795 #define PXE_HWCMD_CLEAR_TX_COMPLETE_INT   0x00000004
00796 #define PXE_HWCMD_CLEAR_PACKET_RX_INT     0x00000002
00797 #define PXE_HWCMD_CLEAR_CMD_COMPLETE_INT  0x00000001
00798 
00799 typedef struct s_pxe_sw_undi {
00800   PXE_UINT32  Signature;      ///< PXE_ROMID_SIGNATURE
00801   PXE_UINT8   Len;            ///< sizeof(PXE_SW_UNDI)
00802   PXE_UINT8   Fudge;          ///< makes 8-bit cksum zero
00803   PXE_UINT8   Rev;            ///< PXE_ROMID_REV
00804   PXE_UINT8   IFcnt;          ///< physical connector count
00805   PXE_UINT8   MajorVer;       ///< PXE_ROMID_MAJORVER
00806   PXE_UINT8   MinorVer;       ///< PXE_ROMID_MINORVER
00807   PXE_UINT16  reserved1;      ///< zero, not used
00808   PXE_UINT32  Implementation; ///< Implementation flags
00809   PXE_UINT64  EntryPoint;     ///< API entry point
00810   PXE_UINT8   reserved2[3];   ///< zero, not used
00811   PXE_UINT8   BusCnt;         ///< number of bustypes supported
00812   PXE_UINT32  BusType[1];     ///< list of supported bustypes
00813 } PXE_SW_UNDI;
00814 
00815 typedef union u_pxe_undi {
00816   PXE_HW_UNDI hw;
00817   PXE_SW_UNDI sw;
00818 } PXE_UNDI;
00819 
00820 ///
00821 /// Signature of !PXE structure
00822 ///
00823 #define PXE_ROMID_SIGNATURE PXE_BUSTYPE ('!', 'P', 'X', 'E')
00824 
00825 ///
00826 /// !PXE structure format revision
00827 ///
00828 #define PXE_ROMID_REV 0x02
00829 
00830 ///
00831 /// UNDI command interface revision.  These are the values that get sent
00832 /// in option 94 (Client Network Interface Identifier) in the DHCP Discover
00833 /// and PXE Boot Server Request packets.
00834 ///
00835 #define PXE_ROMID_MAJORVER    0x03
00836 #define PXE_ROMID_MINORVER    0x01
00837 
00838 ///
00839 /// Implementation flags
00840 ///
00841 #define PXE_ROMID_IMP_HW_UNDI                             0x80000000
00842 #define PXE_ROMID_IMP_SW_VIRT_ADDR                        0x40000000
00843 #define PXE_ROMID_IMP_64BIT_DEVICE                        0x00010000
00844 #define PXE_ROMID_IMP_FRAG_SUPPORTED                      0x00008000
00845 #define PXE_ROMID_IMP_CMD_LINK_SUPPORTED                  0x00004000
00846 #define PXE_ROMID_IMP_CMD_QUEUE_SUPPORTED                 0x00002000
00847 #define PXE_ROMID_IMP_MULTI_FRAME_SUPPORTED               0x00001000
00848 #define PXE_ROMID_IMP_NVDATA_SUPPORT_MASK                 0x00000C00
00849 #define PXE_ROMID_IMP_NVDATA_BULK_WRITABLE                0x00000C00
00850 #define PXE_ROMID_IMP_NVDATA_SPARSE_WRITABLE              0x00000800
00851 #define PXE_ROMID_IMP_NVDATA_READ_ONLY                    0x00000400
00852 #define PXE_ROMID_IMP_NVDATA_NOT_AVAILABLE                0x00000000
00853 #define PXE_ROMID_IMP_STATISTICS_SUPPORTED                0x00000200
00854 #define PXE_ROMID_IMP_STATION_ADDR_SETTABLE               0x00000100
00855 #define PXE_ROMID_IMP_PROMISCUOUS_MULTICAST_RX_SUPPORTED  0x00000080
00856 #define PXE_ROMID_IMP_PROMISCUOUS_RX_SUPPORTED            0x00000040
00857 #define PXE_ROMID_IMP_BROADCAST_RX_SUPPORTED              0x00000020
00858 #define PXE_ROMID_IMP_FILTERED_MULTICAST_RX_SUPPORTED     0x00000010
00859 #define PXE_ROMID_IMP_SOFTWARE_INT_SUPPORTED              0x00000008
00860 #define PXE_ROMID_IMP_TX_COMPLETE_INT_SUPPORTED           0x00000004
00861 #define PXE_ROMID_IMP_PACKET_RX_INT_SUPPORTED             0x00000002
00862 #define PXE_ROMID_IMP_CMD_COMPLETE_INT_SUPPORTED          0x00000001
00863 
00864 typedef struct s_pxe_cdb {
00865   PXE_OPCODE    OpCode;
00866   PXE_OPFLAGS   OpFlags;
00867   PXE_UINT16    CPBsize;
00868   PXE_UINT16    DBsize;
00869   PXE_UINT64    CPBaddr;
00870   PXE_UINT64    DBaddr;
00871   PXE_STATCODE  StatCode;
00872   PXE_STATFLAGS StatFlags;
00873   PXE_UINT16    IFnum;
00874   PXE_CONTROL   Control;
00875 } PXE_CDB;
00876 
00877 typedef union u_pxe_ip_addr {
00878   PXE_IPV6  IPv6;
00879   PXE_IPV4  IPv4;
00880 } PXE_IP_ADDR;
00881 
00882 typedef union pxe_device {
00883   ///
00884   /// PCI and PC Card NICs are both identified using bus, device
00885   /// and function numbers.  For PC Card, this may require PC
00886   /// Card services to be loaded in the BIOS or preboot
00887   /// environment.
00888   ///
00889   struct {
00890     ///
00891     /// See S/W UNDI ROMID structure definition for PCI and
00892     /// PCC BusType definitions.
00893     ///
00894     PXE_UINT32  BusType;
00895 
00896     ///
00897     /// Bus, device & function numbers that locate this device.
00898     ///
00899     PXE_UINT16  Bus;
00900     PXE_UINT8   Device;
00901     PXE_UINT8   Function;
00902   }
00903   PCI, PCC;
00904 
00905 } PXE_DEVICE;
00906 
00907 ///
00908 /// cpb and db definitions
00909 ///
00910 #define MAX_PCI_CONFIG_LEN    64  ///< # of dwords
00911 #define MAX_EEPROM_LEN        128 ///< # of dwords
00912 #define MAX_XMIT_BUFFERS      32  ///< recycling Q length for xmit_done
00913 #define MAX_MCAST_ADDRESS_CNT 8
00914 
00915 typedef struct s_pxe_cpb_start_30 {
00916   ///
00917   /// PXE_VOID Delay(UINTN microseconds);
00918   ///
00919   /// UNDI will never request a delay smaller than 10 microseconds
00920   /// and will always request delays in increments of 10 microseconds.
00921   /// The Delay() CallBack routine must delay between n and n + 10
00922   /// microseconds before returning control to the UNDI.
00923   ///
00924   /// This field cannot be set to zero.
00925   ///
00926   UINT64  Delay;
00927 
00928   ///
00929   /// PXE_VOID Block(UINT32 enable);
00930   ///
00931   /// UNDI may need to block multi-threaded/multi-processor access to
00932   /// critical code sections when programming or accessing the network
00933   /// device.  To this end, a blocking service is needed by the UNDI.
00934   /// When UNDI needs a block, it will call Block() passing a non-zero
00935   /// value.  When UNDI no longer needs a block, it will call Block()
00936   /// with a zero value.  When called, if the Block() is already enabled,
00937   /// do not return control to the UNDI until the previous Block() is
00938   /// disabled.
00939   ///
00940   /// This field cannot be set to zero.
00941   ///
00942   UINT64  Block;
00943 
00944   ///
00945   /// PXE_VOID Virt2Phys(UINT64 virtual, UINT64 physical_ptr);
00946   ///
00947   /// UNDI will pass the virtual address of a buffer and the virtual
00948   /// address of a 64-bit physical buffer.  Convert the virtual address
00949   /// to a physical address and write the result to the physical address
00950   /// buffer.  If virtual and physical addresses are the same, just
00951   /// copy the virtual address to the physical address buffer.
00952   ///
00953   /// This field can be set to zero if virtual and physical addresses
00954   /// are equal.
00955   ///
00956   UINT64  Virt2Phys;
00957   ///
00958   /// PXE_VOID Mem_IO(UINT8 read_write, UINT8 len, UINT64 port,
00959   ///              UINT64 buf_addr);
00960   ///
00961   /// UNDI will read or write the device io space using this call back
00962   /// function. It passes the number of bytes as the len parameter and it
00963   /// will be either 1,2,4 or 8.
00964   ///
00965   /// This field can not be set to zero.
00966   ///
00967   UINT64  Mem_IO;
00968 } PXE_CPB_START_30;
00969 
00970 typedef struct s_pxe_cpb_start_31 {
00971   ///
00972   /// PXE_VOID Delay(UINT64 UnqId, UINTN microseconds);
00973   ///
00974   /// UNDI will never request a delay smaller than 10 microseconds
00975   /// and will always request delays in increments of 10 microseconds.
00976   /// The Delay() CallBack routine must delay between n and n + 10
00977   /// microseconds before returning control to the UNDI.
00978   ///
00979   /// This field cannot be set to zero.
00980   ///
00981   UINT64  Delay;
00982 
00983   ///
00984   /// PXE_VOID Block(UINT64 unq_id, UINT32 enable);
00985   ///
00986   /// UNDI may need to block multi-threaded/multi-processor access to
00987   /// critical code sections when programming or accessing the network
00988   /// device.  To this end, a blocking service is needed by the UNDI.
00989   /// When UNDI needs a block, it will call Block() passing a non-zero
00990   /// value.  When UNDI no longer needs a block, it will call Block()
00991   /// with a zero value.  When called, if the Block() is already enabled,
00992   /// do not return control to the UNDI until the previous Block() is
00993   /// disabled.
00994   ///
00995   /// This field cannot be set to zero.
00996   ///
00997   UINT64  Block;
00998 
00999   ///
01000   /// PXE_VOID Virt2Phys(UINT64 UnqId, UINT64 virtual, UINT64 physical_ptr);
01001   ///
01002   /// UNDI will pass the virtual address of a buffer and the virtual
01003   /// address of a 64-bit physical buffer.  Convert the virtual address
01004   /// to a physical address and write the result to the physical address
01005   /// buffer.  If virtual and physical addresses are the same, just
01006   /// copy the virtual address to the physical address buffer.
01007   ///
01008   /// This field can be set to zero if virtual and physical addresses
01009   /// are equal.
01010   ///
01011   UINT64  Virt2Phys;
01012   ///
01013   /// PXE_VOID Mem_IO(UINT64 UnqId, UINT8 read_write, UINT8 len, UINT64 port,
01014   ///              UINT64 buf_addr);
01015   ///
01016   /// UNDI will read or write the device io space using this call back
01017   /// function. It passes the number of bytes as the len parameter and it
01018   /// will be either 1,2,4 or 8.
01019   ///
01020   /// This field can not be set to zero.
01021   ///
01022   UINT64  Mem_IO;
01023   ///
01024   /// PXE_VOID Map_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,
01025   ///                 UINT32 Direction, UINT64 mapped_addr);
01026   ///
01027   /// UNDI will pass the virtual address of a buffer, direction of the data
01028   /// flow from/to the mapped buffer (the constants are defined below)
01029   /// and a place holder (pointer) for the mapped address.
01030   /// This call will Map the given address to a physical DMA address and write
01031   /// the result to the mapped_addr pointer.  If there is no need to
01032   /// map the given address to a lower address (i.e. the given address is
01033   /// associated with a physical address that is already compatible to be
01034   /// used with the DMA, it converts the given virtual address to it's
01035   /// physical address and write that in the mapped address pointer.
01036   ///
01037   /// This field can be set to zero if there is no mapping service available
01038   ///
01039   UINT64  Map_Mem;
01040 
01041   ///
01042   /// PXE_VOID UnMap_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,
01043   ///            UINT32 Direction, UINT64 mapped_addr);
01044   ///
01045   /// UNDI will pass the virtual and mapped addresses of a buffer
01046   /// This call will un map the given address
01047   ///
01048   /// This field can be set to zero if there is no unmapping service available
01049   ///
01050   UINT64  UnMap_Mem;
01051 
01052   ///
01053   /// PXE_VOID Sync_Mem(UINT64 unq_id, UINT64 virtual,
01054   ///            UINT32 size, UINT32 Direction, UINT64 mapped_addr);
01055   ///
01056   /// UNDI will pass the virtual and mapped addresses of a buffer
01057   /// This call will synchronize the contents of both the virtual and mapped
01058   /// buffers for the given Direction.
01059   ///
01060   /// This field can be set to zero if there is no service available
01061   ///
01062   UINT64  Sync_Mem;
01063 
01064   ///
01065   /// protocol driver can provide anything for this Unique_ID, UNDI remembers
01066   /// that as just a 64bit value assocaited to the interface specified by
01067   /// the ifnum and gives it back as a parameter to all the call-back routines
01068   /// when calling for that interface!
01069   ///
01070   UINT64  Unique_ID;
01071 } PXE_CPB_START_31;
01072 
01073 #define TO_AND_FROM_DEVICE    0
01074 #define FROM_DEVICE           1
01075 #define TO_DEVICE             2
01076 
01077 #define PXE_DELAY_MILLISECOND 1000
01078 #define PXE_DELAY_SECOND      1000000
01079 #define PXE_IO_READ           0
01080 #define PXE_IO_WRITE          1
01081 #define PXE_MEM_READ          2
01082 #define PXE_MEM_WRITE         4
01083 
01084 typedef struct s_pxe_db_get_init_info {
01085   ///
01086   /// Minimum length of locked memory buffer that must be given to
01087   /// the Initialize command. Giving UNDI more memory will generally
01088   /// give better performance.
01089   ///
01090   /// If MemoryRequired is zero, the UNDI does not need and will not
01091   /// use system memory to receive and transmit packets.
01092   ///
01093   PXE_UINT32  MemoryRequired;
01094 
01095   ///
01096   /// Maximum frame data length for Tx/Rx excluding the media header.
01097   ///
01098   PXE_UINT32  FrameDataLen;
01099 
01100   ///
01101   /// Supported link speeds are in units of mega bits.  Common ethernet
01102   /// values are 10, 100 and 1000.  Unused LinkSpeeds[] entries are zero
01103   /// filled.
01104   ///
01105   PXE_UINT32  LinkSpeeds[4];
01106 
01107   ///
01108   /// Number of non-volatile storage items.
01109   ///
01110   PXE_UINT32  NvCount;
01111 
01112   ///
01113   /// Width of non-volatile storage item in bytes.  0, 1, 2 or 4
01114   ///
01115   PXE_UINT16  NvWidth;
01116 
01117   ///
01118   /// Media header length.  This is the typical media header length for
01119   /// this UNDI.  This information is needed when allocating receive
01120   /// and transmit buffers.
01121   ///
01122   PXE_UINT16  MediaHeaderLen;
01123 
01124   ///
01125   /// Number of bytes in the NIC hardware (MAC) address.
01126   ///
01127   PXE_UINT16  HWaddrLen;
01128 
01129   ///
01130   /// Maximum number of multicast MAC addresses in the multicast
01131   /// MAC address filter list.
01132   ///
01133   PXE_UINT16  MCastFilterCnt;
01134 
01135   ///
01136   /// Default number and size of transmit and receive buffers that will
01137   /// be allocated by the UNDI.  If MemoryRequired is non-zero, this
01138   /// allocation will come out of the memory buffer given to the Initialize
01139   /// command.  If MemoryRequired is zero, this allocation will come out of
01140   /// memory on the NIC.
01141   ///
01142   PXE_UINT16  TxBufCnt;
01143   PXE_UINT16  TxBufSize;
01144   PXE_UINT16  RxBufCnt;
01145   PXE_UINT16  RxBufSize;
01146 
01147   ///
01148   /// Hardware interface types defined in the Assigned Numbers RFC
01149   /// and used in DHCP and ARP packets.
01150   /// See the PXE_IFTYPE typedef and PXE_IFTYPE_xxx macros.
01151   ///
01152   PXE_UINT8   IFtype;
01153 
01154   ///
01155   /// Supported duplex.  See PXE_DUPLEX_xxxxx #defines below.
01156   ///
01157   PXE_UINT8   SupportedDuplexModes;
01158 
01159   ///
01160   /// Supported loopback options.  See PXE_LOOPBACK_xxxxx #defines below.
01161   ///
01162   PXE_UINT8   SupportedLoopBackModes;
01163 } PXE_DB_GET_INIT_INFO;
01164 
01165 #define PXE_MAX_TXRX_UNIT_ETHER           1500
01166 
01167 #define PXE_HWADDR_LEN_ETHER              0x0006
01168 #define PXE_MAC_HEADER_LEN_ETHER          0x000E
01169 
01170 #define PXE_DUPLEX_ENABLE_FULL_SUPPORTED  1
01171 #define PXE_DUPLEX_FORCE_FULL_SUPPORTED   2
01172 
01173 #define PXE_LOOPBACK_INTERNAL_SUPPORTED   1
01174 #define PXE_LOOPBACK_EXTERNAL_SUPPORTED   2
01175 
01176 typedef struct s_pxe_pci_config_info {
01177   ///
01178   /// This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
01179   /// For PCI bus devices, this field is set to PXE_BUSTYPE_PCI.
01180   ///
01181   UINT32  BusType;
01182 
01183   ///
01184   /// This identifies the PCI network device that this UNDI interface
01185   /// is bound to.
01186   ///
01187   UINT16  Bus;
01188   UINT8   Device;
01189   UINT8   Function;
01190 
01191   ///
01192   /// This is a copy of the PCI configuration space for this
01193   /// network device.
01194   ///
01195   union {
01196     UINT8   Byte[256];
01197     UINT16  Word[128];
01198     UINT32  Dword[64];
01199   } Config;
01200 } PXE_PCI_CONFIG_INFO;
01201 
01202 typedef struct s_pxe_pcc_config_info {
01203   ///
01204   /// This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
01205   /// For PCC bus devices, this field is set to PXE_BUSTYPE_PCC.
01206   ///
01207   PXE_UINT32  BusType;
01208 
01209   ///
01210   /// This identifies the PCC network device that this UNDI interface
01211   /// is bound to.
01212   ///
01213   PXE_UINT16  Bus;
01214   PXE_UINT8   Device;
01215   PXE_UINT8   Function;
01216 
01217   ///
01218   /// This is a copy of the PCC configuration space for this
01219   /// network device.
01220   ///
01221   union {
01222     PXE_UINT8   Byte[256];
01223     PXE_UINT16  Word[128];
01224     PXE_UINT32  Dword[64];
01225   } Config;
01226 } PXE_PCC_CONFIG_INFO;
01227 
01228 typedef union u_pxe_db_get_config_info {
01229   PXE_PCI_CONFIG_INFO   pci;
01230   PXE_PCC_CONFIG_INFO   pcc;
01231 } PXE_DB_GET_CONFIG_INFO;
01232 
01233 typedef struct s_pxe_cpb_initialize {
01234   ///
01235   /// Address of first (lowest) byte of the memory buffer.  This buffer must
01236   /// be in contiguous physical memory and cannot be swapped out.  The UNDI
01237   /// will be using this for transmit and receive buffering.
01238   ///
01239   PXE_UINT64  MemoryAddr;
01240 
01241   ///
01242   /// MemoryLength must be greater than or equal to MemoryRequired
01243   /// returned by the Get Init Info command.
01244   ///
01245   PXE_UINT32  MemoryLength;
01246 
01247   ///
01248   /// Desired link speed in Mbit/sec.  Common ethernet values are 10, 100
01249   /// and 1000.  Setting a value of zero will auto-detect and/or use the
01250   /// default link speed (operation depends on UNDI/NIC functionality).
01251   ///
01252   PXE_UINT32  LinkSpeed;
01253 
01254   ///
01255   /// Suggested number and size of receive and transmit buffers to
01256   /// allocate.  If MemoryAddr and MemoryLength are non-zero, this
01257   /// allocation comes out of the supplied memory buffer.  If MemoryAddr
01258   /// and MemoryLength are zero, this allocation comes out of memory
01259   /// on the NIC.
01260   ///
01261   /// If these fields are set to zero, the UNDI will allocate buffer
01262   /// counts and sizes as it sees fit.
01263   ///
01264   PXE_UINT16  TxBufCnt;
01265   PXE_UINT16  TxBufSize;
01266   PXE_UINT16  RxBufCnt;
01267   PXE_UINT16  RxBufSize;
01268 
01269   ///
01270   /// The following configuration parameters are optional and must be zero
01271   /// to use the default values.
01272   ///
01273   PXE_UINT8   DuplexMode;
01274 
01275   PXE_UINT8   LoopBackMode;
01276 } PXE_CPB_INITIALIZE;
01277 
01278 #define PXE_DUPLEX_DEFAULT      0x00
01279 #define PXE_FORCE_FULL_DUPLEX   0x01
01280 #define PXE_ENABLE_FULL_DUPLEX  0x02
01281 #define PXE_FORCE_HALF_DUPLEX   0x04
01282 #define PXE_DISABLE_FULL_DUPLEX 0x08
01283 
01284 #define LOOPBACK_NORMAL         0
01285 #define LOOPBACK_INTERNAL       1
01286 #define LOOPBACK_EXTERNAL       2
01287 
01288 typedef struct s_pxe_db_initialize {
01289   ///
01290   /// Actual amount of memory used from the supplied memory buffer.  This
01291   /// may be less that the amount of memory suppllied and may be zero if
01292   /// the UNDI and network device do not use external memory buffers.
01293   ///
01294   /// Memory used by the UNDI and network device is allocated from the
01295   /// lowest memory buffer address.
01296   ///
01297   PXE_UINT32  MemoryUsed;
01298 
01299   ///
01300   /// Actual number and size of receive and transmit buffers that were
01301   /// allocated.
01302   ///
01303   PXE_UINT16  TxBufCnt;
01304   PXE_UINT16  TxBufSize;
01305   PXE_UINT16  RxBufCnt;
01306   PXE_UINT16  RxBufSize;
01307 } PXE_DB_INITIALIZE;
01308 
01309 typedef struct s_pxe_cpb_receive_filters {
01310   ///
01311   /// List of multicast MAC addresses.  This list, if present, will
01312   /// replace the existing multicast MAC address filter list.
01313   ///
01314   PXE_MAC_ADDR  MCastList[MAX_MCAST_ADDRESS_CNT];
01315 } PXE_CPB_RECEIVE_FILTERS;
01316 
01317 typedef struct s_pxe_db_receive_filters {
01318   ///
01319   /// Filtered multicast MAC address list.
01320   ///
01321   PXE_MAC_ADDR  MCastList[MAX_MCAST_ADDRESS_CNT];
01322 } PXE_DB_RECEIVE_FILTERS;
01323 
01324 typedef struct s_pxe_cpb_station_address {
01325   ///
01326   /// If supplied and supported, the current station MAC address
01327   /// will be changed.
01328   ///
01329   PXE_MAC_ADDR  StationAddr;
01330 } PXE_CPB_STATION_ADDRESS;
01331 
01332 typedef struct s_pxe_dpb_station_address {
01333   ///
01334   /// Current station MAC address.
01335   ///
01336   PXE_MAC_ADDR  StationAddr;
01337 
01338   ///
01339   /// Station broadcast MAC address.
01340   ///
01341   PXE_MAC_ADDR  BroadcastAddr;
01342 
01343   ///
01344   /// Permanent station MAC address.
01345   ///
01346   PXE_MAC_ADDR  PermanentAddr;
01347 } PXE_DB_STATION_ADDRESS;
01348 
01349 typedef struct s_pxe_db_statistics {
01350   ///
01351   /// Bit field identifying what statistic data is collected by the
01352   /// UNDI/NIC.
01353   /// If bit 0x00 is set, Data[0x00] is collected.
01354   /// If bit 0x01 is set, Data[0x01] is collected.
01355   /// If bit 0x20 is set, Data[0x20] is collected.
01356   /// If bit 0x21 is set, Data[0x21] is collected.
01357   /// Etc.
01358   ///
01359   PXE_UINT64  Supported;
01360 
01361   ///
01362   /// Statistic data.
01363   ///
01364   PXE_UINT64  Data[64];
01365 } PXE_DB_STATISTICS;
01366 
01367 ///
01368 /// Total number of frames received.  Includes frames with errors and
01369 /// dropped frames.
01370 ///
01371 #define PXE_STATISTICS_RX_TOTAL_FRAMES  0x00
01372 
01373 ///
01374 /// Number of valid frames received and copied into receive buffers.
01375 ///
01376 #define PXE_STATISTICS_RX_GOOD_FRAMES 0x01
01377 
01378 ///
01379 /// Number of frames below the minimum length for the media.
01380 /// This would be <64 for ethernet.
01381 ///
01382 #define PXE_STATISTICS_RX_UNDERSIZE_FRAMES  0x02
01383 
01384 ///
01385 /// Number of frames longer than the maxminum length for the
01386 /// media.  This would be >1500 for ethernet.
01387 ///
01388 #define PXE_STATISTICS_RX_OVERSIZE_FRAMES 0x03
01389 
01390 ///
01391 /// Valid frames that were dropped because receive buffers were full.
01392 ///
01393 #define PXE_STATISTICS_RX_DROPPED_FRAMES  0x04
01394 
01395 ///
01396 /// Number of valid unicast frames received and not dropped.
01397 ///
01398 #define PXE_STATISTICS_RX_UNICAST_FRAMES  0x05
01399 
01400 ///
01401 /// Number of valid broadcast frames received and not dropped.
01402 ///
01403 #define PXE_STATISTICS_RX_BROADCAST_FRAMES  0x06
01404 
01405 ///
01406 /// Number of valid mutlicast frames received and not dropped.
01407 ///
01408 #define PXE_STATISTICS_RX_MULTICAST_FRAMES  0x07
01409 
01410 ///
01411 /// Number of frames w/ CRC or alignment errors.
01412 ///
01413 #define PXE_STATISTICS_RX_CRC_ERROR_FRAMES  0x08
01414 
01415 ///
01416 /// Total number of bytes received.  Includes frames with errors
01417 /// and dropped frames.
01418 ///
01419 #define PXE_STATISTICS_RX_TOTAL_BYTES 0x09
01420 
01421 ///
01422 /// Transmit statistics.
01423 ///
01424 #define PXE_STATISTICS_TX_TOTAL_FRAMES      0x0A
01425 #define PXE_STATISTICS_TX_GOOD_FRAMES       0x0B
01426 #define PXE_STATISTICS_TX_UNDERSIZE_FRAMES  0x0C
01427 #define PXE_STATISTICS_TX_OVERSIZE_FRAMES   0x0D
01428 #define PXE_STATISTICS_TX_DROPPED_FRAMES    0x0E
01429 #define PXE_STATISTICS_TX_UNICAST_FRAMES    0x0F
01430 #define PXE_STATISTICS_TX_BROADCAST_FRAMES  0x10
01431 #define PXE_STATISTICS_TX_MULTICAST_FRAMES  0x11
01432 #define PXE_STATISTICS_TX_CRC_ERROR_FRAMES  0x12
01433 #define PXE_STATISTICS_TX_TOTAL_BYTES       0x13
01434 
01435 ///
01436 /// Number of collisions detection on this subnet.
01437 ///
01438 #define PXE_STATISTICS_COLLISIONS 0x14
01439 
01440 ///
01441 /// Number of frames destined for unsupported protocol.
01442 ///
01443 #define PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x15
01444 
01445 typedef struct s_pxe_cpb_mcast_ip_to_mac {
01446   ///
01447   /// Multicast IP address to be converted to multicast MAC address.
01448   ///
01449   PXE_IP_ADDR IP;
01450 } PXE_CPB_MCAST_IP_TO_MAC;
01451 
01452 typedef struct s_pxe_db_mcast_ip_to_mac {
01453   ///
01454   /// Multicast MAC address.
01455   ///
01456   PXE_MAC_ADDR  MAC;
01457 } PXE_DB_MCAST_IP_TO_MAC;
01458 
01459 typedef struct s_pxe_cpb_nvdata_sparse {
01460   ///
01461   /// NvData item list.  Only items in this list will be updated.
01462   ///
01463   struct {
01464     ///
01465     ///  Non-volatile storage address to be changed.
01466     ///
01467     PXE_UINT32  Addr;
01468 
01469     ///
01470     /// Data item to write into above storage address.
01471     ///
01472     union {
01473       PXE_UINT8   Byte;
01474       PXE_UINT16  Word;
01475       PXE_UINT32  Dword;
01476     } Data;
01477   } Item[MAX_EEPROM_LEN];
01478 } PXE_CPB_NVDATA_SPARSE;
01479 
01480 ///
01481 /// When using bulk update, the size of the CPB structure must be
01482 /// the same size as the non-volatile NIC storage.
01483 ///
01484 typedef union u_pxe_cpb_nvdata_bulk {
01485   ///
01486   /// Array of byte-wide data items.
01487   ///
01488   PXE_UINT8   Byte[MAX_EEPROM_LEN << 2];
01489 
01490   ///
01491   /// Array of word-wide data items.
01492   ///
01493   PXE_UINT16  Word[MAX_EEPROM_LEN << 1];
01494 
01495   ///
01496   /// Array of dword-wide data items.
01497   ///
01498   PXE_UINT32  Dword[MAX_EEPROM_LEN];
01499 } PXE_CPB_NVDATA_BULK;
01500 
01501 typedef struct s_pxe_db_nvdata {
01502   ///
01503   /// Arrays of data items from non-volatile storage.
01504   ///
01505   union {
01506     ///
01507     /// Array of byte-wide data items.
01508     ///
01509     PXE_UINT8   Byte[MAX_EEPROM_LEN << 2];
01510 
01511     ///
01512     /// Array of word-wide data items.
01513     ///
01514     PXE_UINT16  Word[MAX_EEPROM_LEN << 1];
01515 
01516     ///
01517     /// Array of dword-wide data items.
01518     ///
01519     PXE_UINT32  Dword[MAX_EEPROM_LEN];
01520   } Data;
01521 } PXE_DB_NVDATA;
01522 
01523 typedef struct s_pxe_db_get_status {
01524   ///
01525   /// Length of next receive frame (header + data).  If this is zero,
01526   /// there is no next receive frame available.
01527   ///
01528   PXE_UINT32  RxFrameLen;
01529 
01530   ///
01531   /// Reserved, set to zero.
01532   ///
01533   PXE_UINT32  reserved;
01534 
01535   ///
01536   ///  Addresses of transmitted buffers that need to be recycled.
01537   ///
01538   PXE_UINT64  TxBuffer[MAX_XMIT_BUFFERS];
01539 } PXE_DB_GET_STATUS;
01540 
01541 typedef struct s_pxe_cpb_fill_header {
01542   ///
01543   /// Source and destination MAC addresses.  These will be copied into
01544   /// the media header without doing byte swapping.
01545   ///
01546   PXE_MAC_ADDR  SrcAddr;
01547   PXE_MAC_ADDR  DestAddr;
01548 
01549   ///
01550   /// Address of first byte of media header.  The first byte of packet data
01551   /// follows the last byte of the media header.
01552   ///
01553   PXE_UINT64        MediaHeader;
01554 
01555   ///
01556   /// Length of packet data in bytes (not including the media header).
01557   ///
01558   PXE_UINT32        PacketLen;
01559 
01560   ///
01561   /// Protocol type.  This will be copied into the media header without
01562   /// doing byte swapping.  Protocol type numbers can be obtained from
01563   /// the Assigned Numbers RFC 1700.
01564   ///
01565   PXE_UINT16        Protocol;
01566 
01567   ///
01568   /// Length of the media header in bytes.
01569   ///
01570   PXE_UINT16        MediaHeaderLen;
01571 } PXE_CPB_FILL_HEADER;
01572 
01573 #define PXE_PROTOCOL_ETHERNET_IP  0x0800
01574 #define PXE_PROTOCOL_ETHERNET_ARP 0x0806
01575 #define MAX_XMIT_FRAGMENTS        16
01576 
01577 typedef struct s_pxe_cpb_fill_header_fragmented {
01578   ///
01579   /// Source and destination MAC addresses.  These will be copied into
01580   /// the media header without doing byte swapping.
01581   ///
01582   PXE_MAC_ADDR        SrcAddr;
01583   PXE_MAC_ADDR        DestAddr;
01584 
01585   ///
01586   /// Length of packet data in bytes (not including the media header).
01587   ///
01588   PXE_UINT32          PacketLen;
01589 
01590   ///
01591   /// Protocol type.  This will be copied into the media header without
01592   /// doing byte swapping.  Protocol type numbers can be obtained from
01593   /// the Assigned Numbers RFC 1700.
01594   ///
01595   PXE_MEDIA_PROTOCOL  Protocol;
01596 
01597   ///
01598   /// Length of the media header in bytes.
01599   ///
01600   PXE_UINT16          MediaHeaderLen;
01601 
01602   ///
01603   /// Number of packet fragment descriptors.
01604   ///
01605   PXE_UINT16          FragCnt;
01606 
01607   ///
01608   /// Reserved, must be set to zero.
01609   ///
01610   PXE_UINT16          reserved;
01611 
01612   ///
01613   /// Array of packet fragment descriptors.  The first byte of the media
01614   /// header is the first byte of the first fragment.
01615   ///
01616   struct {
01617     ///
01618     /// Address of this packet fragment.
01619     ///
01620     PXE_UINT64  FragAddr;
01621 
01622     ///
01623     /// Length of this packet fragment.
01624     ///
01625     PXE_UINT32  FragLen;
01626 
01627     ///
01628     /// Reserved, must be set to zero.
01629     ///
01630     PXE_UINT32  reserved;
01631   } FragDesc[MAX_XMIT_FRAGMENTS];
01632 }
01633 PXE_CPB_FILL_HEADER_FRAGMENTED;
01634 
01635 typedef struct s_pxe_cpb_transmit {
01636   ///
01637   /// Address of first byte of frame buffer.  This is also the first byte
01638   /// of the media header.
01639   ///
01640   PXE_UINT64  FrameAddr;
01641 
01642   ///
01643   /// Length of the data portion of the frame buffer in bytes.  Do not
01644   /// include the length of the media header.
01645   ///
01646   PXE_UINT32  DataLen;
01647 
01648   ///
01649   /// Length of the media header in bytes.
01650   ///
01651   PXE_UINT16  MediaheaderLen;
01652 
01653   ///
01654   /// Reserved, must be zero.
01655   ///
01656   PXE_UINT16  reserved;
01657 } PXE_CPB_TRANSMIT;
01658 
01659 typedef struct s_pxe_cpb_transmit_fragments {
01660   ///
01661   /// Length of packet data in bytes (not including the media header).
01662   ///
01663   PXE_UINT32  FrameLen;
01664 
01665   ///
01666   /// Length of the media header in bytes.
01667   ///
01668   PXE_UINT16  MediaheaderLen;
01669 
01670   ///
01671   /// Number of packet fragment descriptors.
01672   ///
01673   PXE_UINT16  FragCnt;
01674 
01675   ///
01676   /// Array of frame fragment descriptors.  The first byte of the first
01677   /// fragment is also the first byte of the media header.
01678   ///
01679   struct {
01680     ///
01681     /// Address of this frame fragment.
01682     ///
01683     PXE_UINT64  FragAddr;
01684 
01685     ///
01686     /// Length of this frame fragment.
01687     ///
01688     PXE_UINT32  FragLen;
01689 
01690     ///
01691     /// Reserved, must be set to zero.
01692     ///
01693     PXE_UINT32  reserved;
01694   } FragDesc[MAX_XMIT_FRAGMENTS];
01695 }
01696 PXE_CPB_TRANSMIT_FRAGMENTS;
01697 
01698 typedef struct s_pxe_cpb_receive {
01699   ///
01700   /// Address of first byte of receive buffer.  This is also the first byte
01701   /// of the frame header.
01702   ///
01703   PXE_UINT64  BufferAddr;
01704 
01705   ///
01706   /// Length of receive buffer.  This must be large enough to hold the
01707   /// received frame (media header + data).  If the length of smaller than
01708   /// the received frame, data will be lost.
01709   ///
01710   PXE_UINT32  BufferLen;
01711 
01712   ///
01713   /// Reserved, must be set to zero.
01714   ///
01715   PXE_UINT32  reserved;
01716 } PXE_CPB_RECEIVE;
01717 
01718 typedef struct s_pxe_db_receive {
01719   ///
01720   /// Source and destination MAC addresses from media header.
01721   ///
01722   PXE_MAC_ADDR        SrcAddr;
01723   PXE_MAC_ADDR        DestAddr;
01724 
01725   ///
01726   /// Length of received frame.  May be larger than receive buffer size.
01727   /// The receive buffer will not be overwritten.  This is how to tell
01728   /// if data was lost because the receive buffer was too small.
01729   ///
01730   PXE_UINT32          FrameLen;
01731 
01732   ///
01733   /// Protocol type from media header.
01734   ///
01735   PXE_MEDIA_PROTOCOL  Protocol;
01736 
01737   ///
01738   /// Length of media header in received frame.
01739   ///
01740   PXE_UINT16          MediaHeaderLen;
01741 
01742   ///
01743   /// Type of receive frame.
01744   ///
01745   PXE_FRAME_TYPE      Type;
01746 
01747   ///
01748   /// Reserved, must be zero.
01749   ///
01750   PXE_UINT8           reserved[7];
01751 
01752 } PXE_DB_RECEIVE;
01753 
01754 #pragma pack()
01755 
01756 #endif

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