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| #define XCVR_MAGIC (0x5A00) |
| #define INT_TXCOMPLETE (1<<2) |
Definition at line 246 of file 3c90x.h.
Referenced by a3c90x_hw_start(), a3c90x_irq(), a3c90x_poll(), and a3c90x_reset().
| #define INT_UPCOMPLETE (1<<10) |
Definition at line 253 of file 3c90x.h.
Referenced by a3c90x_hw_start(), a3c90x_irq(), and a3c90x_reset().
| #define INT_CMDINPROGRESS (1<<12) |
| #define TX_RING_ALIGN 16 |
Definition at line 260 of file 3c90x.h.
Referenced by a3c90x_setup_tx_ring(), rtl8169_setup_tx_resources(), and sky2_up().
| #define RX_RING_ALIGN 16 |
Definition at line 261 of file 3c90x.h.
Referenced by a3c90x_setup_rx_ring(), rtl8169_setup_rx_resources(), and sky2_up().
| #define RX_BUF_SIZE 1536 |
Definition at line 262 of file 3c90x.h.
Referenced by a3c90x_prepare_rx_desc(), a3c90x_refill_rx_ring(), bnx2_init_rx_ring(), natsemi_open(), natsemi_poll(), rtl8169_populate_rx_descriptor(), rtl8169_refill_rx_ring(), rtl_set_rx_max_size(), sis190_alloc_rx_iob(), sis190_give_to_asic(), sis190_process_rx(), sis900_init_rxd(), sis900_poll(), and skge_rx_refill().
| #define EEPROM_TIMEOUT 1 * 1000 * 1000 |
| enum Registers |
Definition at line 58 of file 3c90x.h.
00058 { 00059 regPowerMgmtCtrl_w = 0x7c, /* 905B Revision Only */ 00060 regUpMaxBurst_w = 0x7a, /* 905B Revision Only */ 00061 regDnMaxBurst_w = 0x78, /* 905B Revision Only */ 00062 regDebugControl_w = 0x74, /* 905B Revision Only */ 00063 regDebugData_l = 0x70, /* 905B Revision Only */ 00064 regRealTimeCnt_l = 0x40, /* Universal */ 00065 regUpBurstThresh_b = 0x3e, /* 905B Revision Only */ 00066 regUpPoll_b = 0x3d, /* 905B Revision Only */ 00067 regUpPriorityThresh_b = 0x3c, /* 905B Revision Only */ 00068 regUpListPtr_l = 0x38, /* Universal */ 00069 regCountdown_w = 0x36, /* Universal */ 00070 regFreeTimer_w = 0x34, /* Universal */ 00071 regUpPktStatus_l = 0x30, /* Universal with Exception, pg 130 */ 00072 regTxFreeThresh_b = 0x2f, /* 90X Revision Only */ 00073 regDnPoll_b = 0x2d, /* 905B Revision Only */ 00074 regDnPriorityThresh_b = 0x2c, /* 905B Revision Only */ 00075 regDnBurstThresh_b = 0x2a, /* 905B Revision Only */ 00076 regDnListPtr_l = 0x24, /* Universal with Exception, pg 107 */ 00077 regDmaCtrl_l = 0x20, /* Universal with Exception, pg 106 */ 00078 /* */ 00079 regIntStatusAuto_w = 0x1e, /* 905B Revision Only */ 00080 regTxStatus_b = 0x1b, /* Universal with Exception, pg 113 */ 00081 regTimer_b = 0x1a, /* Universal */ 00082 regTxPktId_b = 0x18, /* 905B Revision Only */ 00083 regCommandIntStatus_w = 0x0e, /* Universal (Command Variations) */ 00084 };
| enum Registers7 |
Definition at line 87 of file 3c90x.h.
00087 { 00088 regPowerMgmtEvent_7_w = 0x0c, /* 905B Revision Only */ 00089 regVlanEtherType_7_w = 0x04, /* 905B Revision Only */ 00090 regVlanMask_7_w = 0x00, /* 905B Revision Only */ 00091 };
| enum Registers6 |
Definition at line 93 of file 3c90x.h.
00093 { 00094 regBytesXmittedOk_6_w = 0x0c, /* Universal */ 00095 regBytesRcvdOk_6_w = 0x0a, /* Universal */ 00096 regUpperFramesOk_6_b = 0x09, /* Universal */ 00097 regFramesDeferred_6_b = 0x08, /* Universal */ 00098 regFramesRecdOk_6_b = 0x07, /* Universal with Exceptions, pg 142 */ 00099 regFramesXmittedOk_6_b = 0x06, /* Universal */ 00100 regRxOverruns_6_b = 0x05, /* Universal */ 00101 regLateCollisions_6_b = 0x04, /* Universal */ 00102 regSingleCollisions_6_b = 0x03, /* Universal */ 00103 regMultipleCollisions_6_b = 0x02, /* Universal */ 00104 regSqeErrors_6_b = 0x01, /* Universal */ 00105 regCarrierLost_6_b = 0x00, /* Universal */ 00106 };
| enum Registers5 |
| regIndicationEnable_5_w | |
| regInterruptEnable_5_w | |
| regTxReclaimThresh_5_b | |
| regRxFilter_5_b | |
| regRxEarlyThresh_5_w | |
| regTxStartThresh_5_w |
Definition at line 108 of file 3c90x.h.
00108 { 00109 regIndicationEnable_5_w = 0x0c, /* Universal */ 00110 regInterruptEnable_5_w = 0x0a, /* Universal */ 00111 regTxReclaimThresh_5_b = 0x09, /* 905B Revision Only */ 00112 regRxFilter_5_b = 0x08, /* Universal */ 00113 regRxEarlyThresh_5_w = 0x06, /* Universal */ 00114 regTxStartThresh_5_w = 0x00, /* Universal */ 00115 };
| enum Registers4 |
| regUpperBytesOk_4_b | |
| regBadSSD_4_b | |
| regMediaStatus_4_w | |
| regPhysicalMgmt_4_w | |
| regNetworkDiagnostic_4_w | |
| regFifoDiagnostic_4_w | |
| regVcoDiagnostic_4_w |
Definition at line 117 of file 3c90x.h.
00117 { 00118 regUpperBytesOk_4_b = 0x0d, /* Universal */ 00119 regBadSSD_4_b = 0x0c, /* Universal */ 00120 regMediaStatus_4_w = 0x0a, /* Universal with Exceptions, pg 201 */ 00121 regPhysicalMgmt_4_w = 0x08, /* Universal */ 00122 regNetworkDiagnostic_4_w = 0x06, /* Universal with Exceptions, pg 203 */ 00123 regFifoDiagnostic_4_w = 0x04, /* Universal with Exceptions, pg 196 */ 00124 regVcoDiagnostic_4_w = 0x02, /* Undocumented? */ 00125 };
| enum Registers3 |
| regTxFree_3_w | |
| regRxFree_3_w | |
| regResetMediaOptions_3_w | |
| regMacControl_3_w | |
| regMaxPktSize_3_w | |
| regInternalConfig_3_l |
Definition at line 127 of file 3c90x.h.
00127 { 00128 regTxFree_3_w = 0x0c, /* Universal */ 00129 regRxFree_3_w = 0x0a, /* Universal with Exceptions, pg 125 */ 00130 regResetMediaOptions_3_w = 0x08, /* Media Options on B Revision, */ 00131 /* Reset Options on Non-B Revision */ 00132 regMacControl_3_w = 0x06, /* Universal with Exceptions, pg 199 */ 00133 regMaxPktSize_3_w = 0x04, /* 905B Revision Only */ 00134 regInternalConfig_3_l = 0x00, /* Universal, different bit */ 00135 /* definitions, pg 59 */ 00136 };
| enum Registers2 |
Definition at line 138 of file 3c90x.h.
00138 { 00139 regResetOptions_2_w = 0x0c, /* 905B Revision Only */ 00140 regStationMask_2_3w = 0x06, /* Universal with Exceptions, pg 127 */ 00141 regStationAddress_2_3w = 0x00, /* Universal with Exceptions, pg 127 */ 00142 };
| enum Registers1 |
Definition at line 144 of file 3c90x.h.
00144 { 00145 regRxStatus_1_w = 0x0a, /* 90X Revision Only, Pg 126 */ 00146 };
| enum Registers0 |
Definition at line 148 of file 3c90x.h.
00148 { 00149 regEepromData_0_w = 0x0c, /* Universal */ 00150 regEepromCommand_0_w = 0x0a, /* Universal */ 00151 regBiosRomData_0_b = 0x08, /* 905B Revision Only */ 00152 regBiosRomAddr_0_l = 0x04, /* 905B Revision Only */ 00153 };
| enum Windows |
| winNone | |
| winPowerVlan7 | |
| winStatistics6 | |
| winTxRxControl5 | |
| winDiagnostics4 | |
| winTxRxOptions3 | |
| winAddressing2 | |
| winUnused1 | |
| winEepromBios0 |
Definition at line 157 of file 3c90x.h.
00157 { 00158 winNone = 0xff, 00159 winPowerVlan7 = 0x07, 00160 winStatistics6 = 0x06, 00161 winTxRxControl5 = 0x05, 00162 winDiagnostics4 = 0x04, 00163 winTxRxOptions3 = 0x03, 00164 winAddressing2 = 0x02, 00165 winUnused1 = 0x01, 00166 winEepromBios0 = 0x00, 00167 };
| enum Commands |
Definition at line 171 of file 3c90x.h.
00171 { 00172 cmdGlobalReset = 0x00, /* Universal with Exceptions, pg 151 */ 00173 cmdSelectRegisterWindow = 0x01, /* Universal */ 00174 cmdEnableDcConverter = 0x02, /* */ 00175 cmdRxDisable = 0x03, /* */ 00176 cmdRxEnable = 0x04, /* Universal */ 00177 cmdRxReset = 0x05, /* Universal */ 00178 cmdStallCtl = 0x06, /* Universal */ 00179 cmdTxEnable = 0x09, /* Universal */ 00180 cmdTxDisable = 0x0A, /* */ 00181 cmdTxReset = 0x0B, /* Universal */ 00182 cmdRequestInterrupt = 0x0C, /* */ 00183 cmdAcknowledgeInterrupt = 0x0D, /* Universal */ 00184 cmdSetInterruptEnable = 0x0E, /* Universal */ 00185 cmdSetIndicationEnable = 0x0F, /* Universal */ 00186 cmdSetRxFilter = 0x10, /* Universal */ 00187 cmdSetRxEarlyThresh = 0x11, /* */ 00188 cmdSetTxStartThresh = 0x13, /* */ 00189 cmdStatisticsEnable = 0x15, /* */ 00190 cmdStatisticsDisable = 0x16, /* */ 00191 cmdDisableDcConverter = 0x17, /* */ 00192 cmdSetTxReclaimThresh = 0x18, /* */ 00193 cmdSetHashFilterBit = 0x19, /* */ 00194 };
| enum FrameStartHeader |
Definition at line 196 of file 3c90x.h.
00196 { 00197 fshTxIndicate = 0x8000, 00198 fshDnComplete = 0x10000, 00199 };
| enum UpDownDesc |
Definition at line 201 of file 3c90x.h.
00201 { 00202 upLastFrag = (1 << 31), 00203 downLastFrag = (1 << 31), 00204 };
| enum UpPktStatus |
Definition at line 206 of file 3c90x.h.
00206 { 00207 upComplete = (1 << 15), 00208 upError = (1 << 14), 00209 };
| enum Stalls |
| enum Resources |
Definition at line 219 of file 3c90x.h.
00219 { 00220 resRxRing = 0x00, 00221 resTxRing = 0x02, 00222 resRxIOBuf = 0x04 00223 };
| enum eeprom |
Definition at line 225 of file 3c90x.h.
00225 { 00226 eepromBusy = (1 << 15), 00227 eepromRead = ((0x02) << 6), 00228 eepromRead_556 = 0x230, 00229 eepromHwAddrOffset = 0x0a, 00230 };
| enum linktype |
Definition at line 233 of file 3c90x.h.
00233 { 00234 link10BaseT = 0x00, 00235 linkAUI = 0x01, 00236 link10Base2 = 0x03, 00237 link100BaseFX = 0x05, 00238 linkMII = 0x06, 00239 linkAutoneg = 0x08, 00240 linkExternalMII = 0x09, 00241 };
| FILE_LICENCE | ( | BSD2 | ) |
struct net_device_operations a3c90x_operations [static] |
1.5.7.1